CN103489418A - Driving method of display panel, display panel and grid driving circuit - Google Patents
Driving method of display panel, display panel and grid driving circuit Download PDFInfo
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- CN103489418A CN103489418A CN201310336550.6A CN201310336550A CN103489418A CN 103489418 A CN103489418 A CN 103489418A CN 201310336550 A CN201310336550 A CN 201310336550A CN 103489418 A CN103489418 A CN 103489418A
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Abstract
The invention provides a driving method of a display panel, the display panel and a grid driving circuit, wherein the driving method of the display panel comprises the following steps: pulling up a gate voltage of a transistor of a first pixel from a first voltage level to a second voltage level through a first scan line in a first scan period of a picture display period to turn on the transistor of the first pixel; writing a data signal with a first polarity into the first pixel in the first scanning period; pulling up a gate voltage of a transistor of a second pixel from a third voltage level to a fourth voltage level through a second scan line in a second scan period of the frame display period to turn on the transistor of the second pixel; and writing the data signal with the first polarity into the second pixel in the second scanning period. Wherein the first and second scan lines are adjacent, the fourth voltage level is lower than the second voltage level, and the third voltage level is lower than the first voltage level.
Description
Technical field
The present invention relates to driving method, display panel and gate driver circuit in a kind of display panel, especially relate to a kind of driving method, display panel and gate driver circuit that improves the display panel of pixel charging difference.
Background technology
Generally speaking, display panels includes a plurality of pixels, gate driver circuit and source electrode drive circuit.Source electrode drive circuit in order to the data writing signal in the pixel be unlocked.Gate driver circuit comprises plural number level shift register, is used to provide a plurality of signals to control the open and close of pixel.
Please refer to Fig. 1, the schematic diagram of waveform correlation when Fig. 1 drives display panels for existing two row reversal of poles (2-row inversion) mode.As shown in Figure 1, in the first scanning period t1 in picture disply cycle, signal S1 first is pulled to the accurate V2 in second voltage position from the first voltage level V1, and to open the transistor of the first row pixel, and data-signal Sd is written into the first row pixel be unlocked.Afterwards, in the second scanning period t2 in picture disply cycle, signal S2 also is pulled to the accurate V2 in second voltage position from the first voltage level V1, and to open the transistor of the second row pixel, and data-signal Sd is written into the second row pixel be unlocked again.The polarity of data-signal Sd that wherein writes the first row pixel and the second row pixel is identical, and the polarity of data-signal that writes down two row pixels is in contrast to the polarity of the data-signal that writes the first row pixel and the second row pixel, by that analogy.
In above-mentioned two row reversal of poles modes, when the first row pixel just has been unlocked, data-signal Sd not yet reaches predetermined voltage position standard, and when the second row pixel is unlocked, data-signal Sd has reached predetermined voltage position standard, therefore, have charging difference between the first row pixel and the second row pixel, and then affect the image quality of display panels.Especially when the frame updating frequency of display panels is higher, the duration of charging of pixel is shorter, because the pixel charging difference problem that the reversal of poles type of drive causes will be more serious.
Summary of the invention
The object of the present invention is to provide a kind of driving method, display panel and gate driver circuit that improves the display panel of pixel charging difference, to solve the problem of prior art.
The driving method of display panel of the present invention comprises: the one first scanning period in a picture disply cycle is pulled to a second voltage position standard by the transistorized grid voltage of one first pixel from one first voltage level via one first sweep trace, to open the transistor of this first pixel; Write the data-signal of tool one first polarity in this first pixel in this first scanning period; The one second scanning period in this picture disply cycle is pulled to one four voltage level by the transistorized grid voltage of one second pixel from a tertiary voltage position standard via one second sweep trace, to open the transistor of this second pixel; And write the data-signal of this first polarity of tool in this second pixel in this second scanning period; Wherein this first sweep trace is adjacent to this second sweep trace, and the 4th voltage level is lower than this second voltage position standard, and this tertiary voltage position standard is lower than this first voltage level.
Gate driver circuit of the present invention comprises: a plurality of the first shift registers, and a plurality of the second shift register.Each first shift register is in order to export a first grid signal, and this first grid signal is pulled to a second voltage position standard from one first voltage level, to open the transistor of corresponding pixel.Each second shift register is in order to export a second grid signal, and this second grid signal is pulled to one the 4th voltage level from a tertiary voltage position standard, to open the transistor of corresponding pixel.Wherein those first shift registers and those the second shift registers are interconnected, and the 4th voltage level is lower than this second voltage position standard, and this tertiary voltage position standard is lower than this first voltage level.
Display panel of the present invention comprises: a picture element matrix, a gate driver circuit, and a data drive circuit.Picture element matrix comprises a plurality of pixels.Gate driver circuit comprises a plurality of the first shift registers, and a plurality of the second shift register.Each first shift register is in order to export a first grid signal, and this first grid signal is pulled to a second voltage position standard from one first voltage level, to open the transistor of corresponding pixel.Each second shift register is in order to export a second grid signal, and this second grid signal is pulled to one the 4th voltage level from a tertiary voltage position standard, to open the transistor of corresponding pixel.This data drive circuit is in order to write corresponding data-signal in the pixel be unlocked.Wherein those first shift registers and those the second shift registers are interconnected, and the 4th voltage level is lower than this second voltage position standard, and this tertiary voltage position standard is lower than this first voltage level.
Compared to prior art, the present invention exports the signal of different voltage levels to open respectively the pixel of adjacent two row, and then improves the pixel charging difference problem caused because of the reversal of poles type of drive.Therefore display panel of the present invention has preferably image quality.
The accompanying drawing explanation
The schematic diagram of waveform correlation when Fig. 1 drives display panels for existing two row reversal of poles modes;
The schematic diagram that Fig. 2 is display panel of the present invention;
The schematic diagram that Fig. 3 is Fig. 2 gate driver circuit;
The schematic diagram of the waveform correlation of the driving method that Fig. 4 is display panel of the present invention;
The schematic diagram of the waveform correlation of the driving method that Fig. 5 is display panel of the present invention;
The process flow diagram of the driving method that Fig. 6 is display panel of the present invention;
Fig. 7 is the schematic diagram that two row add a reversal of poles mode;
Fig. 8 is 2 schematic diagram that add a reversal of poles mode.
Reference numeral
100: display panel 110: picture element matrix
120: 122: the first shift registers of gate driver circuit
Within 124: the second, shift register 130: data drive circuit
C: electric capacity D: data line
G1～G4: sweep trace S1, S2: signal
Sg1: first grid signal Sg2: second grid signal
Sd, Sd1, Sd2: data-signal V1: the first voltage level
V2: the accurate V3 in second voltage position: tertiary voltage position standard
V4: the 4th voltage level T: transistor
T1: the first scanning period t2: the second scanning period
T3: the 3rd scanning period t4: the 4th scanning period
P: pixel 600: process flow diagram
610 to 680: step
Embodiment
Please also refer to Fig. 2 and Fig. 3, the schematic diagram that Fig. 2 is display panel of the present invention.The schematic diagram that Fig. 3 is Fig. 2 gate driver circuit.As shown in the figure, display panel 100 of the present invention comprises picture element matrix 110, gate driver circuit 120, and data drive circuit 130.Picture element matrix 110 comprises a plurality of pixel P.Gate driver circuit 120 comprises a plurality of the first shift registers 122, and a plurality of the second shift register 124.The first shift register 122 and the second shift register 124 be respectively in order to export first grid signal Sg1 and second grid signal Sg2, and then open the transistor T of corresponding pixel P.The first shift register 122 and the second shift register 124 are interconnected.Data drive circuit 130 is in order to write corresponding data-signal in the capacitor C of the pixel P be unlocked via data line D.
Please also refer to Fig. 4 and Fig. 5, and in the lump with reference to figure 2 and Fig. 3.The schematic diagram of the waveform correlation of the driving method that Fig. 4 and Fig. 5 are display panel of the present invention.When the present invention drives display panels 100 in two row reversal of poles modes, as shown in Figure 4, the first scanning period t1 in the picture disply cycle, the first grid signal Sg1 that is positioned at the first shift register 122 outputs of the first order first is pulled to the accurate V2 in second voltage position from the first voltage level V1, to open the transistor T of the first row pixel P via sweep trace G1, and the data-signal Sd1 of tool the first polarity is written into the first row pixel P be unlocked.Afterwards, the second scanning period t2 in the picture disply cycle, the second grid signal Sg2 that is positioned at the second shift register 124 outputs of the second level is pulled to the 4th voltage level V4 from the accurate V3 in tertiary voltage position, to open the transistor T of the second row pixel P via sweep trace G2, and the data-signal Sd1 of tool the first polarity is written into the second row pixel P be unlocked.Wherein the 4th voltage level V4 is lower than the accurate V2 in second voltage position, and the accurate V3 in tertiary voltage position is lower than the first voltage level V1.
As shown in Figure 5, the 3rd scanning period t3 in the picture disply cycle, the first grid signal Sg1 that is positioned at the first shift register 122 outputs of the third level first is pulled to the accurate V2 in second voltage position from the first voltage level V1, to open the transistor T of the third line pixel P via sweep trace G3, and the data-signal Sd2 of tool the second polarity is written into the third line pixel P be unlocked.Afterwards, the 4th scanning period t4 in the picture disply cycle, the second grid signal Sg2 that is positioned at the second shift register 124 outputs of the fourth stage is pulled to the 4th voltage level V4 from the accurate V3 in tertiary voltage position, to open the transistor T of fourth line pixel P via sweep trace G4, and the data-signal Sd2 of tool the second polarity is written into the pixel P of the fourth line be unlocked, by that analogy.Wherein the second polarity is in contrast to this first polarity.
According to above-mentioned configuration, when display panel 100 of the present invention drives in two row reversal of poles (2-row inversion) mode, the transistor T of the first row pixel P of adjacent two row pixels is opened by the first grid signal Sg1 of tool high voltage position standard, the time write to shorten data-signal, therefore the first row pixel of adjacent two row pixels and the charging difference between the second row pixel will reduce.
In addition, for fear of feedthrough (feed through) effect of display panel 100, the voltage difference of the accurate V2 in second voltage position and the first voltage level V1 is same as the voltage difference of the 4th voltage level V4 and the accurate V3 in tertiary voltage position.
In the above-described embodiments, the driving method of display panel of the present invention is applied to two row reversal of poles modes, yet, in other embodiment of the present invention, the driving method of display panel of the present invention also can be applicable to other reversal of poles mode, for example two point-polarity reversion (2-dot inversion) modes.Perhaps, two row that the driving method of display panel of the present invention also can be applicable to as shown in Figure 7 add a reversal of poles mode, and 2 of being applied to as shown in Figure 8 add a reversal of poles mode.
Please refer to Fig. 6, the process flow diagram 600 of the driving method that Fig. 6 is display panel of the present invention.The flow process of the image treatment method of display device of the present invention is as following step:
Step 610: the one first scanning period in a picture disply cycle is pulled to a second voltage position standard by the transistorized grid voltage of one first pixel from one first voltage level via one first sweep trace, to open the transistor of this first pixel;
Step 620: in this first scanning period, write the data-signal of tool one first polarity in this first pixel;
Step 630: the one second scanning period in this picture disply cycle is pulled to one four voltage level by the transistorized grid voltage of one second pixel from a tertiary voltage position standard via one second sweep trace, to open the transistor of this second pixel;
Step 640: in this second scanning period, write the data-signal of this first polarity of tool in this second pixel;
Step 650: one the 3rd scanning period in this picture disply cycle is pulled to this second voltage position standard by the transistorized grid voltage of one the 3rd pixel from this first voltage level via a three scan line, to open the transistor of the 3rd pixel;
Step 660: in the 3rd scanning period, write the data-signal of tool one second polarity in the 3rd pixel;
Step 670: one the 4th scanning period in this picture disply cycle is pulled to four voltage level by the transistorized grid voltage of one the 4th pixel from this tertiary voltage position standard via one the 4th sweep trace, to open the transistor of the 4th pixel; And
Step 680: in the 4th scanning period, write the data-signal of this second polarity of tool in the 4th pixel.
Compared to prior art, the present invention exports the signal of different voltage levels to open respectively the pixel of adjacent two row, and then improves the pixel charging difference problem caused because of the reversal of poles type of drive.Therefore display panel of the present invention has preferably image quality.
Claims (10)
1. the driving method of a display panel, is characterized in that, comprises:
The one first scanning period in a picture disply cycle is pulled to a second voltage position standard by the transistorized grid voltage of one first pixel from one first voltage level via one first sweep trace, to open the transistor of this first pixel;
Write the data-signal of tool one first polarity in this first pixel in this first scanning period;
The one second scanning period in this picture disply cycle is pulled to one four voltage level by the transistorized grid voltage of one second pixel from a tertiary voltage position standard via one second sweep trace, to open the transistor of this second pixel; And
Write the data-signal of this first polarity of tool in this second pixel in this second scanning period;
Wherein this first sweep trace is adjacent to this second sweep trace, and the 4th voltage level is lower than this second voltage position standard, and this tertiary voltage position standard is lower than this first voltage level.
2. the driving method of display panel according to claim 1, is characterized in that, separately comprises:
One the 3rd scanning period in this picture disply cycle is pulled to this second voltage position standard by the transistorized grid voltage of one the 3rd pixel from this first voltage level via a three scan line, to open the transistor of the 3rd pixel;
Write the data-signal of tool one second polarity in the 3rd pixel in the 3rd scanning period;
One the 4th scanning period in this picture disply cycle is pulled to four voltage level by the transistorized grid voltage of one the 4th pixel from this tertiary voltage position standard via one the 4th sweep trace, to open the transistor of the 4th pixel;
Write the data-signal of this second polarity of tool in the 4th pixel in the 4th scanning period;
Wherein this three scan line is adjacent to the 4th sweep trace, and this second polarity is in contrast to this first polarity.
3. the driving method of display panel according to claim 1, is characterized in that, the voltage difference of this second voltage position standard and this first voltage level is same as the voltage difference of the 4th voltage level and this tertiary voltage position standard.
4. the driving method of display panel according to claim 1, is characterized in that, this display panel drives in two row reversal of poles modes.
5. the driving method of display panel according to claim 1, is characterized in that, this display panel drives with two point-polarity inversion modes.
6. a gate driver circuit, is characterized in that, comprises:
A plurality of the first shift registers, each first shift register is in order to export a first grid signal, and this first grid signal is pulled to a second voltage position standard from one first voltage level, to open the transistor of corresponding pixel; And
A plurality of the second shift registers, each second shift register is in order to export a second grid signal, and this second grid signal is pulled to one the 4th voltage level from a tertiary voltage position standard, to open the transistor of corresponding pixel;
Wherein those first shift registers and those the second shift registers are interconnected, and the 4th voltage level is lower than this second voltage position standard, and this tertiary voltage position standard is lower than this first voltage level.
7. gate driver circuit according to claim 6, is characterized in that, the voltage difference of this second voltage position standard and this first voltage level is same as the voltage difference of the 4th voltage level and this tertiary voltage position standard.
8. a display panel, is characterized in that, comprises:
One picture element matrix, comprise a plurality of pixels;
One gate driver circuit comprises:
A plurality of the first shift registers, each first shift register is in order to export a first grid signal, and this first grid signal is pulled to a second voltage position standard from one first voltage level, to open the transistor of corresponding pixel; And
A plurality of the second shift registers, each second shift register is in order to export a second grid signal, and this second grid signal is pulled to one the 4th voltage level from a tertiary voltage position standard, to open the transistor of corresponding pixel; And
One data drive circuit, in order to write corresponding data-signal in the pixel be unlocked;
Wherein those first shift registers and those the second shift registers are interconnected, and the 4th voltage level is lower than this second voltage position standard, and this tertiary voltage position standard is lower than this first voltage level.
9. display panel according to claim 8, is characterized in that, the voltage difference of this second voltage position standard and this first voltage level is same as the voltage difference of the 4th voltage level and this tertiary voltage position standard.
10. display panel according to claim 8, it is characterized in that, this data drive circuit in order to the data-signal that writes tool one first polarity in the front two row pixels of adjacent four lines pixel, and be somebody's turn to do front two row pixels sequentially by this first grid signal and this second grid unblanking, and the data-signal two row pixels after adjacent four lines pixel that write tool one second polarity, and after being somebody's turn to do, two row pixels are sequentially by this first grid signal and this second grid unblanking, and this second polarity is in contrast to this first polarity.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW102119635 | 2013-06-03 | ||
| TW102119635A TWI475551B (en) | 2013-06-03 | 2013-06-03 | Driving method of display panel, display panel and gate driving circuit |
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| CN103489418A true CN103489418A (en) | 2014-01-01 |
| CN103489418B CN103489418B (en) | 2015-12-09 |
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Cited By (3)
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| CN106128349A (en) * | 2016-08-29 | 2016-11-16 | 武汉华星光电技术有限公司 | Flat display apparatus and scan drive circuit thereof |
| CN106710567A (en) * | 2017-03-31 | 2017-05-24 | 京东方科技集团股份有限公司 | Display driving device and method, shifting register and display device |
| CN107507588A (en) * | 2017-08-28 | 2017-12-22 | 惠科股份有限公司 | The drive circuit and driving method of display panel |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| TWI691945B (en) * | 2019-03-08 | 2020-04-21 | 凌巨科技股份有限公司 | Display device |
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Also Published As
| Publication number | Publication date |
|---|---|
| TWI475551B (en) | 2015-03-01 |
| CN103489418B (en) | 2015-12-09 |
| TW201447857A (en) | 2014-12-16 |
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