CN106684076B - 封装结构及其制造方法 - Google Patents

封装结构及其制造方法 Download PDF

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Publication number
CN106684076B
CN106684076B CN201510746327.8A CN201510746327A CN106684076B CN 106684076 B CN106684076 B CN 106684076B CN 201510746327 A CN201510746327 A CN 201510746327A CN 106684076 B CN106684076 B CN 106684076B
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Prior art keywords
support plate
guide feet
power device
encapsulating structure
guide
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CN201510746327.8A
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CN106684076A (zh
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鲁凯
赵振清
王涛
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Delta Electronics Shanghai Co Ltd
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Delta Electronics Shanghai Co Ltd
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Priority to CN201510746327.8A priority Critical patent/CN106684076B/zh
Priority to US15/151,906 priority patent/US10128181B2/en
Publication of CN106684076A publication Critical patent/CN106684076A/zh
Priority to US16/154,335 priority patent/US20190043799A1/en
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Publication of CN106684076B publication Critical patent/CN106684076B/zh
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Abstract

本发明公开了一种封装结构及其制造方法。该封装结构包含一第一载板、一第二载板、一引导组件及一封装体；第一载板的一第一上表面上设置至少一功率器件；第二载板设置于第一上表面上，且包含一驱动电路组件及至少一贯穿孔，其中驱动电路组件设置于第二载板的一第二上表面上，用以驱动功率器件，贯穿孔与功率器件相对应设置，当第二载板设置于第一上表面上时，贯穿孔供功率器件穿设；导引组件与第一载板及/或第二载板组接；封装体包覆第一载板、第二载板、部份导引组件，且导引组件部份外露于封装体。本发明的封装结构具备较小尺寸及较佳散热效率的优势，减少线路阻抗及寄生参数。

Description

封装结构及其制造方法
技术领域
本发明涉及关于一种封装结构及其制造方法，尤其涉及一种应用于电源变换器，且可增加功率密度、减少尺寸及提升散热效率的封装结构。
背景技术
高效率、高功率密度及高可靠性一直是电力电子领域对电源变换器的要求。高效率意味着减少能耗，利于节能减排、保护环境，并减少使用成本。高功率密度则意味着体积小、重量轻，减少运输成本和空间需求，从而减少建设成本。高可靠性意味着更长的使用寿命以及维护成本。在电源变换器中，半导体器件是决定效率的重要因素之一。为了顺应电源变换器的发展趋势，半导体器件的封装也正在朝着轻、薄、短、小的方向发展，越来越多的元器件需要放到封装体内，如驱动器件、监测器件、无源器件等；另外，随着功率半导体器件封装尺寸不断缩小，对散热的需求也越来越高。
对于电源变换器而言，其主要包括至少一功率器件以及用来驱动功率器件的驱动电路组件(包括驱动器件和无源器件，如电容、电阻等)，而传统电源变换器的封装结构则是利用一双面覆铜陶瓷基板(Direct Bonded Copper-DBC；DBC)作为功率器件的安装载板，并进行封装而形成封装结构，驱动电路组件则相对于封装结构而另外设置。
随着许多电子产品的内部电路已朝模块化发展以提升功率密度，电源变换器也要求将驱动电路组件与功率器件进行模块化，即将驱动电路组件与功率器件一同封装而构成封装结构。而由于驱动电路组件实际上所传递或接收的电能或信号的等级相对较小，故对于通流能力(耐电流能力)的要求不高，故驱动电路组件可做较密的布线，然而因双面覆铜陶瓷基板的特性，双面覆铜陶瓷基板并无法制造宽度较小或较密的布线(以0.25mm的铜厚为例，布线的线宽最小值为0.5mm)，因此上述传统电源变换器的封装结构所使用的双面覆铜陶瓷基板仅供对通流能力及散热需求较高的功率器件设置，并不适合用作驱动电路组件的布线，故无法供驱动电路组件设置，导致传统电源变换器 的封装结构无法符合朝提升功率密度的方向发展。
而由上可知，若要将驱动电路组件整合于具有双面覆铜陶瓷基板的电源变换器的封装结构中，势必需引进其它必要的结构或手段于封装结构中，如此一来，却又可能局限了电源变换器的封装结构的尺寸及布线灵活度。
因此，如何发展一种具备较小尺寸，并具有较佳散热效率的封装结构及其制造方法，实为相关技术领域者目前所迫切需要解决的问题。
发明内容
本发明提供一种封装结构及其制造方法，其将功率器件设置在通流及散热能力较好的第一载板上，将驱动电路组件设置在布线能力较好的第二载板上，并在第二载板上开设对应于功率器件的贯穿孔，使第二载板设置在第一载板上时，功率器件可穿设而容置于对应的贯穿孔内，如此一来，本发明的封装结构不但具备较小尺寸及较佳散热效率的优势，且可以有效缩短功率器件与驱动电路组件间的电性连接距离，进而减少线路阻抗及寄生参数，进而更适用于较高频率的模块封装。
为达上述目的，本发明的一较广实施方式为提供一种封装结构，其包含第一载板、第二载板、引导组件及封装体；第一载板的第一上表面上设置至少一功率器件；第二载板设置于第一上表面上，且包含驱动电路组件及至少一贯穿孔，其中驱动电路组件设置于第二载板的第二上表面上，用以驱动功率器件，贯穿孔与功率器件相对应设置，当第二载板设置于第一上表面上时，贯穿孔供功率器件穿设；引导组件包括第一引导脚及第二引导脚，第一导引脚与驱动电路组件导接；第二导引脚与功率器件导接；封装体包覆第一载板、第二载板、部份第一导引脚及部份第二导引脚，且第一导引脚及第二导引脚部份外露于封装体。
本发明的另一实施方式为提供一种封装结构的制造方法，包含步骤：(a)将功率器件设置于第一载板上；(b)将驱动电路组件设置于第二载板上，将第一导引脚及第二导引脚贴装到第一载板及/或第二载板上，其中第二载板具有至少一贯穿孔；(c)将第二载板设置于第一载板上，并使功率器件穿设贯穿孔；(d)将第一载板、第二载板、功率器件、驱动电路组件、第一导引 脚及第二导引脚进行电气连接；(e)利用封装体将第一载板、第二载板、功率器件、驱动电路组件、第一导引脚及第二导引脚进行封装，且使第一导引脚及第二导引脚部分外露于封装体；以及(f)将外露于封装体外的第一导引脚及第二导引脚切边成型。
本发明至少具有以下有益效果之一：
本发明的封装结构不但具备较小尺寸及较佳散热效率的优势，且可以有效缩短功率器件与驱动电路组件间的电性连接距离，进而减少线路阻抗及寄生参数。
附图说明
图1为本发明第一较佳实施例的封装结构的结构示意图。
图2为图1所示的封装结构的第二载板的结构示意图。
图3A至3F为图1所示的封装结构的制造方法的流程示意图。
图4为本发明第二较佳实施例的封装结构的结构示意图。
图5为本发明第三较佳实施例的封装结构的结构示意图。
图6为本发明第四较佳实施例的封装结构的结构示意图。
【符号说明】
1：封装结构
10、60：第一载板
11：第二载板
12、42、52、62：第一导引脚
13、43、53、63：第二导引脚
14：封装体
15：黏接材料
16：键合引线
50：垫高部
100：第一上表面
101：功率器件
110：第二上表面
111：驱动电路组件
112：贯穿孔
具体实施方式
体现本发明特征与优点的一些典型实施例将在后段的说明中详细叙述。应理解的是本发明能够在不同的方式上具有各种的变化，其皆不脱离本发明的范围，且其中的说明及附图在本质上当作说明之用，而非用以限制本发明。
请参阅图1及图2，其中图1为本发明第一较佳实施例的封装结构的结构示意图，图2为图1所示的封装结构的第二载板的结构示意图。如图1及图2所示，本实施例的封装结构1可为但不限于应用于电源变换器，且包含第一载板10、第二载板11、导引组件及封装体14。导引组件与第一载板10及/或第二载板11组接，且包含第一导引脚12及第二导引脚13。第一载板10包含一第一上表面100，且第一上表面100上设置至少一功率器件101，例如图1所示的两个功率器件101。第二载板11设置于第一载板10的第一上表面100上，且具有一第二上表面110以及至少一贯穿孔112，其中，第二上表面110上设置驱动电路组件111，驱动电路组件111用来驱动功率器件101的运作，且一般包括驱动器件和无源器件，而无源器件包括如电容、电阻等。贯穿孔112，例如图1所示的两个贯穿孔112分别贯穿第二载板11(如图2所示)，且每一贯穿孔112与对应的功率器件101相对应设置，每一贯穿孔112用以当第二载板11设置于第一载板10的第一上表面100上时，供功率器件101穿设而容置功率器件101。于本实施例中，第一导引脚12及第二导引脚13均设置于第二载板11上。封装体14包覆第一载板10、第二载板11、部份第一导引脚12及部份第二导引脚13，且使第一导引脚12及第二导引脚13部份外露于封装体14。
于本实施例中，外露于封装体14的第一导引脚12及第二导引脚13可插接于一系统电路板上。此外，封装结构1还具有黏接材料15，设置于第一载板10和第二载板11之间，使第一载板10和第二载板11可通过黏接材料15的黏接而相互组接，更进一步，第一导引脚12及第二导引脚13也通过黏接材料15而黏接设置于第二载板11上，功率器件101及驱动电路组件111也通过黏接材料15而黏接设置于第一载板10上，其中，黏接材料15可为但不限于焊料(solder)、环氧树脂(epoxy)等。当然，封装结构1可具有键合引线16，而第一载板10及第二载板11还分别具有布线，因此封装结构1 的功率器件101、驱动电路组件111、第一导引脚12及第二导引脚13彼此间便可选择性地利用键合引线16、第一载板10上的布线、第二载板11上的布线及焊料等而导接，例如图1所示，第一导引脚12通过第二载板11的布线及黏接材料15而与驱动电路组件111导接，驱动电路组件111以及功率器件101之间则通过键合引线16与第二载板11的布线导接，两个功率器件101之间也可通过键合引线16相互导接，然导接方式并不以此为限，可依据封装结构1内的电路布局的不同而有所变化。此外，封装体14可为但不限于由塑酯所构成。至于第一导引脚12及第二导引脚13则可由同一引线框架所构成或由不同的引线框架所构成。又于一些实施例中，如图1所示，第一导引脚12可与驱动电路组件111导接，第二导引脚13可与功率器件101导接，然第一导引脚12与第二导引脚13的连接关系并不局限于此，第一导引脚12与第二导引脚13可分别连接于功率器件101及驱动电路组件111的其中之一，端依实际设计需求所决定。
于其他实施例中，第二载板11上的贯穿孔112个数及设置位置可对应于第一载板10上功率器件101的个数及设置位置，当然，也可以根据不同应用和散热设计的要求，而选择合适的个数及设置位置。此外，如图2所示，贯穿孔112的形状除了长方形的形状外，也可以是圆形、六边形、菱形等等，贯穿孔112的尺寸和形状主要取决于功率器件101的尺寸及第一载板10、第二载板11的装配要求，而较佳为贯穿孔112的尺寸实际上大于所对应的功率器件101的尺寸。黏接材料15既可以是导电材料也可以是不导电材料，且黏接材料15的厚度一般大于20um；此外，第一载板10、第二载板11的面积也可随设计需求而有所变化，一般来说，第一载板10的面积小于第二载板11，但是考虑到散热需求，第一载板10的面积也可以大于第二载板11。又根据不同的功率器件101也可使用不同的载板材质，若功率器件101为垂直型功率器件101，如垂直型MOS、垂直型IGBT等，第一载板10一般会包含一层绝缘层，以第一载板10是双面覆铜陶瓷基板为例，绝缘层就是其中的陶瓷层
另外，于上述实施例中，第一载板10的通流能力及散热效率优于第二载板11的通流能力及散热效率，故第一载板10供需要较高通流能力及散热要求的功率器件101来设置，第二载板11的布线能力优于第一载板10，故 第二载板11供对布线能力要求较高的驱动电路组件111来设置。而对应上述内容，第一载板10可为双面覆铜陶瓷基板，第二载板11可为印制电路板(PCB-Print Circuit Board；PCB)或金属绝缘基板(Insulated MetalSubstrate；IMS)。而由于本发明利用布线能力较佳的第二载板11来设置驱动电路组件111，故第二载板11上便可相对制造宽度较小的布线，以符合驱动电路组件111的要求，且因本发明也利用散热效率较优的第一载板10来设置对散热需求较高的功率器件101，便可提升功率器件101的散热效率。更进一步，由于本发明的封装结构1的第一载板10与第二载板11重叠设置，且于第一载板10与第二载板11组接时，功率器件101穿设贯穿孔112，如此一来，使本发明具备较小尺寸，例如水平方向尺寸的优势。另外，由于贯穿孔112的设置位置可根据功率器件101的设置位置而进行相对应设置，故驱动电路组件111可与功率器件101相邻设置，如此可以有效缩短功率器件101与驱动电路组件111间的电性连接距离，进而减少线路阻抗及寄生参数，因此本发明封装结构1更适用于较高频率(>500kHz)的模块封装，以达成在高频化下电压尖峰的抑制。
请参阅图3A至图3F，其为图1所示的封装结构的制造方法的流程示意图。如图3A至图3F所示，本实施例的封装结构1的制造方法的流程包括下列步骤。首先，参照图3A所示，将功率器件101通过黏接材料15黏接到第一载板10(如双面覆铜陶瓷基板)上。并接续参照图3B，将驱动电路组件111贴装到开了贯穿孔112的第二载板11(如印制电路板)上，其中贯穿孔112的位置和数量与功率器件101的位置和数量相对应，将第一导引脚12及第二导引脚13贴装到第一载板10及/或该第二载板11上。然后，参照图3C，通过黏接材料15将第一载板10和第二载板11黏接在一起，并使功率器件101穿设贯穿孔112。接着，参照图3D，通过键合引线16、第一载板10上的布线和第二载板11上的布线等使封装体14内的多个组件实现电气连接。然后，参照图3E，通过模块化技术而利用封装体14将图3D所示的结构进行封装。最后，参照图3F，分别将第一导引脚12及第二导引脚13切边成型，进而完成封装结构1。于一些实施例中，图3B及图3C所示的封装结构的制造步骤的顺序可互换。另外，当黏接材料15为导电材料时，可通过键合引线16、第一载板10上的布线和第二载板11上的布线及黏接材料15而使封 装体14内的多个组件实现电气连接。于一些实施例中，在图3B所示的封装结构的制造步骤之前还可包括在第二载板11上开设贯穿孔112的步骤。
请参阅图4，其为本发明第二较佳实施例的封装结构的结构示意图。如图4所示，本实施例的封装结构1与图1所示的封装结构1相似，故以相同的附图标记代表电路结构及功能相似而不再赘述。然相较于图1的封装结构1的第一导引脚12及第二导引脚13均设置于第二载板11上，本实施例中的第一导引脚42及第二导引脚43改为均设置于第一载板10上，如此一来，通过第一载板10具有优异通流能力的优点，本实施例的第一导引脚42及第二导引脚43便可充分利用第一载板10上较佳的通流能力来传导较大的电流。此外，由于第一导引脚42与第二导引脚43均设置于第一载板10上，功率器件101产生的热能可以经由第一载板10而传导至第一导引脚42与第二导引脚43上，第一导引脚42与第二导引脚43将热能导出封装结构1，而因第一载板10的导热效率较佳，故本实施例的封装结构1可进一步提升散热效率。
请参阅图5，其为本发明第三较佳实施例的封装结构的结构示意图。如图5所示，本实施例的封装结构1与图1所示的封装结构1相似，故以相同的附图标记代表电路结构及功能相似而不再赘述。惟相较于图1将第一导引脚12及第二导引脚13均设置于第二载板11上，于本实施例中，第一导引脚52设置于第二载板11上，第二导引脚53则设置于第一载板10上，而因第二导引脚53实际上是与功率器件101导接，故将第二导引脚53设置于第一载板10上而使第二导引脚53满足功率器件101对通流的要求，至于第一导引脚52因与驱动电路组件111导接，又驱动电路组件111所接收的信号或电压为相对较低等级，故第一导引脚52通过的电流相对很小，因此第一导引脚52便设置于邻近驱动电路组件111的第二载板11上。此外，于本实施例中，因第二载板11堆栈在第一载板10上后，第一载板10的第一上表面100的水平位置低于第二载板11的第二上表面110的水平位置，故为了使设置于第一载板10上的第二导引脚53与设置于第二载板11上的第一导引脚52在外露于封装体14时的水平高度相同，第二导引脚53还包含一垫高部50，由第二导引脚53的一端所延伸构成，并设置于第一载板10上，且垫高部50的厚度与第二载板11的厚度相同，用以使设置于第一载板10上 的第二导引脚53与设置于第二载板11上的第一导引脚52外露于封装体14时的水平高度相同。
于一些实施例中，若功率器件101为平面型功率器件101(如氮化镓-GaN)，则用来设置功率器件101的第一载板10可以不包含绝缘层，例如图6所示，第一载板60由引线框架所构成，此外，于图6所示的实施例中，第一导引脚62及第二导引脚63也可由引线框架构成，因此，第一载板60、第一导引脚62及第二导引脚63实际上是一体成型。
综上所述，本发明提供一种封装结构及其制造方法，其将功率器件设置在通流及散热能力较好的第一载板上，将驱动电路组件设置在布线能力较好的第二载板上，并在第二载板上开设对应于功率器件的贯穿孔，使第二载板设置在第一载板上时，功率器件可穿设而容置于对应的贯穿孔内，如此一来，本发明的封装结构不但具备较小尺寸及较佳散热效率的优势，且可以有效缩短功率器件与驱动电路组件间的电性连接距离，进而减少线路阻抗及寄生参数，进而更适用于较高频率的模块封装。
本发明得由本领域技术人员任施匠思而为诸般修饰，然皆不脱如附权利要求所欲保护者。

Claims (16)

1.一种封装结构，其包含：
一第一载板，该第一载板的一第一上表面上设置至少一功率器件，且该功率器件的一底面设置于该第一载板的该第一上表面上；
一第二载板，设置于该第一上表面上，且包含一驱动电路组件及至少一贯穿孔，其中该驱动电路组件设置于该第二载板的一第二上表面上，用以驱动该功率器件，该贯穿孔与该功率器件相对应设置，当该第二载板设置于该第一上表面上时，该贯穿孔供该功率器件穿设；
一导引组件，与该第一载板及/或该第二载板组接，且所述导引组件包含一第一导引脚及一第二导引脚；
以及
一封装体，包覆该第一载板、该第二载板、部份该第一导引脚及部份该第二导引脚，且该第一导引脚及该第二导引脚部份外露于该封装体；
其中该功率器件的一顶面不高于该第二载板的该第二上表面。
2.如权利要求1所述的封装结构，其中该第一载板的通流能力及散热能力优于该第二载板。
3.如权利要求1或2所述的封装结构，其中该第二载板的布线能力优于该第一载板。
4.如权利要求3所述的封装结构，其中该第一载板为一双面覆铜陶瓷基板，该第二载板为一印制电路板或一金属绝缘基板。
5.如权利要求1所述的封装结构，其中该第一导引脚与该驱动电路组件导接，该第二导引脚与该功率器件导接。
6.如权利要求1所述的封装结构，其中该第一导引脚及该第二导引脚分别设置于该第二载板上。
7.如权利要求1所述的封装结构，其中该第一导引脚及该第二导引脚分别设置于该第一载板上。
8.如权利要求1所述的封装结构，其中该第一导引脚设置于该第二载板上，该第二导引脚设置于该第一载板上。
9.如权利要求8所述的封装结构，其中该第二导引脚包含一垫高部，所述垫高部由该第二导引脚的一端所延伸构成，并设置于该第一载板上，且该垫高部的厚度与该第二载板的厚度相同，用以使设置于该第一载板上的该第二导引脚与设置于该第二载板上的该第一导引脚外露于该封装体时的水平高度相同。
10.如权利要求1所述的封装结构，其中该第一载板由一引线框架构成，且该第一导引脚及该第二导引脚分别由该引线框架构成。
11.如权利要求1所述的封装结构，还包含一黏接材料，所述黏接材料设置于该第一载板和该第二载板之间，使该第一载板和该第二载板通过该黏接材料的黏接而相互组接。
12.如权利要求11所述的封装结构，其中该黏接材料的厚度大于20um。
13.如权利要求1所述的封装结构，其中该贯穿孔的尺寸大于所对应的该功率器件的尺寸。
14.一种封装结构的制造方法，包含步骤：
(a)将一功率器件设置于一第一载板上，其中该功率器件的一底面设置于该第一载板的一第一上表面上；
(b)将一驱动电路组件设置于一第二载板的一第二上表面上，将一第一导引脚及一第二导引脚贴装到该第一载板及/或该第二载板上，其中该第二载板具有至少一贯穿孔；
(c)将该第二载板设置于该第一载板的该第一上表面上，并使该功率器件穿设该贯穿孔，且该功率器件的一顶面不高于该第二载板的该第二上表面；
(d)将该第一载板、该第二载板、该功率器件、该驱动电路组件、该第一导引脚及该第二导引脚进行电气连接；
(e)利用一封装体将该第一载板、该第二载板、该功率器件、该驱动电路组件、该第一导引脚及该第二导引脚进行封装，且使该第一导引脚及该第二导引脚部分外露于该封装体；以及
(f)将外露于该封装体外的该第一导引脚及该第二导引脚切边成型。
15.如权利要求14所述的制造方法，还包含一步骤(g)，其介于步骤(a)与步骤(b)之间，该步骤(g)为：在该第二载板上开设该一贯穿孔。
16.如权利要求14所述的制造方法，其中于步骤(c)中，利用一黏接材料而使该第二载板设置于该第一载板上。
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1086373A (zh) * 1992-10-20 1994-05-04 富士通株式会社 电源模块
US5920119A (en) * 1996-02-22 1999-07-06 Hitachi, Ltd. Power semiconductor module employing metal based molded case and screw fastening type terminals for high reliability
CN2640202Y (zh) * 2003-03-24 2004-09-08 乾坤科技股份有限公司 高密度功率电源模块封装结构
CN2696284Y (zh) * 2003-03-24 2005-04-27 乾坤科技股份有限公司 高密度功率电源模块封装结构
CN102159054A (zh) * 2010-02-12 2011-08-17 乾坤科技股份有限公司 电子封装结构

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4418426B4 (de) * 1993-09-08 2007-08-02 Mitsubishi Denki K.K. Halbleiterleistungsmodul und Verfahren zur Herstellung des Halbleiterleistungsmoduls
JPH11233712A (ja) * 1998-02-12 1999-08-27 Hitachi Ltd 半導体装置及びその製法とそれを使った電気機器
JP3547333B2 (ja) * 1999-02-22 2004-07-28 株式会社日立産機システム 電力変換装置
US6774465B2 (en) * 2001-10-05 2004-08-10 Fairchild Korea Semiconductor, Ltd. Semiconductor power package module
US6876553B2 (en) * 2002-03-21 2005-04-05 Broadcom Corporation Enhanced die-up ball grid array package with two substrates
US8018056B2 (en) * 2005-12-21 2011-09-13 International Rectifier Corporation Package for high power density devices
KR101489325B1 (ko) * 2007-03-12 2015-02-06 페어차일드코리아반도체 주식회사 플립-칩 방식의 적층형 파워 모듈 및 그 파워 모듈의제조방법
KR101493866B1 (ko) * 2008-02-28 2015-02-16 페어차일드코리아반도체 주식회사 전력 소자 패키지 및 그 제조 방법
KR101524544B1 (ko) * 2008-03-28 2015-06-02 페어차일드코리아반도체 주식회사 펠티어 효과를 이용한 열전기 모듈을 포함하는 전력 소자패키지 및 그 제조 방법
JP4634498B2 (ja) * 2008-11-28 2011-02-16 三菱電機株式会社 電力用半導体モジュール
JP2013258321A (ja) * 2012-06-13 2013-12-26 Fuji Electric Co Ltd 半導体装置
TWI500135B (zh) * 2012-12-10 2015-09-11 Ind Tech Res Inst 堆疊式功率元件模組
DE102013219780A1 (de) * 2013-09-30 2015-04-02 Infineon Technologies Ag Leistungshalbleitermodul und Verfahren zur Herstellung eines Leistungshalbleitermoduls
US9468087B1 (en) * 2015-07-13 2016-10-11 Texas Instruments Incorporated Power module with improved cooling and method for making

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1086373A (zh) * 1992-10-20 1994-05-04 富士通株式会社 电源模块
US5398160A (en) * 1992-10-20 1995-03-14 Fujitsu General Limited Compact power module with a heat spreader
US5920119A (en) * 1996-02-22 1999-07-06 Hitachi, Ltd. Power semiconductor module employing metal based molded case and screw fastening type terminals for high reliability
CN2640202Y (zh) * 2003-03-24 2004-09-08 乾坤科技股份有限公司 高密度功率电源模块封装结构
CN2696284Y (zh) * 2003-03-24 2005-04-27 乾坤科技股份有限公司 高密度功率电源模块封装结构
CN102159054A (zh) * 2010-02-12 2011-08-17 乾坤科技股份有限公司 电子封装结构

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