CN106684040A - Low-capacitance and low-residual voltage transient voltage suppressor diode device and manufacturing method thereof - Google Patents
Low-capacitance and low-residual voltage transient voltage suppressor diode device and manufacturing method thereof Download PDFInfo
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- CN106684040A CN106684040A CN201710023829.7A CN201710023829A CN106684040A CN 106684040 A CN106684040 A CN 106684040A CN 201710023829 A CN201710023829 A CN 201710023829A CN 106684040 A CN106684040 A CN 106684040A
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- 230000001052 transient effect Effects 0.000 title claims abstract description 31
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 10
- 238000002347 injection Methods 0.000 claims abstract description 25
- 239000007924 injection Substances 0.000 claims abstract description 25
- 239000000758 substrate Substances 0.000 claims abstract description 7
- 229920002120 photoresistant polymer Polymers 0.000 claims description 25
- -1 phosphonium ion Chemical class 0.000 claims description 24
- 229910052796 boron Inorganic materials 0.000 claims description 12
- 238000000034 method Methods 0.000 claims description 11
- 238000001259 photo etching Methods 0.000 claims description 10
- 150000002500 ions Chemical class 0.000 claims description 7
- 230000000873 masking effect Effects 0.000 claims description 7
- 238000000137 annealing Methods 0.000 claims description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 4
- 229910052710 silicon Inorganic materials 0.000 claims description 4
- 239000010703 silicon Substances 0.000 claims description 4
- 239000000356 contaminant Substances 0.000 claims description 3
- 230000008020 evaporation Effects 0.000 claims description 3
- 238000001704 evaporation Methods 0.000 claims description 3
- 239000003292 glue Substances 0.000 claims description 2
- 230000003071 parasitic effect Effects 0.000 abstract description 5
- 230000015556 catabolic process Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000002513 implantation Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 230000001629 suppression Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 238000005566 electron beam evaporation Methods 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 230000001012 protector Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/07—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
- H01L27/0744—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common without components of the field effect type
- H01L27/075—Bipolar transistors in combination with diodes, or capacitors, or resistors, e.g. lateral bipolar transistor, and vertical bipolar transistor and resistor
- H01L27/0755—Vertical bipolar transistor in combination with diodes, or capacitors, or resistors
- H01L27/0761—Vertical bipolar transistor in combination with diodes only
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8222—Bipolar technology
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
The invention discloses a low-capacitance and low-residual voltage transient voltage suppressor diode device and a manufacturing method thereof. The low-capacitance and low-residual voltage transient voltage suppressor diode device comprises an ohmic positive electrode contact region, an N+ substrate region, an N- epitaxial layer, a P base region, a P+ trigger region, an N+ emitter region and an ohmic negative electrode contact region which are sequentially arranged from bottom to top, wherein the P+ trigger region is located at the upper part of the P base region; and N+ injection regions are located inside the P+ trigger region and at two sides of the P+ trigger region. The structure of a traditional transient voltage suppressor (TVS) diode device is improved into a novel structure of combining a transverse avalanche TVS diode and a vertical bipolar transistor, so that the surge residual voltage and the parasitic capacitance of the TVS device are obviously reduced under the same working conditions.
Description
Technical field
The present invention relates to microelectronics technology, and in particular to one kind is low to hold low residual voltage transient voltage suppressor diode device
And its manufacture method.
Background technology
TVS（Transient Voltage Suppressor）, i.e. Transient Voltage Suppressor is a kind of for absorbing ESD
The solid-state element that energy, protection system are damaged from ESD/Surge.It is typically employed in by the prime of protection load, protects voltage
Slightly above by the rated voltage of protection load.Nowadays over-voltage protector has been widely applied to industry control, security protection interface, communication etc.
Field.With the development of IC, the requirement to this kind of protection device is increasingly strict, and the residual voltage of wherein TVS pipe is increasingly becoming one
More crucial index, this is because the diminution of process causes the running voltage and voltage endurance capability of integrated circuit more and more weaker,
Many master control IC are burned because prime protection device residual voltage is too high, and low residual voltage can then make product when lightning surge is born
There is fast response speed and the protective capability strong to rear class chip.
For the system of 5V running voltages, the operation voltage of protection device typically between 6.5-8V, and for Ethernet
Main control chip is most of at present all to be made using below 90nm techniques, and voltage endurance capability has been reduced to 8V or so, also just says either
Surge type or ESD type protection devices, will make it that protection well is played between 6.5V-8V and use, and its motional impedance is non-
It is often low to meet, and most low capacitor elements at present are difficult to accomplish.
Traditional back-biased avalanche breakdown TVS diode, with quick response time, its output characteristics does not turn
Folding characteristic, processing technology is simple.However, under high current, because the lightly doped district and avalanche diode of its higher electric resistivity lack
Few conductivity modulation effect, causes its residual voltage higher, is unfavorable for application.
Due to above reason, how the TVS device for developing the low residual voltage of low electric capacity using new device structure has become ability
The current problem demanding prompt solution of field technique personnel.
The content of the invention
It is an object of the present invention to provide it is a kind of it is low hold low residual voltage transient voltage suppressor diode device, with more can be bright
Show the surge residual voltage and parasitic capacitance under reducing TVS device in working order.
Low hold low residual voltage transient voltage suppressor diode device manufacturing method it is a further object of the present invention to provide described
Method.
In order to solve above-mentioned technical problem, the technical solution adopted in the present invention is to provide a kind of low residual voltage transient state electricity of low appearance
Diode component processed is constrained, including the ohmic positive electrode contact area, the N that set gradually from bottom to top+Substrate zone, N-Epitaxial layer, P bases
Area, P+Trigger region, N+Injection region, ohm negative electrode contact area, the P+The trigger region of type is located at P bases top, the N+Injection
Area is located at P+Trigger region inside and both sides.
It is structurally characterized in that and traditional TVS voltage suppression diodes device architecture is modified to into a horizontal snowslide TVS diode
The new structure combined with a vertical bipolar transistors, under small current, horizontal TVS diode provides quickly response triggering
And current drain path；Under high current, longitudinal npn bipolar transistor turns on and provides the path leakage current of a low-resistance,
Under identical working condition, it will be apparent that reduce the surge residual voltage and parasitic capacitance of TVS device.
On the basis of such scheme, the N+The phosphonium ion doping content of substrate zone is 1 × 1018~1×1020cm-3。
On the basis of such scheme, the N-The thickness of epitaxial layer is 5 ~ 15 μm, and its phosphonium ion doping content is 1 × 1015~
1×1017cm-3。
On the basis of such scheme, the thickness of the P bases is 2 ~ 5 μm, and its boron ion doping content is 1 × 1015~1×
1017cm-3。
On the basis of such scheme, the P+The thickness of trigger region is 0.5 ~ 2 μm, and its boron ion doping content is 1 × 1017
~1×1020cm-3。
On the basis of such scheme, the N+The thickness of injection region is 0.5 ~ 2 μm, and its phosphonium ion doping content is 1 × 1017
~1×1020cm-3。
The present invention also provides the low manufacture method for holding low residual voltage transient voltage suppressor diode device, including following step
Suddenly：
Firstth, a piece of N+N is taken-The silicon epitaxial wafer of type is cleaned as print to it, to remove surface contaminant；
Secondth, in one layer of photoresist of print surface-coated and photoetching is carried out, at middle part window is formed, entered by masking layer of photoresist
Row ion implanting, in the region injection boron ion, forms P bases；
3rd, photoresist is removed, and carries out the annealing of P bases；
4th, one layer of photoresist is coated again on print surface and carry out photoetching, window is formed with position in P bases, with photoetching
Glue carries out ion implanting for masking layer, in the region injection boron ion, forms P+Trigger region；
5th, photoresist is removed, and carries out P+Trigger region is annealed；
6th, one layer of photoresist being coated again on print surface and carrying out photoetching, at the middle part and the left and right sides of P bases window is formed
Mouthful, ion implanting is carried out by masking layer of photoresist, in the region injection phosphonium ion, form N+Injection region；
7th, except photoresist, and N is carried out+Anneal injection region；
8th, print surface is carried out being lithographically formed contact hole；
9th, surface evaporation Al and anneal and etch to form electrode；
So far, a kind of low residual voltage transient voltage suppressor diode element manufacturing of low appearance is completed.
Compared with prior art, one kind proposed by the present invention it is low hold low residual voltage transient voltage suppressor diode device have with
Lower advantage：
1. under small current, horizontal TVS diode provides quickly response triggering and current drain path；Under high current, longitudinal direction
Npn bipolar transistor turns on and provides the path leakage current of a low-resistance；
2. under identical working condition, it will be apparent that reduce the surge residual voltage and parasitic capacitance of TVS device；
3. preparation method of the present invention, compatible with existing Si bipolar process, and manufacture method is easy, is adapted to industrialization and gives birth on a large scale
Produce.
Description of the drawings
The structural representation of the low residual voltage transient voltage suppressor diode device of low appearance that Fig. 1 is provided for the present invention；
The equivalent circuit diagram of the low residual voltage transient voltage suppressor diode device of low appearance that Fig. 2 is provided for the present invention；
The low residual voltage transient voltage suppressor diode device of low appearance and the avalanche breakdown transient state of traditional structure that Fig. 3 is provided for the present invention
The TLP curve comparison figures of voltage suppression diode device；
The manufacture method flow chart of the low residual voltage transient voltage suppressor diode device of low appearance that Fig. 4 is provided for the present invention.
Specific embodiment
In order to realize device of the present invention, with reference to Fig. 1 and Fig. 4 following examples are provided.
As shown in figure 1, one kind is low to hold low residual voltage transient voltage suppressor diode device, including what is set gradually from bottom to top
Ohmic positive electrode contact area, N+Substrate zone, N-Epitaxial layer, P bases, P+Trigger region, N+Injection region, ohm negative electrode contact area, institute
State P+The trigger region of type is located at P bases top, the N+Injection region is located at P+Trigger region inside and both sides.
As shown in figure 4, making in the steps below：
Step one：Take a piece of N+N-The silicon epitaxial wafer of type, cleans to it, to remove surface contaminant, the N+N-The silicon of type
Epitaxial wafer, N+The phosphonium ion doping content of substrate zone is 1 × 1018~1×1020cm-3。N-The thickness of epitaxial layer is 5 ~ 15 μm, its phosphorus
Ion doping concentration is 1 × 1015~1×1017cm-3。
Step 2：In one layer of photoresist of print surface-coated and photoetching is carried out, at middle part window is formed, with photoresist to cover
Layer is covered, boron ion injection is carried out, the dosage of boron ion is 5.0e14, and Implantation Energy is 80keV, forms P bases.
Step 3：Remove photoresist and carry out the annealing of P bases.
Step 4：Print surface after annealing coats one layer of photoresist again, and window is formed with position in P bases, with
Photoresist is masking layer, carries out boron ion injection, and the dosage of boron ion is：1.0e16, Implantation Energy is 70keV, forms P+Touch
Send out area.
Step 5：Photoresist is removed, and carries out P+Trigger region is annealed；
Step 6：Print surface after annealing coats one layer of photoresist and carries out photoetching again, at the middle part and left and right of P bases
Both sides form window, and ion implanting is carried out to shelter with photoresist, and in the injection region phosphonium ion is injected, and the dosage of phosphonium ion is
1.0e16, Implantation Energy is 70keV, forms N+Injection region.
Step 7：Photoresist is removed, and carries out N+Anneal injection region so that P+Trigger region and N+Injection region forms horizontal
TVS diode.
Step 8：Print surface is carried out to be lithographically formed contact hole.
Step 9：On print surface, to adopt electron beam evaporation a layer thickness be 2 μm of metal Al used as electrode material, electronics
During beam evaporation, reaction cavity air pressure is 1.0 × 10-7Pa, and deposition rate is 40/s.Then metal Al is carried out annealing and light
Carve, form electrode, a kind of low residual voltage transient voltage suppressor diode device of low appearance is obtained.
If Fig. 2 is the equivalent circuit diagram of the low residual voltage transient voltage suppressor diode device of low appearance for providing of the invention, this
It is bright to become the new structure that a horizontal snowslide TVS diode and a vertical bipolar transistors are combined, under small current, laterally
TVS diode provides quickly response triggering and current drain path；Under high current, longitudinal npn bipolar transistor is turned on and carried
For the path leakage current of a low-resistance.
The avalanche breakdown of the low residual voltage transient voltage suppressor diode device of low appearance and traditional structure that Fig. 3 is provided for the present invention
Shown in the TLP curve comparison figures of transient voltage suppressor diode device, of the invention and traditional structure ratio, response is rapid, identical
Working condition under, it will be apparent that reduce the surge residual voltage and parasitic capacitance of TVS device.
The present invention is not limited to above-mentioned preferred forms, and anyone should learn the knot made under the enlightenment of the present invention
Structure change, it is every with of the invention with same or like technical scheme, each fall within protection scope of the present invention.
Claims (7)
1. a kind of low residual voltage transient voltage suppressor diode device of low appearance, connects including the ohmic positive electrode for setting gradually from bottom to top
Tactile area, N+Substrate zone, N-Epitaxial layer, P bases, P+Trigger region, N+Injection region, ohm negative electrode contact area, the P+The triggering of type
Area is located at P bases top, the N+Injection region is located at P+Trigger region inside and both sides.
2. one kind as claimed in claim 1 is low holds low residual voltage transient voltage suppressor diode device, it is characterised in that the N+
The phosphonium ion doping content of substrate zone is 1 × 1018~1×1020cm-3。
3. one kind as claimed in claim 1 is low holds low residual voltage transient voltage suppressor diode device, it is characterised in that the N-
The thickness of epitaxial layer is 5 ~ 15 μm, and its phosphonium ion doping content is 1 × 1015~1×1017cm-3。
4. one kind as claimed in claim 1 is low holds low residual voltage transient voltage suppressor diode device, it is characterised in that the P
The thickness of base is 2 ~ 5 μm, and its boron ion doping content is 1 × 1015~1×1017cm-3。
5. one kind as claimed in claim 1 is low holds low residual voltage transient voltage suppressor diode device, it is characterised in that the P+
The thickness of trigger region is 0.5 ~ 2 μm, and its boron ion doping content is 1 × 1017~1×1020cm-3。
6. one kind as claimed in claim 1 is low holds low residual voltage transient voltage suppressor diode device, it is characterised in that the N+
The thickness of injection region is 0.5 ~ 2 μm, and its phosphonium ion doping content is 1 × 1017~1×1020cm-3。
7. the low manufacture method for holding low residual voltage transient voltage suppressor diode device of kind according to claim 1 to 6, including
Following steps：
Firstth, a piece of N+N is taken-The silicon epitaxial wafer of type is cleaned as print to it, to remove surface contaminant；
Secondth, in one layer of photoresist of print surface-coated and photoetching is carried out, at middle part window is formed, entered by masking layer of photoresist
Row ion implanting, in the region injection boron ion, forms P bases；
3rd, photoresist is removed, and carries out the annealing of P bases；
4th, one layer of photoresist is coated again on print surface and carry out photoetching, window is formed with position in P bases, with photoetching
Glue carries out ion implanting for masking layer, in the region injection boron ion, forms P+Trigger region；
5th, photoresist is removed, and carries out P+Trigger region is annealed；
6th, one layer of photoresist being coated again on print surface and carrying out photoetching, at the middle part and the left and right sides of P bases window is formed
Mouthful, ion implanting is carried out by masking layer of photoresist, in the region injection phosphonium ion, form N+Injection region；
7th, except photoresist, and N is carried out+Anneal injection region；
8th, print surface is carried out being lithographically formed contact hole；
9th, surface evaporation Al and anneal and etch to form electrode, finished product.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710023829.7A CN106684040A (en) | 2017-01-13 | 2017-01-13 | Low-capacitance and low-residual voltage transient voltage suppressor diode device and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710023829.7A CN106684040A (en) | 2017-01-13 | 2017-01-13 | Low-capacitance and low-residual voltage transient voltage suppressor diode device and manufacturing method thereof |
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| Publication Number | Publication Date |
|---|---|
| CN106684040A true CN106684040A (en) | 2017-05-17 |
Family
ID=58858965
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|---|---|---|---|
| CN201710023829.7A Pending CN106684040A (en) | 2017-01-13 | 2017-01-13 | Low-capacitance and low-residual voltage transient voltage suppressor diode device and manufacturing method thereof |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107833834A (en) * | 2017-09-29 | 2018-03-23 | 天水天光半导体有限责任公司 | A kind of manufacture method of transient voltage suppression diode chip |
| CN107919355A (en) * | 2017-08-14 | 2018-04-17 | 上海领矽半导体有限公司 | Ultra-low residual pressure is low to hold Transient Voltage Suppressor and its manufacture method |
| CN111180336A (en) * | 2019-12-30 | 2020-05-19 | 上海芯导电子科技有限公司 | Low residual voltage surge protection device and manufacturing method thereof |
| CN113764404A (en) * | 2021-09-22 | 2021-12-07 | 成都吉莱芯科技有限公司 | Low-capacitance low-residual-voltage bidirectional ESD (electro-static discharge) protection device and manufacturing method thereof |
| CN114038902A (en) * | 2021-12-01 | 2022-02-11 | 上海镓芯科技有限公司 | Transient voltage suppression diode of thin film type semiconductor |
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| CN101536189A (en) * | 2006-11-16 | 2009-09-16 | 万国半导体股份有限公司 | Circuit configuration and manufacturing processes for vertical transient voltage suppressor (tvs) and emi filter |
| CN101930974A (en) * | 2009-06-17 | 2010-12-29 | 万国半导体股份有限公司 | Bottom source nmos triggered zener clamp for configuring an ultra-low voltage transient voltage suppressor (tvs) |
| US20130334665A1 (en) * | 2012-06-18 | 2013-12-19 | Fuji Electric Co., Ltd. | Semiconductor device |
| CN206401295U (en) * | 2017-01-13 | 2017-08-11 | 上海长园维安微电子有限公司 | A kind of low low residual voltage transient voltage suppressor diode device of appearance |
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2017
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| CN101536189A (en) * | 2006-11-16 | 2009-09-16 | 万国半导体股份有限公司 | Circuit configuration and manufacturing processes for vertical transient voltage suppressor (tvs) and emi filter |
| CN101930974A (en) * | 2009-06-17 | 2010-12-29 | 万国半导体股份有限公司 | Bottom source nmos triggered zener clamp for configuring an ultra-low voltage transient voltage suppressor (tvs) |
| US20130334665A1 (en) * | 2012-06-18 | 2013-12-19 | Fuji Electric Co., Ltd. | Semiconductor device |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107919355A (en) * | 2017-08-14 | 2018-04-17 | 上海领矽半导体有限公司 | Ultra-low residual pressure is low to hold Transient Voltage Suppressor and its manufacture method |
| CN107919355B (en) * | 2017-08-14 | 2023-09-19 | 上海领矽半导体有限公司 | Ultralow-residual-voltage low-capacity transient voltage suppressor and manufacturing method thereof |
| CN107833834A (en) * | 2017-09-29 | 2018-03-23 | 天水天光半导体有限责任公司 | A kind of manufacture method of transient voltage suppression diode chip |
| CN111180336A (en) * | 2019-12-30 | 2020-05-19 | 上海芯导电子科技有限公司 | Low residual voltage surge protection device and manufacturing method thereof |
| CN113764404A (en) * | 2021-09-22 | 2021-12-07 | 成都吉莱芯科技有限公司 | Low-capacitance low-residual-voltage bidirectional ESD (electro-static discharge) protection device and manufacturing method thereof |
| CN113764404B (en) * | 2021-09-22 | 2024-06-04 | 江苏吉莱微电子股份有限公司 | Low-capacitance low-residual voltage bidirectional ESD protection device and manufacturing method thereof |
| CN114038902A (en) * | 2021-12-01 | 2022-02-11 | 上海镓芯科技有限公司 | Transient voltage suppression diode of thin film type semiconductor |
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| CB02 | Change of applicant information | ||
| CB02 | Change of applicant information |
Address after: Seven road 201202 Shanghai Pudong New Area Shiwan No. 1001 Applicant after: Shanghai Wei'an Semiconductor Co.,Ltd. Address before: Seven road 201202 Shanghai Pudong New Area Shiwan No. 1001 Applicant before: SHANGHAI CHANGYUAN WAYON MICROELECTRONICS Co.,Ltd. |
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| WD01 | Invention patent application deemed withdrawn after publication | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20170517 |