CN106652888B - LED display screen and scanning control circuit thereof - Google Patents
LED display screen and scanning control circuit thereof Download PDFInfo
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- CN106652888B CN106652888B CN201611067358.1A CN201611067358A CN106652888B CN 106652888 B CN106652888 B CN 106652888B CN 201611067358 A CN201611067358 A CN 201611067358A CN 106652888 B CN106652888 B CN 106652888B
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- 238000010586 diagram Methods 0.000 description 8
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- 238000012544 monitoring process Methods 0.000 description 1
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Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
- Y02B20/40—Control techniques providing energy savings, e.g. smart controller or presence detection
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of El Displays (AREA)
Abstract
The invention belongs to the technical field of LED display, and provides an LED display screen and a scanning control circuit thereof. According to the invention, the LED scanning control circuit comprising a plurality of cascaded at least one shift register, a plurality of column scanning control chips and an LED display array is adopted, so that the shift register samples serial input data according to clock signals and outputs a plurality of sampling signals to the LED display array so as to gate row channels corresponding to the sampling signals in the LED display array, the column scanning control chip outputs column scanning control signals to the LED display array so as to gate column channels corresponding to the column scanning control signals in the LED display array, LED scanning control is realized, and the input signals of the LED scanning control circuit are simple, PCB wiring is simple and line-to-line interference is low, therefore, the display quality of the LED display screen can be effectively improved, and the problem that the display quality of the traditional LED display screen is reduced due to high input signal complexity, PCB wiring complexity and line-to-line interference is high is solved.
Description
Technical Field
The invention belongs to the technical field of LED display, and particularly relates to an LED display screen and a scanning control circuit thereof.
Background
The LED display screen has the advantages of high brightness, low working voltage, small power consumption, large size, long service life, impact resistance, stable performance and the like, and is widely applied to advertising in different outdoor places such as stadiums, commercial applications, banks, tickets, postal service, wharfs, shopping malls, stations, postal service, telecommunication service, institutions, monitoring, schools, restaurants, hotels, entertainment and the like.
As shown in fig. 1, the existing LED display screen mainly adopts a three-eight decoder, a row scanning control chip and a column channel constant current control chip to perform LED display control. The three-eight decoder outputs scanning signals to the row scanning control chip according to the input signals, so that the row scanning control chip outputs row scanning control signals to the LED display array according to the scanning signals, and the three-eight decoder and the column channel constant current control chip control the display of the LED display screen. However, the existing LED display screen needs to add a tri-eight decoder between the line scan control chip and the input signal, and the tri-eight decoder needs multiple signal input ends and output ends, so the tri-eight decoder increases the complexity of the input signal, the complexity of the printed circuit board (Printed Circuit Board, PCB) wiring and the inter-line interference of the existing LED display screen, thereby reducing the image quality of the existing LED display screen.
In summary, the conventional LED display screen has the problem of reduced display quality due to high input signal complexity, complicated PCB wiring, and strong line-to-line interference.
Disclosure of Invention
The invention aims to provide an LED display screen and a scanning control circuit thereof, aiming at solving the problem that the display quality of the traditional LED display screen is reduced due to high complexity of input signals, complex PCB wiring and strong line-to-line interference.
The invention is realized in such a way, an LED scanning control circuit comprises a plurality of column scanning control chips and an LED display array, wherein a plurality of output ends of the column scanning control chips are correspondingly connected with a plurality of column channels of the LED display array one by one and are used for outputting column scanning control signals to the LED display array so as to gate the column channels corresponding to the column scanning control signals in the LED display array, and the LED scanning control circuit further comprises at least one shift register in cascade connection;
the shift register comprises a serial signal input end, a serial signal gating end, a serial signal output end and a plurality of data output ends; the serial signal input end receives serial input data, the serial signal strobe end receives a clock signal, the serial signal output end is used for cascading among the shift registers and outputting the serial input data, and a plurality of data output ends are correspondingly connected with one of a plurality of row channels of the LED display array;
the shift register outputs a plurality of sampling signals to the LED display array after sampling the sequence input data according to the clock signal so as to gate a row channel corresponding to the sampling signals in the LED display array, and the shift register outputs the sequence input data according to the clock signal.
Still another object of the present invention is to provide an LED display screen, which includes the LED display screen control circuit described above.
According to the invention, the LED scanning control circuit comprising a plurality of cascaded shift registers, a plurality of column scanning control chips and an LED display array is adopted, so that the shift registers sample serial input data according to clock signals and then output a plurality of sampling signals to the LED display array, so as to gate row channels corresponding to the sampling signals in the LED display array, the column scanning control chips output column scanning control signals to the LED display array, so that the column channels corresponding to the column scanning control signals in the LED display array are gated, LED scanning control is realized, the LED scanning control circuit can realize LED row scanning control only by the cascaded shift registers, the input signals are simple, the PCB wiring is simple, and the line-to-line interference is low, thereby improving the display quality of the LED display screen, and solving the problem that the existing LED display screen has reduced display quality due to high input signal complexity, complicated PCB wiring and strong line-to-line interference.
Drawings
Fig. 1 is a schematic circuit diagram of a conventional LED scan control circuit;
FIG. 2 is a schematic block diagram of an LED scan control circuit according to an embodiment of the present invention;
FIG. 3 is a schematic circuit diagram of a shift register in an LED scan control circuit according to an embodiment of the present invention;
fig. 4 is a schematic block diagram of an LED scan control circuit according to another embodiment of the present invention;
fig. 5 is a schematic block diagram of an LED scan control circuit according to another embodiment of the present invention;
fig. 6 is a circuit configuration diagram of a second driving module in the LED scan control circuit shown in fig. 5;
fig. 7 is a schematic timing diagram of an LED scan control circuit according to an embodiment of the invention.
Detailed Description
The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
The implementation of the invention is described in detail below with reference to the specific drawings:
fig. 2 shows a block structure of an LED scan control circuit according to an embodiment of the present invention, and for convenience of explanation, only the portions related to the embodiment of the present invention are shown in detail as follows:
as shown in fig. 2, the LED scan control circuit 10 according to the embodiment of the present invention includes a plurality of column control chips 100 (only one is shown in the figure) and an LED display array 101. The output ends of the column scanning control chip 100 are connected to the column channels of the LED display array 101 in a one-to-one correspondence manner, and are used for outputting a column scanning control signal to the LED display array 101 so as to gate the column channels of the LED display array 100 corresponding to the column scanning control signal.
Further, as shown in fig. 2, the LED scan control circuit 10 provided in the embodiment of the present invention further includes at least one shift register 102 in cascade connection.
The shift register 102 includes a serial signal input terminal, a serial signal gate terminal, a serial signal output terminal, and a plurality of data output terminals.
Specifically, the serial signal input terminal DIN receives serial input data, the serial signal gate terminal C receives a clock signal, the serial signal output terminal DOUT is used for cascading between the shift registers 102, and outputs serial input data, and the plurality of data output terminals OU1-OUTn are correspondingly connected to one of the plurality of row channels of the LED display array 101.
The shift register 102 samples the serial input data according to the clock signal and outputs a plurality of sampling signals to the LED display array 101 to gate a row channel corresponding to the sampling signals in the LED display array 101, and the shift register 102 outputs the serial input data according to the clock signal.
Further, the serial signal input terminal DIN of the first shift register 102 receives serial input data, and the serial signal select switch C of each shift register 102 receives a clock signal, the serial signal output terminal DOUT of the first shift register 102 is connected to the serial signal input terminal DIN of the second shift register 102, the serial signal output terminal DOUT of the second shift register 102 is connected to the serial signal input terminal DIN of the third shift register 102, and so on, the serial signal input terminal DIN of the last shift register 102 of the plurality of shift registers 102 is connected to the serial signal output terminal DOUT of the next-to-last shift register 102, thereby realizing cascading of the plurality of shift registers 102, and the plurality of data output terminals OU1-OUTn of each shift register 102 are connected in one-to-one correspondence to the plurality of row channels of the LED display array 101.
The serial input data is sent to the first shift register 102 by the front-end circuit through the data bus, and the clock signals are all sent to the plurality of shift registers 102 by the front-end circuit through the data bus. After the first shift register 102 receives the sequence input data, the clock signal samples the sequence input data, and outputs a plurality of sampling signals to a plurality of row channels of the LED display array 101 through a plurality of data output terminals OU1-OUTn of the shift register 102, so as to realize the gating control of the row channels in the LED display array 101; in addition, after the first shift register 102 finishes sampling the received serial input data, the first shift register 102 sequentially shifts the serial input data to the second shift register 102 through the serial signal output end DOUT thereof under the action of a clock signal, so that the second shift register 102 starts sampling under the action of the clock signal and outputs a plurality of sampling signals to a plurality of row channels of the LED display array 101, after the second shift register 102 finishes sampling the received serial input data, the second shift register 102 sequentially shifts the serial input data to the third shift register 102 through the serial signal output end DOUT thereof under the action of the clock signal, so that the third shift register 102 starts sampling under the action of the clock signal and outputs a plurality of sampling signals to the plurality of row channels of the LED display array 101, and so on.
It should be noted that, the process of sampling the received serial input data by the shift register 102 under the action of the clock signal is as follows: when the clock signal is at a high level, the shift register 102 samples the serial input data received at the serial signal input terminal DIN thereof, and when the clock signal is at a low level, the shift register 102 outputs a sampling result, i.e., a sampling signal, to the LED display array 101.
After the first shift register 102 finishes sampling the received sequence input data, the first shift register 102 sequentially shifts the sequence input data to the next cascade shift register 102, namely, the second shift register 102 under the action of the clock signal, so that the second shift register 102 samples the received sequence input data under the action of the clock signal, and the like, and after the last shift register 102 finishes sampling the received sequence input data, the last shift register 102 sequentially shifts the sequence input data to the last shift register 102 through the serial signal output end DOUT under the action of the clock signal, so that the last shift register 102 samples the received sequence input data under the action of the clock signal; it should be noted that the process of sampling the sequence input data by each shift register 102 according to the clock signal is the same, and the principle of sampling the sequence input data by the first shift register 102 according to the clock signal is specifically referred to, which is not described herein.
In addition, the column scanning control chip 100 in the LED scanning control circuit 10 provided by the embodiment of the present invention is implemented by a column channel constant current control chip, which performs gate control of a column channel on the LED display array 101, and is the same as a column channel gate method of an existing LED display screen, and specific reference may be made to the column gate method of the existing LED display screen, which is not described herein again; the LED display array 101 in the LED scan control circuit 10 provided in the embodiment of the present invention is the same as the LED display array in the existing LED display screen, and is composed of a plurality of rows and a plurality of columns of light emitting diodes, which will not be described in detail here.
In this embodiment, the shift register 102 is used to read the serial input data, and then samples the serial input data according to the clock signal, so as to output a sampling signal to the LED display array 101, thereby implementing the scanning control of the LED display screen, omitting the conventional three-eight decoder, reducing the complexity of the input signal of the LED display screen, the complexity of the PCB wiring and the strong interference between wires, which are caused by the three-eight decoder, and improving the image efficiency of the LED display screen.
In addition, the cascade connection of at least one shift register 102 is adopted to realize the row channel gating control of the LED display array 101, so that the LED scanning control circuit 10 provided by the embodiment of the invention can be used for scanning LED display screens with different sizes.
Further, as a preferred embodiment of the present invention, as shown in fig. 3, the shift register 102 is mainly composed of a plurality of flip-flops FF1-FFn and a buffer 102 a. The clock signal terminals C of the plurality of flip-flops FF1-FFn constitute the serial signal gate terminal C of the shift register 102, and receive the clock signal, the signal input terminal D of the first flip-flop FF1 is the serial signal input terminal DIN of the shift register 102, the output terminal Q of the plurality of flip-flops FF1-FFn is the plurality of data output terminals OU1-OUTn of the shift register 102, the output terminal Q of the first flip-flop FF1 is connected to the signal input terminal D of the second flip-flop FF2, the output terminal Q of the second flip-flop FF2 is connected to the signal input terminal D of the third flip-flop FF3, and so on, the signal output terminal Q of the n-1 flip-flop FFn is connected to the signal input terminal D of the n-th flip-flop FFn, the output terminal Q of the n-th flip-flop FFn is connected to the input terminal of the buffer 102a, and the output terminal of the buffer is the signal output terminal DOUT of the shift register 102.
Further, as a preferred embodiment of the present invention, as shown in fig. 4, the LED scan control circuit 10 provided in the embodiment of the present invention further includes a plurality of first driving modules A1-An.
The input ends of the first driving modules A1-An are connected with the data output ends OU1-OUTn of the shift register 102 in a one-to-one correspondence manner, and the output ends of the first driving modules A1-An are connected with the row channels of the LED display array 101 in a one-to-one correspondence manner.
Specifically, the plurality of first driving modules A1-An receive the sampling signals, and output the sampling signals to the LED display array 101 after driving the sampling signals.
Further, as a preferred embodiment of the present invention, the plurality of first driving modules A1-An may be implemented by using flip-flops.
In the embodiment of the invention, the driving capability of the signals output to the LED display array 101 is improved by adding a plurality of first driving modules A1-An in the LED scanning control circuit 10, so that the display picture of the LED display screen is smoother and the image quality is better.
Further, as a preferred embodiment of the present invention, as shown in fig. 5, the LED scan control circuit 10 provided in the embodiment of the present invention further includes a plurality of second driving modules B1-Bn.
The first input ends of the second driving modules B1-Bn all receive output enabling control signals, the second input ends of the second driving modules B1-Bn are in one-to-one correspondence with the data output ends OUT1-OUTn of the shift register 102, and the output ends of the second driving modules B1-Bn are in one-to-one correspondence with the row channels of the LED display array 101.
Specifically, the plurality of second driving modules B1-Bn receive the sampling signals and the output enable control signals, and output scanning signals to the LED display array according to the sampling signals and the output enable control signals, so as to gate row channels corresponding to the scanning signals in the LED display array 101.
Further, as a preferred embodiment of the present invention, as shown in FIG. 6, the plurality of second driving modules B1-Bn includes a first buffer buf1, a Delay, a second buffer buf2, a first switching element M1 and a second switching element M2
The first input end of the first buffer buf1 is the first input end of the second driving module B1-Bn, the second input end of the first buffer buf1 receives the working voltage VDD and is connected with the input end of the first switching element M1, the output end of the first buffer buf1 is connected with the control end of the first switching element M1, the output end of the first switching element M1 and the input end of the second switching element M2 are commonly connected to form the output ends of the plurality of second driving modules B1-Bn, the first input end of the Delay unit Delay is the second input end of the plurality of second driving modules B1-Bn, the second input end of the Delay unit and the second input end of the second buffer buf2 both receive the working voltage, the output end of the Delay unit is connected with the first input end of the second buffer buf2, the output end of the second buffer buf2 is connected with the control end of the second switching element M2, and the output end of the second switching element M2 is grounded.
It should be noted that, in the embodiment of the present invention, the Delay includes, but is not limited to, an inverter, a buffer, and the like.
In addition, the first switching element M1 is a PMOS transistor, the gate of the PMOS transistor is the control end of the first switching element M1, the source of the PMOS transistor is the input end of the first switching element M1, and the drain of the PMOS transistor is the output end of the first switching element M1; the second switching element M2 is an NMOS transistor, the gate of the NMOS transistor is the control end of the second switching element M2, the drain of the NMOS transistor is the input end of the second switching element M2, and the source of the NMOS transistor is the output end of the second switching element M2.
It should be noted that, in other embodiments, the first switching element M1 and the second switching element M2 may be implemented by transistors, for example, when the first switching element is a PNP-type transistor, the base of the PNP-type transistor is the control terminal of the first switching element M1, the collector of the PNP-type transistor is the output terminal of the first switching element M1, and the emitter of the PNP-type transistor is the input terminal of the first switching element M1; when the second switching element M2 is an NPN transistor, the base of the NPN transistor is the control terminal of the second switching element M2, the collector of the NPN transistor is the input terminal of the second switching element M2, and the emitter of the NPN transistor is the output terminal of the second switching element M2.
In the embodiment of the invention, a plurality of second driving modules B1-Bn are added in the LED scanning control circuit 10, so that the driving capability of signals output to the LED display array 101 is improved, and the display picture of the LED display screen is smoother, and the image quality is better.
The following specifically describes the operation principle of the LED scan control circuit 10 according to the embodiment of the present invention, taking the module structure of the LED scan control circuit 10 shown in fig. 2, the circuit structure of the shift register in the LED scan control circuit 10 shown in fig. 3, and the timing schematic diagram shown in fig. 7 as an example, which is described in detail below:
referring to fig. 3 and fig. 7, the process of sampling the serial input data received by the serial input terminal DIN by the shift register 102 is specifically:
when the high level of the first period of the clock signal is on the fly, the first flip-flop FF1 samples the received serial input data by the high level of the clock signal, and outputs the sampled first sampling signal to the first row channel of the LED display array 101 through the data output terminal OUT1 thereof to gate the first row channel of the LED display array 101 while transmitting the serial input data to the second flip-flop FF2 at the low level of the first period of the clock signal; when the high level of the second period of the clock signal is on the fly, the second flip-flop FF2 samples the received serial input data by the high level of the clock signal, and outputs the sampled second sampling signal to the second row channel of the LED display array 101 through the data output terminal OUT2 thereof at the low level of the second period of the clock signal to gate the second row channel of the LED display array 101 while transmitting the serial input data to the third flip-flop FF3; when the high level of the third period of the clock signal is on the fly, the third flip-flop FF3 samples the received serial input data by the high level of the clock signal, and outputs the sampled third sampling signal to the third row channel of the LED display array 101 through the data output terminal OUT3 thereof at the low level of the third period of the clock signal to gate the third row channel of the LED display array 101 while transmitting the serial input data to the second flip-flop FF2; similarly, when the clock signal is temporarily high in the nth period, the nth flip-flop FFn samples the received sequential input data by the high level of the clock signal, and outputs the sampled nth sampling signal to the nth row channel of the LED display array 101 through the data output terminal OUTn thereof when the clock signal is low in the nth period, so as to gate the nth row channel of the LED display array 101, thereby realizing progressive scanning of the LED display array 101, and the nth flip-flop FFn simultaneously inputs the sequential input data into the data transfer buffer 102 a.
Further, please refer to fig. 2, 3 and 7 simultaneously, after n periods of the clock signal are completed and the high level of the n+1th clock period is reached, the buffer 102a outputs the sequence input data to the first flip-flop FF1 of the next cascaded shift register 102, so that the plurality of flip-flops of the cascaded shift register 102 start to sample the sequence input data, and the sampling process is the same as the sampling process of the plurality of flip-flops in the previous shift register 102 during n periods before the clock signal for the sequence input data according to the clock signal, which is not repeated here; after the n more periods of the clock signal are completed, and the high level of the first period of the next n periods of the clock signal is temporary, the shift register 102 transfers the serial input data to the shift register 102 of the next stage through the serial signal output terminal DOUT thereof, and the process is repeated, so that the scanning control of the LED display screen is realized.
Further, the embodiment of the present invention further provides an LED display screen, which includes the LED scan control circuit 10, and since the LED display screen provided in the embodiment of the present invention is implemented based on the LED scan control circuit 10 provided in fig. 2 to 7, the principle of the LED display screen provided in the embodiment of the present invention may refer to the specific description of the scan control circuit 10 in fig. 2 to 7, and will not be repeated here.
According to the invention, the LED scanning control circuit comprising a plurality of cascaded shift registers, a plurality of column scanning control chips and an LED display array is adopted, so that the shift registers sample serial input data according to clock signals and then output a plurality of sampling signals to the LED display array, so as to gate row channels corresponding to the sampling signals in the LED display array, the column scanning control chips output column scanning control signals to the LED display array, so that the column channels corresponding to the column scanning control signals in the LED display array are gated, LED scanning control is realized, the LED scanning control circuit can realize LED row scanning control only by the cascaded shift registers, the input signals are simple, the PCB wiring is simple, and the line-to-line interference is low, thereby improving the display quality of the LED display screen, and solving the problem that the existing LED display screen has reduced display quality due to high input signal complexity, complicated PCB wiring and strong line-to-line interference.
The foregoing description of the preferred embodiments of the invention is not intended to be limiting, but rather is intended to cover all modifications, equivalents, and alternatives falling within the spirit and principles of the invention.
Claims (5)
1. The LED scanning control circuit comprises a plurality of column scanning control chips and an LED display array, wherein a plurality of output ends of the column scanning control chips are connected with a plurality of column channels of the LED display array in a one-to-one correspondence manner and are used for outputting column scanning control signals to the LED display array so as to gate the column channels corresponding to the column scanning control signals in the LED display array, and the LED scanning control circuit is characterized by further comprising at least one shift register in cascade connection;
the shift register comprises a serial signal input end, a serial signal gating end, a serial signal output end and a plurality of data output ends; the serial signal input end receives serial input data, the serial signal strobe end receives a clock signal, the serial signal output end is used for cascading among the shift registers and outputting the serial input data, and a plurality of data output ends are correspondingly connected with one of a plurality of row channels of the LED display array;
the shift register outputs a plurality of sampling signals to the LED display array after sampling the sequence input data according to the clock signal so as to gate a row channel corresponding to the sampling signals in the LED display array, and the shift register outputs the sequence input data according to the clock signal;
the LED scanning control circuit further comprises a plurality of first driving modules;
the input ends of the plurality of first driving modules are connected with the plurality of data output ends of the shift register in a one-to-one correspondence manner, and the output ends of the plurality of first driving modules are connected with the plurality of row channels of the LED display array in a one-to-one correspondence manner;
the first driving module receives the sampling signal, drives the sampling signal and outputs the sampling signal to the LED display array;
the LED scanning control circuit further comprises a plurality of second driving modules;
the first input ends of the second driving modules are respectively used for receiving output enabling control signals, the second input ends of the second driving modules are correspondingly connected with the data output ends of the shift register one by one, and the output ends of the second driving modules are correspondingly connected with the row channels of the LED display array one by one;
the second driving module receives the sampling signal and the output enabling control signal, and outputs a scanning signal to the LED display array according to the sampling signal and the output enabling control signal so as to gate a row channel corresponding to the scanning signal in the LED display array;
the plurality of second driving modules each include:
the device comprises a first buffer, a delay device, a second buffer, a first switching element and a second switching element;
the first input end of the first buffer is a plurality of first input ends of the second driving modules, the second input end of the first buffer receives working voltage and is connected with the input end of the first switching element, the output end of the first buffer is connected with the control end of the first switching element, the output end of the first switching element and the input end of the second switching element are commonly connected to form a plurality of output ends of the second driving modules, the first input end of the delay device is a plurality of second input ends of the second driving modules, the second input end of the delay device and the second input end of the second buffer all receive the working voltage, the output end of the delay device is connected with the first input end of the second buffer, the output end of the second buffer is connected with the control end of the second switching element, and the output end of the second switching element is grounded.
2. The LED scan control circuit of claim 1, wherein the first drive module is a buffer.
3. The LED scan control circuit of claim 1, wherein the first switching element is a PMOS transistor, a gate of the PMOS transistor is a control terminal of the first switching element, a source of the PMOS transistor is an input terminal of the first switching element, and a drain of the PMOS transistor is an output terminal of the first switching element.
4. The LED scan control circuit of claim 1, wherein the second switching element is an NMOS transistor, a gate of the NMOS transistor is a control terminal of the second switching element, a drain of the NMOS transistor is an input terminal of the second switching element, and a source of the NMOS transistor is an output terminal of the second switching element.
5. An LED display screen, characterized in that it comprises an LED scan control circuit according to any one of claims 1 to 4.
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| CN201611067358.1A CN106652888B (en) | 2016-11-28 | 2016-11-28 | LED display screen and scanning control circuit thereof |
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| CN110120197B (en) * | 2019-04-11 | 2024-03-08 | 深圳天源中芯半导体有限公司 | Cascade application system capable of omitting peripheral resistance and capacitance to reduce interference and implementation method thereof |
| CN111261099A (en) * | 2020-03-31 | 2020-06-09 | 四川遂宁市利普芯微电子有限公司 | Communication protocol of binary decoding line driving chip of LED display screen |
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