CN203217924U

CN203217924U - Display panel driving circuit

Info

Publication number: CN203217924U
Application number: CN2012204432049U
Authority: CN
Inventors: 柯文朴
Original assignee: GUANKE (FUJIAN) ELECTRONIC TECHNOLOGY INDUSTRIAL Co Ltd
Current assignee: GUANKE (FUJIAN) ELECTRONIC TECHNOLOGY INDUSTRIAL Co Ltd
Priority date: 2012-08-31
Filing date: 2012-08-31
Publication date: 2013-09-25
Anticipated expiration: 2022-08-31

Abstract

The utility model relates to the technical field of microelectronic display, and particularly to a silicon-based OLED display panel driving circuit. The display panel driving circuit comprises the following components: a pixel unit driving circuit matrix with first-number lines and second-number rows, a line driver circuit, a row driver circuit and an OLED light emitting layer test area. The pixel unit driving circuit matrix comprises second-number pixel unit driving circuits and one line buffer in each line direction. The line buffer is arranged between two random adjacent pixel unit driving circuits in the line direction. The line driving circuit generates a gating signal required by the pixel unit driving circuit matrix. The row driver circuit generates a data signal required by the pixel unit driving circuit matrix. According to the display panel driving circuit provided by the utility model, the line buffer is added in the pixel unit driving circuit matrix, thereby improving line driving capability and increasing pixel scanning speed. The display panel driving circuit furthermore has the following advantages: reducing layout area of the driving circuit, reducing spatial dimension of the whole machine, and reducing power consumption of the whole machine.

Description

A kind of display panel, drive circuit

Technical field

The utility model relates to microelectronics display technique field, specifically a kind of silica-based OLED display panel, drive circuit.

Background technology

(Organic Light Emitting Diode OLED) is current driving apparatus to Organic Light Emitting Diode, requires back plane circuitry that accurate, stable Current Control can be provided.What active backboard in early days adopted is that (amorphous silicon, a-Si) TFT technology still owing to the low reasons such as instability that reach threshold voltage of mobility of amorphous silicon, make its not achieving success to amorphous silicon.Compare amorphous silicon, low temperature polycrystalline silicon (Low Temperature Poly-Silicon, LTPS) mobility of TFT is much higher, but still there is the inconsistent problem of homogeneity in threshold voltage, so need carry out certain circuit compensation in the design of image element circuit, what present existing OLED display major part adopted all is LTPS TFT backplane technology.And aspect large scale OLED volume production, the manufacturing technology of LTPS is still immature, does not have unified standard production line, prepare LTPS TFT backboard and must throw huge fund construction special production line.

Silica-based OLED miniscope spare adopts monocrystalline silicon CMOS substrate technology, compare other substrate technology, monocrystalline silicon has advantages such as carrier mobility height, threshold voltage be stable, can all be integrated in picture element matrix and peripheral driving circuit etc. on the display panel, reduce volume and the cost of whole display system greatly, while mature C MOS substrate production standard process flow, the processing charges that only need pay small amount just can prepare substrate at the monocrystalline silicon CMOS of any tame standard substrate production line; What each elemental area on the silica-based oled substrate can be done simultaneously is very little, is beneficial to the raising of display resolution.In the design of monocrystalline silicon CMOS substrate chip, what mainly consider is how accurately the electric current of OLED is flow through in control, thereby realizes that good gray level image shows.Chip power-consumption is also extremely important simultaneously, shows that by the regular handset powered battery, low consumption circuit can prolong the serviceable life of battery because silica-based OLED miniscope spare also just can be used for the portable near eye.

Summary of the invention

At the deficiencies in the prior art, the utility model provides a kind of silica-based OLED display panel and driving circuit, has overcome the defective that prior art LTPS TFT backboard image element circuit exists.

For achieving the above object, the utility model supports high definition high resolving power and superelevation gray scale to show based on the driving strategy with fractal Scan Architecture, under the kind, supports 1280 * 1024 * RGB and 4096 grades of gray scales when 32bit data bit width and 100MHz transmission.Because traditional mimic channel driving method is not suitable for fractal scanning, therefore this programme adopts the digital circuit drive scheme, all row, column drive circuit works are in same clock zone, clock period 10ns, all pixel cell driving circuits must satisfy sequential relationship, finish columns in cycle according to storage at fixed clock, by the row latch signal data are latched in the row latch, by the row gating signal data are write the pixel cell driving circuit.Because number of transistors is very many on each line direction, it is bigger that the row signal drives delay, and maximum can reach ten to up to a hundred clock period, and therefore, being necessary to go up in the row direction increases the row cache device, strengthens the row driving force.Though the row cache device that increases can be introduced delay equally, but because the structure that row drives is identical, therefore the delay that increases is also identical, also increase the row buffer with pixel cell driving circuit same structure again on the row driver, the data-signal delay that is different lines is identical, thereby makes whole driving circuit reach synchronous regime.When the driving circuit Butut, consider that the adjacent two multiplexing wirings of row and trap to save the cloth image resource, reduce the driving circuit area.

The utility model is achieved through the following technical solutions: a kind of display panel, drive circuit, comprise the first quantity row, the second quantity column pixel cell driving circuit matrix, row driver circuits, column driver circuit and OLED luminescent layer test section, comprise second quantity pixel cell driving circuit and 1 row cache device on described each line direction of pixel cell driving circuit matrix, described row cache device is positioned in the middle of any two adjacent pixel unit driving circuits in the row direction; Described horizontal drive circuit produces the needed gating signal of pixel cell driving circuit matrix, and described column driver circuit produces the needed data-signal of pixel cell driving circuit matrix.

Further, described pixel cell driving circuit is made up of a memory cell and a driver element, and described memory cell comprises 5 mosfet transistors, is used for preserving the on off state of pixel; Described driver element comprises 4 PMOS pipes, is used for providing the driving pulse electric current to the OLED luminescent layer; Described pixel cell driving circuit is realized gray modulation by the accumulation of current pulse width.

Further, described row cache device is made of PMOS transistor and the nmos pass transistor of one group of symmetrical complement.

Further, the pixel cell driving circuit of neighbouring two row and row cache device are mirror image symmetric relation up and down.

Further, described column driver circuit comprises vertical transfer register, first order latch, second level latch and selects transmitter; Wherein, vision signal is under the vertical transfer register effect that seals in and go out, deposit first order latch successively in, first order latch is before reading in data, institute's deposit data is write second level latch, first order latch is when reading in data then, and second level latch writes out data by level shifter to the selection transmitter of storage signal numerical value simultaneously.

Further, described column driver circuit comprises second quantity sequential compensation buffer, is series arrangement; The structure of described sequential compensation buffer is identical with the row cache device.

The beneficial effects of the utility model are: a kind of display panel, drive circuit of the present utility model, in pixel cell driving circuit matrix, added the row cache device, and increase the row driving force, picture element scan is quicker; And adopt the pixel layout of symmetrical structure up and down, reduced the layout area of driving circuit, can reduce the size in complete machine space, reduce Overall Power Consumption; The pixel cell driving circuit adopts the PMOS pipe, accelerates the sweep circuit frequency.

Description of drawings

Fig. 1 is the structural representation of the circuit of display driving of utility model;

Fig. 2 is the synoptic diagram of pixel cell driving circuit;

Fig. 3 is the circuit theory diagrams of driver element among Fig. 2;

Fig. 4 is the column driver circuit synoptic diagram;

Fig. 5 be in the column driver circuit the time need the compensation memory structured flowchart.

Embodiment

Now with embodiment the utility model is further specified by reference to the accompanying drawings.

With reference to shown in Figure 1, a kind of display panel, drive circuit, comprise the first quantity row, the second quantity column pixel cell driving circuit matrix, row driver circuits, column driver circuit and OLED luminescent layer test section, it is integrated with substrate that input video digital processing circuit and pixel cell OLED luminescent layer drive matrix.Comprise second quantity pixel cell driving circuit and 1 row cache device on described each line direction of pixel cell driving circuit matrix, described row cache device is positioned in the middle of any two adjacent pixel unit driving circuits in the row direction; Described horizontal drive circuit produces the needed gating signal of pixel cell driving circuit matrix, and described column driver circuit produces the needed data-signal of pixel cell driving circuit matrix.

With reference to shown in Figure 2, described pixel cell driving circuit is made up of a memory cell and a driver element, described memory cell is used for preserving the on off state of pixel, work in low-tension supply VL, it is input as the gating signal of line driver output and the data-signal of being exported by row driver, its structure is the single-bit static memory cell, and static memory cell is made of 5 mosfet transistors; Described mosfet transistor size is the minimum feature size that CMOS technology can reach; Described driver element comprise 4 PMOS pipe (P2 among Fig. 3 P3 P4 P5), be used for providing the driving pulse electric current to the OLED luminescent layer, the accumulation by current pulse width realizes gray modulation.

With reference to shown in Figure 3; P2 is as the driving tube of OLED luminescent layer; P3 is pixel cell driving circuit matrix addressing switching tube, and P4 is the driving switch pipe, and P5 is pixel cell driving circuit protection tube; C1 is holding capacitor; SV and SVB a pair ofly not overlappingly mutually obtain scanning address signal, and VD is digital video position signal, and wherein VDH is " secretly " signal; VDL is " bright " signal, Vcom is-and the common potential of 3V.The low level VDL of configuration VD is 4V-4.5V, is operated in sub-threshold region when making PMOS pipe P1 and P2 conducting, thereby obtains tens little current drives OLED luminescent layers of receiving peace, can control the absolute brightness of display pixel simultaneously by fine setting VDL value.

Wherein the drain electrode of P2 connects power supply VCC, connects capacitor C 1 between the grid of P2 and the VCC, and the source electrode of P2 connects the P4D drain electrode.The grid of P2 connects the drain electrode of P3, and the source electrode of P3 connects VD, and the source electrode of P3 connects VD, and the grid of P3 connects scanning address signal SV.The grid of P4 connects scanning address signal SVB, and the source electrode of P4 is connected to the OLED luminescent layer to Vcom.The source electrode of P4 also connects grid and the source electrode of P5, the grounded drain of P5.

Described row cache device is made of PMOS transistor and the nmos pass transistor of one group of symmetrical complement.In CMOS fabrication error scope, the sequential time delay of all row cache devices is consistent; Described row cache device is used for strengthening the driving force on the line direction, and each row cache device can drive the CMOS transistor of 32-512 minimum feature size.

In the integrated circuit diagram layout of pixel cell driving circuit matrix, the pixel cell driving circuit of neighbouring two row and row cache device are mirror image symmetric relation up and down.

With reference to shown in Figure 4, described column driver circuit comprises vertical transfer register, first order latch, second level latch and selects transmitter; Wherein, vision signal is under the vertical transfer register effect that seals in and go out, deposit first order latch successively in, first order latch is before reading in data, institute's deposit data is write second level latch, first order latch is when reading in data then, and second level latch writes out data by level shifter to the selection transmitter of storage signal numerical value simultaneously.

With reference to shown in Figure 5, described column driver circuit comprises second quantity sequential compensation buffer, is series arrangement; In time, need compensate buffer and is arranged in pixel cell driving circuit matrix column driving circuit; The structure of described sequential compensation buffer is identical with the row cache device, in CMOS fabrication error scope, the sequential time-delay of all sequential compensation buffers and row cache device is consistent, so that the data-signal of driver output and row gating signal reach the pixel cell driving circuit simultaneously.

Although specifically show and introduced the utility model in conjunction with preferred embodiment; but the those skilled in the art should be understood that; in not breaking away from the spirit and scope of the present utility model that appended claims limits; can make a variety of changes the utility model in the form and details, be protection domain of the present utility model.

Claims

1. display panel, drive circuit, comprise the first quantity row, the second quantity column pixel cell driving circuit matrix, row driver circuits, column driver circuit and OLED luminescent layer test section, it is characterized in that: comprise second quantity pixel cell driving circuit and 1 row cache device on described each line direction of pixel cell driving circuit matrix, described row cache device is positioned in the middle of any two adjacent pixel unit driving circuits in the row direction; Described row driver circuits produces the needed gating signal of pixel cell driving circuit matrix, and described column driver circuit produces the needed data-signal of pixel cell driving circuit matrix.

2. a kind of display panel, drive circuit according to claim 1, it is characterized in that: described pixel cell driving circuit is made up of a memory cell and a driver element, described memory cell comprises 5 mosfet transistors, is used for preserving the on off state of pixel; Described driver element comprises 4 PMOS pipes, is used for providing the driving pulse electric current to the OLED luminescent layer.

3. a kind of display panel, drive circuit according to claim 1, it is characterized in that: described row cache device is made of PMOS transistor and the nmos pass transistor of one group of symmetrical complement.

4. a kind of display panel, drive circuit according to claim 1 is characterized in that: mirror image symmetric relation about the pixel cell driving circuit of neighbouring two row and row cache device are.

5. a kind of display panel, drive circuit according to claim 1 is characterized in that: described column driver circuit comprises vertical transfer register, first order latch, second level latch and selects transmitter; Wherein, vision signal is under the vertical transfer register effect that seals in and go out, deposit first order latch successively in, first order latch is before reading in data, institute's deposit data is write second level latch, first order latch is when reading in data then, and second level latch writes out data by level shifter to the selection transmitter of storage signal numerical value simultaneously.

6. a kind of display panel, drive circuit according to claim 5 is characterized in that: described column driver circuit comprises second quantity sequential compensation buffer, is series arrangement; The structure of described sequential compensation buffer is identical with the row cache device.