CN106647914B - Linear voltage regulator - Google Patents
Linear voltage regulator Download PDFInfo
- Publication number
- CN106647914B CN106647914B CN201710068638.2A CN201710068638A CN106647914B CN 106647914 B CN106647914 B CN 106647914B CN 201710068638 A CN201710068638 A CN 201710068638A CN 106647914 B CN106647914 B CN 106647914B
- Authority
- CN
- China
- Prior art keywords
- nmos tube
- circuit
- pmos
- difference
- grid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/561—Voltage to current converters
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Continuous-Control Power Sources That Use Transistors (AREA)
- Dc-Dc Converters (AREA)
Abstract
The invention discloses a kind of linear voltage regulator, including：Error amplifier, voltage adjuster part, feedback network, accelerate start-up circuit.Start-up circuit is accelerated to include the first and second partial circuits and first switch；The electric current of first and second partial circuits is respectively the first difference active load of error amplifier and the mirror image circuit of tail current and connects current comparator, can be from tapering into stationary value in start-up course using the electric current of the first difference active load, and the feature that tail current size is constant, the current comparator for enabling the two mirror image to be formed turns on first switch in start-up course and the control terminal voltage of voltage adjuster part is increased rapidly by first switch, so as to improve toggle speed；Startup terminates rear first switch shut-off so as to be had an impact to voltage adjuster part.The present invention can improve toggle speed and can be maintained the performance of linear voltage regulator after startup terminates.
Description
Technical field
The present invention relates to a kind of semiconductor integrated circuit, more particularly to a kind of linear voltage regulator.
Background technology
Linear voltage regulator is widely used in integrated circuits, as shown in figure 1, being the circuit diagram of existing linear voltage regulator；
Existing linear voltage regulator includes error amplifier, voltage adjuster part and feedback network.
Error amplifier includes the amplifier body being made up of NMOS tube MN1, MN2, MN3 and MN4, and amplifier body is
The differential amplifier arrangements of cascade, PMOS MP1, MP2, MP3 and MP4 composition active load, NMOS tube MN5 composition tail electricity
Stream source；Bias voltage VB1 is connected to NMOS tube MN5 grid, and bias voltage VB2 is connected to NMOS tube MN2 and MN4 grid,
Bias voltage VB3 is connected to PMOS MP2 and MP4 grid, and bias voltage VB4 is connected to PMOS MP1 and MP3 grid.
Voltage adjuster part is made up of NMOS tube MDRV, the output end of NMOS tube MDRV source electrode as output voltage OUT,
Feedback network is connected by resistance R1 and R2 and formed.NMOS tube MN1 grid meets reference voltage VREF, and NMOS tube MN2 grid connects
The feedback voltage formed by resistance R1 and R2 partial pressure.
Existing linear voltage regulator is by the comparison of feedback voltage and reference voltage, regulation NMOS tube MDRV unlatching size,
So as to maintain output voltage OUT stabilization when output current changes.
Although existing linear voltage regulator can realize the output of burning voltage, when upper electric, there can be DC operation
The settling time slower problem of point.
The content of the invention
The technical problems to be solved by the invention are to provide a kind of linear voltage regulator, can improve toggle speed.
In order to solve the above technical problems, linear voltage regulator provided by the invention includes：Error amplifier, voltage adjuster part
And feedback network.
The error amplifier includes amplifier body, tail current source and active load.
The amplifier body is differential configuration and including first difference channel and second difference channel, described first
The source of individual difference channel and the source of second difference channel all connect the tail current source, and the active load includes
The the first difference active load and the second difference active load of mirror image each other, the first difference active load connection described first
The load end of individual difference channel, the second difference active load connect the load end of second difference channel；Described
The input connection reference voltage of one difference channel, the input of second difference channel connect the feedback network output
Feedback voltage；The load end of second difference channel also exports the first control signal as output end and adjusted to the voltage
The control terminal of whole device.
The linear voltage regulator also includes being used for the acceleration start-up circuit for accelerating linear voltage regulator to start, described to accelerate to start
Circuit includes Part I circuit, Part II circuit and first switch.
The Part I circuit is the mirror image circuit of the first difference active load, and the Part II circuit is institute
The mirror image circuit of tail current source is stated, the Part I circuit is connected with the Part II circuit and forms electric current and compares
Device, the output end of the current comparator are connected to the control terminal of the first switch.
The size of current of the tail current source is active for the electric current of the first difference active load and second difference
The sum of the electric current of load；When the linear voltage regulator is stable, the electric current of the first difference active load and second difference
The electric current of active load is equal.
In the linear voltage regulator start-up course, the electric current of the first difference active load, which is more than second difference, to be had
The electric current of source load, and the electric current of the first difference active load gradually drops from the size of the electric current equal to the tail current source
The curent change of the low value for when stablizing, the curent change mode of the Part I circuit and the first difference active load
Mode is consistent, and the electric current of the Part II circuit keeps the size of current of constant and described Part II circuit to be arranged to start
During the Part I circuit the maximum of electric current and the median of minimum value so that start the incipient stage described in second
The electric current of partial circuit is less than the electric current of the Part I circuit so that the current comparator exports first voltage value；
The electric current that startup terminates the rear Part II circuit is more than the electric current of the Part I circuit so that the electric current compares
Device exports second voltage value.
The first switch is connected between supply voltage and first control signal, when the current comparator exports
During the first voltage value, the first switch conducting makes first control signal connect the supply voltage so that described
First control signal rapid increase is so as to accelerating the linear voltage regulator to start；When current comparator output second electricity
During pressure value, the first switch disconnects, so that the output for accelerating start-up circuit not to the linear voltage regulator produces shadow
Ring.
Further improve is that first difference channel and second difference channel all amplify for cascade
Circuit.
Further improve is that first difference channel includes the first NMOS tube and the second NMOS tube, the amplification
Second difference channel of device body includes the 3rd NMOS tube and the 4th NMOS tube.
The source electrode of first NMOS tube and the source electrode of the 3rd NMOS tube are connected together as the amplifier sheet
The source of two difference channels of body.
The drain electrode of first NMOS tube connects the source electrode of second NMOS tube, the drain electrode conduct of second NMOS tube
The load end of first difference channel.
The drain electrode of 3rd NMOS tube connects the source electrode of the 4th NMOS tube, the drain electrode conduct of the 4th NMOS tube
The load end of second difference channel and the output end as the amplifier body.
Input of the grid of first NMOS tube as first difference channel.
Input of the grid of 3rd NMOS tube as second difference channel.
The grid that the grid of second NMOS tube connects the 4th NMOS tube all connects the second bias voltage.
Further improve be, the first difference active load includes the first PMOS and the second PMOS, described the
Two difference active loads include the 3rd PMOS and the 4th PMOS.
The source electrode of first PMOS and the source electrode of the 3rd PMOS all connect supply voltage.
The drain electrode of first PMOS connects the source electrode of second PMOS, the drain electrode connection of the 3rd PMOS
The source electrode of 4th PMOS.
The drain electrode of grid and second PMOS of the grid of first PMOS, the 3rd PMOS all connects
The drain electrode of second NMOS tube.
The drain electrode of 4th PMOS connects the drain electrode of the 4th NMOS tube.
The grid of second PMOS and the grid of the 4th PMOS all connect the 3rd bias voltage.
Further improve is that the tail current source includes the 5th NMOS tube, the source ground of the 5th NMOS tube, institute
The drain electrode for stating the 5th NMOS tube connects the source electrode of first NMOS tube, and the grid of the 5th NMOS tube connects the first biased electrical
Pressure.
Further improve be, the Part I circuit includes the 5th PMOS and the 6th PMOS, the described 5th
The source electrode of PMOS connects supply voltage, and draining for the 5th PMOS connects the source electrode of the 6th PMOS, and the described 5th
The grid of PMOS connects the grid of first PMOS, and the grid of the 6th PMOS connects second PMOS
Grid, the drain electrode of the 6th PMOS connect the Part II circuit.
Further improve be, the Part II circuit includes the 6th NMOS tube and the 7th NMOS tube, the described 6th
The source ground of NMOS tube, the grid of the 6th NMOS tube connect with the grid of the 5th NMOS tube.
The source electrode of 7th NMOS tube connects the drain electrode of the 6th NMOS tube, the grid of the 7th NMOS tube and institute
State the grid connection of the first NMOS tube.
The drain electrode of 7th NMOS tube connects the Part I circuit.
Further improve is that the voltage adjuster part includes the 8th NMOS tube, and the drain electrode of the 8th NMOS tube connects
Supply voltage is connect, the grid of the 8th NMOS tube connects the drain electrode of the 4th NMOS tube, the source electrode of the 8th NMOS tube
Output end as the linear voltage regulator.
Further improve be, the feedback network is by the electricity that is connected between the output end of the linear voltage regulator and ground
Resistance string composition.
Further improve is that the first switch is made up of the 9th NMOS tube, and the grid of the 9th NMOS tube is institute
State the control terminal of first switch, the drain electrode connection supply voltage of the 9th NMOS tube, the source electrode connection of the 9th NMOS tube
First control signal.
Further improve is that the electric current of the Part I circuit is equal to the electric current of the first difference active load.
Further improve is that the size ratio of the electric current of the Part II circuit and the electric current of the tail current source is
3：4.
The present invention acceleration start-up circuit can in power up, using the first difference active load electric current can from equal to
The feature of value when the size of the electric current of tail current source is gradually reduced to stable, by the current mirror of mirror image the first difference active load
Picture is into Part I circuit, so that the electric current of Part I circuit also can be with active in the first difference in power up
The electric current of load and change, so by existing by the electric current of Part I circuit and a size of current, for Part I circuit
The electric current of the electric current of the Part II circuit of the median of electric current is compared during upper Electrical change, and compared by electric current
As a result the break-make of first switch is controlled, so as to realizing the first control signal of the control terminal for enabling to be input to voltage adjuster part
Rapid increase and influence of the releasing acceleration start-up circuit to the first control signal after startup terminates on startup, so this hair
The bright toggle speed that can realize linear voltage regulator, and can be maintained the performance of linear voltage regulator after startup terminates.
Brief description of the drawings
The present invention is further detailed explanation with reference to the accompanying drawings and detailed description：
Fig. 1 is the circuit diagram of existing linear voltage regulator；
Fig. 2 is the circuit diagram of present pre-ferred embodiments linear voltage regulator；
Fig. 3 is the size of current schematic diagram of present pre-ferred embodiments linear voltage regulator each branch road in startup and stabilization；
Fig. 4 is the startup simulation curve of present pre-ferred embodiments and existing linear voltage regulator.
Embodiment
Linear voltage regulator of the embodiment of the present invention includes：Error amplifier, voltage adjuster part and feedback network.
The error amplifier includes amplifier body, tail current source and active load.
The amplifier body is differential configuration and including first difference channel and second difference channel, described first
The source of individual difference channel and the source of second difference channel all connect the tail current source, and the active load includes
The the first difference active load and the second difference active load of mirror image each other, the first difference active load connection described first
The load end of individual difference channel, the second difference active load connect the load end of second difference channel；Described
The input connection reference voltage of one difference channel, the input of second difference channel connect the feedback network output
Feedback voltage；The load end of second difference channel also exports the first control signal as output end and adjusted to the voltage
The control terminal of whole device.
The linear voltage regulator also includes being used for the acceleration start-up circuit for accelerating linear voltage regulator to start, described to accelerate to start
Circuit includes Part I circuit, Part II circuit and first switch.
The Part I circuit is the mirror image circuit of the first difference active load, and the Part II circuit is institute
The mirror image circuit of tail current source is stated, the Part I circuit is connected with the Part II circuit and forms electric current and compares
Device, the output end of the current comparator are connected to the control terminal of the first switch.
The size of current of the tail current source is active for the electric current of the first difference active load and second difference
The sum of the electric current of load；When the linear voltage regulator is stable, the electric current of the first difference active load and second difference
The electric current of active load is equal.
In the linear voltage regulator start-up course, the electric current of the first difference active load, which is more than second difference, to be had
The electric current of source load, and the electric current of the first difference active load gradually drops from the size of the electric current equal to the tail current source
The curent change of the low value for when stablizing, the curent change mode of the Part I circuit and the first difference active load
Mode is consistent, and the electric current of the Part II circuit keeps the size of current of constant and described Part II circuit to be arranged to start
During the Part I circuit the maximum of electric current and the median of minimum value so that start the incipient stage described in second
The electric current of partial circuit is less than the electric current of the Part I circuit so that the current comparator exports first voltage value；
The electric current that startup terminates the rear Part II circuit is more than the electric current of the Part I circuit so that the electric current compares
Device exports second voltage value.
The first switch is connected between supply voltage and first control signal, when the current comparator exports
During the first voltage value, the first switch conducting makes first control signal connect the supply voltage so that described
First control signal rapid increase is so as to accelerating the linear voltage regulator to start；When current comparator output second electricity
During pressure value, the first switch disconnects, so that the output for accelerating start-up circuit not to the linear voltage regulator produces shadow
Ring.
As shown in Fig. 2 it is the circuit diagram of present pre-ferred embodiments linear voltage regulator；In present pre-ferred embodiments：
First difference channel and second difference channel are all cascade amplifying circuit.
First difference channel includes the first NMOS tube MN1 and the second NMOS tube MN2, and the of the amplifier body
Two difference channels include the 3rd NMOS tube MN3 and the 4th NMOS tube MN4.
The source electrode of the first NMOS tube MN1 and the source electrode of the 3rd NMOS tube MN3 are connected together as described put
The source of two difference channels of big device body.
The drain electrode of the first NMOS tube MN1 connects the source electrode of the second NMOS tube MN2, the second NMOS tube MN2
Load end of the drain electrode as first difference channel.
The drain electrode of the 3rd NMOS tube MN3 connects the source electrode of the 4th NMOS tube MN4, the 4th NMOS tube MN4
Output end of the drain electrode as the load end of second difference channel and as the amplifier body.
Input of the grid of the first NMOS tube MN1 as first difference channel.
Input of the grid of the 3rd NMOS tube MN3 as second difference channel.
The grid that the grid of the second NMOS tube MN2 connects the 4th NMOS tube MN4 all connects the second bias voltage
VB2。
The first difference active load includes the first PMOS MP1 and the second PMOS MP2, second difference are active
Load includes the 3rd PMOS MP3 and the 4th PMOS MP4.
The source electrode of the first PMOS MP1 and the source electrode of the 3rd PMOS MP3 all meet supply voltage VDD.
The drain electrode of the first PMOS MP1 connects the source electrode of the second PMOS MP2, the 3rd PMOS MP3
Drain electrode connect the source electrode of the 4th PMOS MP4.
The grid of the first PMOS MP1, the grid of the 3rd PMOS MP3 and the second PMOS MP2
Drain electrode all connects the drain electrode of the second NMOS tube MN2 and the 4th bias voltage VB4 of connection.
The drain electrode of the 4th PMOS MP4 connects the drain electrode of the 4th NMOS tube MN4.
The grid of the second PMOS MP2 and the grid of the 4th PMOS MP4 all connect the 3rd bias voltage
VB3。
The tail current source includes the 5th NMOS tube MN5, the source ground of the 5th NMOS tube MN5, and the described 5th
NMOS tube MN5 drain electrode connects the source electrode of the first NMOS tube MN1, and the grid connection first of the 5th NMOS tube MN5 is inclined
Put voltage VB1.
The Part I circuit includes the 5th PMOS MPa1 and the 6th PMOS MPa2, the 5th PMOS MPa1
Source electrode connect supply voltage VDD, the 5th PMOS MPa1 drain electrode and connect the source electrode of the 6th PMOS MPa2, it is described
5th PMOS MPa1 grid connects the grid of the first PMOS MP1, the grid connection of the 6th PMOS MPa2
The grid of the second PMOS MP2, the drain electrode of the 6th PMOS MPa2 connect the Part II circuit.
The Part II circuit includes the 6th NMOS tube MNa1 and the 7th NMOS tube MNa2, the 6th NMOS tube MNa1
Source ground, the grid of the 6th NMOS tube MNa1 connects with the grid of the 5th NMOS tube MN5.
The source electrode of the 7th NMOS tube MNa2 connects the drain electrode of the 6th NMOS tube MNa1, the 7th NMOS tube
MNa2 grid connects with the grid of the first NMOS tube MN1.
The drain electrode of the 7th NMOS tube MNa2 connects the Part I circuit.Understand as shown in Figure 2, the described 7th
NMOS tube MNa2 drain electrode connects with the drain electrode of the 6th PMOS MPa2.
The voltage adjuster part includes the 8th NMOS tube MDRV, the drain electrode connection power supply electricity of the 8th NMOS tube MDRV
VDD is pressed, the grid of the 8th NMOS tube MDRV connects the drain electrode of the 4th NMOS tube MN4, the 8th NMOS tube MDRV
Output end OUT of the source electrode as the linear voltage regulator.
The feedback network is made up of the resistance string being connected between the output end OUT of the linear voltage regulator and ground.Fig. 2
In, resistance string is in series by resistance R1 and resistance R2, and feedback voltage V FB is formed at both link positions.
The first switch is made up of the 9th NMOS tube MNa3, and the grid of the 9th NMOS tube MNa3 is opened for described first
The control terminal DET, the 9th NMOS tube MNa3 of pass drain electrode connection supply voltage VDD, the source of the 9th NMOS tube MNa3
Pole connects the first control signal NGATE.
As shown in figure 3, it is the size of current of present pre-ferred embodiments linear voltage regulator each branch road in startup and stabilization
Schematic diagram；
In present pre-ferred embodiments, PMOS MPa1, MP1 and MP3 channel dimensions are arranged to identical, so, institute
The electric current for stating Part I circuit is equal to the electric current of the first difference active load；And when linear voltage regulator is stable, it is described
Electric current all phases of the electric current of Part I circuit, the electric current of the first difference active load and the second difference active load
Deng.Size of current of above-mentioned 3 branch roads when linear voltage regulator just starts and after stabilization is shown in Fig. 3.Such as described first
The size of current of partial circuit is that 2 × IB/IB implication is：The electricity of the Part I circuit when linear voltage regulator just starts
Flow for 2 × IB, the electric current of the Part I circuit is IB after linear voltage regulator is stable；The electricity of the first difference active load
It is also 2 × IB/IB to flow size, and the size of current of the second difference active load is 0/IB.
In present pre-ferred embodiments, the size such as channel width ratio of NMOS tube MNa1 and NMOS tube MN5 raceway groove is set
It is set to 3:4, so, the channel current size ratio of NMOS tube MNa1 and NMOS tube MN5 under identical gate source voltage is 3:4,
Namely the Part II circuit electric current and the tail current source electric current size ratio be 3：4.It can be seen that in Fig. 3
The electric current of the Part II circuit is fixed as 1.5 × IB, and the electric current of the tail current source is fixed as 2 × IB.The tail current
The electric current in source for the first difference active load electric current and the second difference active load electric current sum.And described
2 × IB when the electric current of two partial circuits is the firm startup for the electric current that 1.5 × IB is the Part I circuit and when stablizing
IB middle value；In other embodiments, the electric current of the Part II circuit being capable of its between 2 × IB to IB of fetch bit
Its median such as 1.4 × IB, 1.6 × IB etc., namely it is not necessarily middle value to be worth.
A kind of size of current of each branch road of preferred case, in other embodiments, PMOS MPa1 are only show in Fig. 3
Other ratios can be arranged to by being set with MP1 channel dimensions, at this moment the ratio of NMOS tube MNa1 and NMOS tube MN5 channel dimensions
Value will do corresponding adjustment.
As shown in figure 4, be the startup simulation curve of present pre-ferred embodiments and existing linear voltage regulator, simulated conditions
For：Under conditions of power input 0 to 3.3V, the stabilization time from 0 to 1.5V is exported：Wherein curve 101 is supply voltage
Change curve, curve 102 are the output signal OUT of present pre-ferred embodiments change curve, and curve 103 is shown in Fig. 1
The output signal OUT of available circuit change curve, it can be seen that the startup time of present pre-ferred embodiments is 6.47 microseconds,
The startup time of available circuit framework is 16.66 microseconds.
The present invention is described in detail above by specific embodiment, but these not form the limit to the present invention
System.Without departing from the principles of the present invention, those skilled in the art can also make many modification and improvement, and these also should
It is considered as protection scope of the present invention.
Claims (12)
- A kind of 1. linear voltage regulator, it is characterised in that including：Error amplifier, voltage adjuster part and feedback network；The error amplifier includes amplifier body, tail current source and active load；The amplifier body is for differential configuration and including first difference channel and second difference channel, first difference The source of parallel circuit and the source of second difference channel all connect the tail current source, and the active load is included each other The the first difference active load and the second difference active load of mirror image, the first difference active load connect first difference The load end of parallel circuit, the second difference active load connect the load end of second difference channel；Described first The input connection reference voltage of difference channel, the input of second difference channel connect the anti-of the feedback network output Feedthrough voltage；The load end of second difference channel also exports the first control signal to the voltage adjuster as output end The control terminal of part；Linear voltage regulator also includes being used for the acceleration start-up circuit for accelerating linear voltage regulator to start, and the acceleration start-up circuit includes Part I circuit, Part II circuit and first switch；The Part I circuit is the mirror image circuit of the first difference active load, and the Part II circuit is the tail The mirror image circuit of current source, the Part I circuit are connected with the Part II circuit and form current comparator, institute The output end for stating current comparator is connected to the control terminal of the first switch；Electric current and the second difference active load of the size of current of the tail current source for the first difference active load Electric current sum；When the linear voltage regulator is stable, the electric current of the first difference active load and second difference are active The electric current of load is equal；In the linear voltage regulator start-up course, the electric current of the first difference active load is active more than second difference negative The electric current of load, and the electric current of the first difference active load is gradually reduced to from the size of the electric current equal to the tail current source The curent change mode of value when stable, the curent change mode of the Part I circuit and the first difference active load Unanimously, the electric current of the Part II circuit keeps the size of current of constant and described Part II circuit to be arranged to start-up course Described in Part I circuit the maximum of electric current and the median of minimum value so that start the incipient stage described in Part II The electric current of circuit is less than the electric current of the Part I circuit so that the current comparator exports first voltage value；Starting The electric current of the Part II circuit is more than the electric current of the Part I circuit so that the current comparator is defeated after end Go out second voltage value；The first switch is connected between supply voltage and first control signal, when described in current comparator output During first voltage value, the first switch conducting makes first control signal connect the supply voltage so that described first Control signal rapid increase is so as to accelerating the linear voltage regulator to start；When the current comparator exports the second voltage value When, the first switch disconnects, so that the output for accelerating start-up circuit not to the linear voltage regulator has an impact.
- 2. linear voltage regulator as claimed in claim 1, it is characterised in that：First difference channel and second difference Parallel circuit is all cascade amplifying circuit.
- 3. linear voltage regulator as claimed in claim 2, it is characterised in that：First difference channel includes the first NMOS tube With the second NMOS tube, second difference channel of the amplifier body includes the 3rd NMOS tube and the 4th NMOS tube；The source electrode of first NMOS tube and the source electrode of the 3rd NMOS tube are connected together as the amplifier body The source of two difference channels；Draining for first NMOS tube connects the source electrode of second NMOS tube, described in the drain electrode conduct of second NMOS tube The load end of first difference channel；Draining for 3rd NMOS tube connects the source electrode of the 4th NMOS tube, described in the drain electrode conduct of the 4th NMOS tube The load end of second difference channel and the output end as the amplifier body；Input of the grid of first NMOS tube as first difference channel；Input of the grid of 3rd NMOS tube as second difference channel；The grid that the grid of second NMOS tube connects the 4th NMOS tube all connects the second bias voltage.
- 4. linear voltage regulator as claimed in claim 3, it is characterised in that：The first difference active load includes the first PMOS Pipe and the second PMOS, the second difference active load include the 3rd PMOS and the 4th PMOS；The source electrode of first PMOS and the source electrode of the 3rd PMOS all connect supply voltage；Draining for first PMOS connects the source electrode of second PMOS, described in the drain electrode connection of the 3rd PMOS The source electrode of 4th PMOS；The drain electrode of the grid of first PMOS, the grid of the 3rd PMOS and second PMOS all connects described The drain electrode of second NMOS tube；The drain electrode of 4th PMOS connects the drain electrode of the 4th NMOS tube；The grid of second PMOS and the grid of the 4th PMOS all connect the 3rd bias voltage.
- 5. the linear voltage regulator as described in claim 3 or 4, it is characterised in that：The tail current source includes the 5th NMOS tube, institute The source ground of the 5th NMOS tube is stated, draining for the 5th NMOS tube connects the source electrode of first NMOS tube, and the described 5th The grid of NMOS tube connects the first bias voltage.
- 6. linear voltage regulator as claimed in claim 4, it is characterised in that：The Part I circuit include the 5th PMOS and 6th PMOS, the source electrode of the 5th PMOS connect supply voltage, the drain electrode connection the described 6th of the 5th PMOS The source electrode of PMOS, the grid of the 5th PMOS connect the grid of first PMOS, the grid of the 6th PMOS Pole connects the grid of second PMOS, and the drain electrode of the 6th PMOS connects the Part II circuit.
- 7. linear voltage regulator as claimed in claim 5, it is characterised in that：The Part II circuit include the 6th NMOS tube and 7th NMOS tube, the source ground of the 6th NMOS tube, the grid of the 6th NMOS tube and the grid of the 5th NMOS tube Pole connects；The source electrode of 7th NMOS tube connects the drain electrode of the 6th NMOS tube, the grid of the 7th NMOS tube and described the The grid connection of one NMOS tube；The drain electrode of 7th NMOS tube connects the Part I circuit.
- 8. the linear voltage regulator as described in claim 3 or 4, it is characterised in that：The voltage adjuster part includes the 8th NMOS Pipe, the drain electrode connection supply voltage of the 8th NMOS tube, the grid of the 8th NMOS tube connect the 4th NMOS tube Drain electrode, the output end of the source electrode of the 8th NMOS tube as the linear voltage regulator.
- 9. linear voltage regulator as claimed in claim 8, it is characterised in that：The feedback network is by being connected on the linear voltage stabilization Resistance string composition between the output end and ground of device.
- 10. linear voltage regulator as claimed in claim 1 or 2 or 3 or 4, it is characterised in that：The first switch is by the 9th NMOS Pipe forms, and the grid of the 9th NMOS tube is the control terminal of the first switch, and the drain electrode connection of the 9th NMOS tube is electric Source voltage, the source electrode of the 9th NMOS tube connect first control signal.
- 11. linear voltage regulator as claimed in claim 1, it is characterised in that：The electric current of the Part I circuit is equal to described The electric current of first difference active load.
- 12. linear voltage regulator as claimed in claim 11, it is characterised in that：The electric current and the tail of the Part II circuit The size ratio of the electric current of current source is 3：4.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710068638.2A CN106647914B (en) | 2017-02-08 | 2017-02-08 | Linear voltage regulator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710068638.2A CN106647914B (en) | 2017-02-08 | 2017-02-08 | Linear voltage regulator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106647914A CN106647914A (en) | 2017-05-10 |
| CN106647914B true CN106647914B (en) | 2017-12-05 |
Family
ID=58844708
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710068638.2A Active CN106647914B (en) | 2017-02-08 | 2017-02-08 | Linear voltage regulator |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106647914B (en) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107179797B (en) * | 2017-05-27 | 2018-08-21 | 上海华虹宏力半导体制造有限公司 | Linear voltage regulator |
| CN107168432B (en) * | 2017-05-31 | 2019-06-25 | 成都锐成芯微科技股份有限公司 | Low-power dissipation power supply power supply circuit |
| CN108287588B (en) * | 2018-01-30 | 2019-10-11 | 上海华虹宏力半导体制造有限公司 | Voltage adjuster |
| CN109062308B (en) * | 2018-09-29 | 2020-06-09 | 上海华虹宏力半导体制造有限公司 | Voltage regulation circuit |
| CN111813177A (en) * | 2020-07-17 | 2020-10-23 | 广州大学 | High-performance CMOS voltage reference source with negative feedback |
| CN112034924B (en) * | 2020-08-10 | 2023-02-24 | 唯捷创芯(天津)电子技术股份有限公司 | Self-adaptive fast response LDO (low dropout regulator) circuit and chip thereof |
| CN112099560A (en) * | 2020-09-25 | 2020-12-18 | 上海华虹宏力半导体制造有限公司 | Linear voltage stabilizer |
| CN115309218A (en) * | 2021-05-07 | 2022-11-08 | 浙江驰拓科技有限公司 | Current reference circuit and power supply system |
| CN113885650B (en) * | 2021-10-18 | 2023-03-07 | 上海华虹宏力半导体制造有限公司 | Band-gap reference source circuit |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4736117A (en) * | 1986-11-14 | 1988-04-05 | National Semiconductor Corporation | VDS clamp for limiting impact ionization in high density CMOS devices |
| CN101592966A (en) * | 2008-05-29 | 2009-12-02 | 精工电子有限公司 | Voltage stabilizer |
| CN101957627A (en) * | 2010-11-02 | 2011-01-26 | 深圳市富满电子有限公司南山分公司 | LDO constant voltage control circuit |
| EP2781984A1 (en) * | 2013-03-21 | 2014-09-24 | Ams Ag | Low-dropout regulator and method for regulating voltage |
| CN105159382A (en) * | 2015-08-18 | 2015-12-16 | 上海华虹宏力半导体制造有限公司 | Linear voltage regulator |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9385587B2 (en) * | 2013-03-14 | 2016-07-05 | Sandisk Technologies Llc | Controlled start-up of a linear voltage regulator where input supply voltage is higher than device operational voltage |
-
2017
- 2017-02-08 CN CN201710068638.2A patent/CN106647914B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4736117A (en) * | 1986-11-14 | 1988-04-05 | National Semiconductor Corporation | VDS clamp for limiting impact ionization in high density CMOS devices |
| CN101592966A (en) * | 2008-05-29 | 2009-12-02 | 精工电子有限公司 | Voltage stabilizer |
| CN101957627A (en) * | 2010-11-02 | 2011-01-26 | 深圳市富满电子有限公司南山分公司 | LDO constant voltage control circuit |
| EP2781984A1 (en) * | 2013-03-21 | 2014-09-24 | Ams Ag | Low-dropout regulator and method for regulating voltage |
| CN105159382A (en) * | 2015-08-18 | 2015-12-16 | 上海华虹宏力半导体制造有限公司 | Linear voltage regulator |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106647914A (en) | 2017-05-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106647914B (en) | Linear voltage regulator | |
| CN107179797B (en) | Linear voltage regulator | |
| CN107727925B (en) | High-precision wide-range peak current sampling circuit | |
| CN102707757B (en) | Dynamic discharge circuit and LDO integrated with same | |
| CN207488871U (en) | A kind of CMOS low pressure difference linear voltage regulators using novel buffer | |
| US7339402B2 (en) | Differential amplifier with over-voltage protection and method | |
| CN105159382B (en) | Linear voltage regulator | |
| CN106325344B (en) | Low-dropout regulator circuit with auxiliary circuit | |
| CN106100321B (en) | A kind of complementary feedback formula gate switch charge pump circuit | |
| CN101615048A (en) | Generating circuit from reference voltage | |
| WO2022033457A1 (en) | Self-adaptive fast-response ldo circuit and chip thereof | |
| CN103633617B (en) | A kind of overcurrent protection detection circuit being applied to heavy-duty motor driving chip | |
| CN102331809A (en) | Current mirror circuit with grid leakage compensating function | |
| CN103956983B (en) | A kind of error amplifier with clamping function | |
| CN103956982B (en) | Common-mode feedback circuit for duration of two-stage differential amplifier | |
| CN104038041B (en) | A kind of soft start circuit of switch power supply for ambipolar error amplifier | |
| CN108646842A (en) | It is a kind of suitable for band gap reference without overshoot soft starting circuit | |
| CN108183691A (en) | Folded-cascode op amp | |
| CN102455725A (en) | Voltage/current double-loop control device and chip | |
| US9024603B2 (en) | Low power current comparator for switched mode regulator | |
| CN106771476B (en) | A kind of high-tension current monitoring circuit | |
| CN112865710B (en) | Folding type fully differential operational amplifier with common-source and common-gate structure | |
| CN102221840A (en) | Voltage-stabilizing circuit and operation amplifying circuit | |
| JP2010050619A (en) | Optical receiving amplifier | |
| CN105007052B (en) | A kind of high-gain class-AB operational amplifier circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |