CN106646010B - System and method for testing discrete input and output signals - Google Patents
System and method for testing discrete input and output signals Download PDFInfo
- Publication number
- CN106646010B CN106646010B CN201510740780.8A CN201510740780A CN106646010B CN 106646010 B CN106646010 B CN 106646010B CN 201510740780 A CN201510740780 A CN 201510740780A CN 106646010 B CN106646010 B CN 106646010B
- Authority
- CN
- China
- Prior art keywords
- discrete
- output signal
- processing module
- tested
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Abstract
The invention provides a test system and a test method of discrete input and output signals, wherein the system comprises: the device comprises a main control chip, at least one discrete input signal processing module and at least one discrete output signal processing module, wherein the main control chip comprises an I2C controller; one end of the discrete input signal processing module and one end of the discrete output signal processing module are connected with the electronic equipment to be tested, and the other end of the discrete input signal processing module and one end of the discrete output signal processing module are connected with the I2C controller; the discrete input signal processing module is used for receiving a discrete output signal of the electronic equipment to be tested, taking the discrete output signal as a discrete input signal, and processing the discrete input signal under the control of the I2C controller to keep the level state of the discrete input signal unchanged; the discrete output signal processing module is used for generating a discrete output signal under the control of the I2C controller, processing the discrete output signal to keep the level state of the discrete output signal unchanged, and sending the discrete output signal to the electronic equipment to be tested as a discrete input signal of the electronic equipment to be tested.
Description
Technical Field
The invention relates to the technical field of equipment testing, in particular to a system and a method for testing discrete input and output signals.
Background
The signal of the vehicle-mounted, airborne and ship-borne discrete control input and output equipment is responsible for processing the control signal of the electronic equipment, and the discrete control input signal is responsible for acquiring the state information of the vehicle-mounted, airborne and ship-borne electronic equipment or receiving the control information of the related electronic equipment; the discrete control output signal is responsible for sending control information to vehicle-mounted, airborne and ship-mounted electronic equipment or returning state information of related electronic equipment.
The working level of the vehicle-mounted electronic equipment, the vehicle-mounted electronic equipment and the ship-based electronic equipment is often different from that of the common industrial equipment, the discrete control input and output equipment signal of the common industrial equipment cannot be directly connected with the signal of the vehicle-mounted electronic equipment, the vehicle-mounted electronic equipment and the ship-based electronic equipment, and otherwise, the relevant electronic equipment can be seriously damaged.
The working voltage in some industrial environments is often 110V, and data communication, status access and control and the like between electronic devices are required through discrete input signals and output signals, and it is not practical to test the electronic devices each time the electronic devices are actually tested on an industrial site. In addition, the generation of the discrete control input signal and the output signal of the vehicle-mounted, airborne and ship-based electronic equipment needs the strict coordination of the time sequence control signal and the enabling signal, while the discrete control input signal and the discrete control output signal of the common industrial equipment are only simple signal input and signal output, are not related to the time sequence control and the enabling of the discrete control input and output signals at all, and cannot meet the actual test requirements.
Disclosure of Invention
The invention provides a test system and a test method of discrete input and output signals, which can generate the discrete input signals and the discrete output signals according to test requirements to test electronic equipment to be tested.
In one aspect, the present invention provides a discrete input signal testing system, including a main control chip, at least one discrete input signal processing module and at least one discrete output signal processing module, where the main control chip includes an I2C controller; one end of the discrete input signal processing module is connected with the electronic equipment to be tested, and the other end of the discrete input signal processing module is connected with the I2C controller; one end of the discrete output signal processing module is connected with the electronic equipment to be tested, and the other end of the discrete output signal processing module is connected with the I2C controller;
the discrete input signal processing module is used for receiving a discrete output signal of an electronic device to be tested, taking the discrete output signal of the electronic device to be tested as a discrete input signal, and processing the discrete input signal under the control of the I2C controller, so that the level state of the discrete input signal is kept unchanged;
the discrete output signal processing module is used for generating a discrete output signal under the control of the I2C controller, processing the discrete output signal to enable the level state of the discrete output signal to be kept unchanged, and sending the discrete output signal to the electronic equipment to be tested to serve as a discrete input signal of the electronic equipment to be tested.
Optionally, the discrete input signal processing module includes a first control chip, a first IO chip, a transparent D-type trigger, and an optocoupler; the input end of the optocoupler is connected with electronic equipment to be tested, and the output end of the optocoupler is connected with the input end of the transparent D-type trigger; the output end of the transparent D-type trigger is connected with the input end of the first IO chip, and the enable end of the transparent D-type trigger is connected with the output end of the first control chip; the I2C controller is connected with the first control chip and the first IO chip;
discrete output signal of the electronic equipment to be tested is used as discrete input signal of discrete input signal processing module, the warp the opto-coupler is exported transparent D type trigger's input, first control chip is in produce sequential control signal under the control of I2C controller, trigger D type trigger's enable end makes discrete input signal correctly latch and transmit extremely transparent D type trigger's output, first IO chip by transparent D type trigger's output is gathered discrete input signal and is exported.
Optionally, the discrete output signal processing module includes a second control chip, a second IO chip, an edge-triggered D-type flip-flop, and a darlington transistor; the I2C controller is connected with the second control chip and the second IO chip, the output end of the second control chip is connected with the enabling end of the edge-triggered D-type trigger, the output end of the second IO chip is connected with the input end of the edge-triggered D-type trigger, the output end of the edge-triggered D-type trigger is connected with the input end of the Darlington tube, and the output end of the Darlington tube is connected with the electronic equipment to be tested;
the second IO chip is in under the control of I2C controller, produce discrete output signal, and send to the input of transparent D type trigger, the second control chip is in produce sequential control signal under the control of I2C controller, trigger the enable end of D type trigger makes discrete output signal correctly latch and transmit extremely the output of transparent D type trigger, and the warp send to the electronic equipment that awaits measuring after the Darlington pipe is handled, as the discrete input signal of the electronic equipment that awaits measuring.
Optionally, the main control chip is a south bridge HM 65.
Optionally, the first control chip is an FPGA or an MCU; the first IO chip is PCA 9555.
Optionally, the second control chip is an FPGA or an MCU; the second IO chip is PCA 9555.
In another aspect, the present invention provides a method for testing a discrete input signal, including:
the discrete input signal processing module receives a discrete output signal of the electronic device to be tested, takes the discrete output signal of the electronic device to be tested as a discrete input signal, and processes the discrete input signal under the control of the I2C controller, so that the level state of the discrete input signal is kept unchanged;
the discrete output signal processing module generates a discrete output signal under the control of the I2C controller, processes the discrete output signal to keep the level state of the discrete output signal unchanged, and sends the discrete output signal to the electronic equipment to be tested as a discrete input signal of the electronic equipment to be tested;
the I2C controller is located in a main control chip, the discrete input signal processing module and the discrete output signal processing module are both at least one, one end of the discrete input signal processing module is connected with the electronic equipment to be tested, and the other end of the discrete input signal processing module is connected with the I2C controller; one end of the discrete output signal processing module is connected with the electronic equipment to be tested, and the other end of the discrete output signal processing module is connected with the I2C controller.
Optionally, the discrete input signal processing module includes a first control chip, a first IO chip, a transparent D-type trigger, and an optocoupler;
the discrete input signal processing module receives a discrete output signal of an electronic device to be tested, takes the discrete output signal of the electronic device to be tested as a discrete input signal, and processes the discrete input signal under the control of an I2C controller, so that the level state of the discrete input signal remains unchanged, including:
the discrete output signal of the electronic equipment to be tested is used as the discrete input signal of the discrete input signal processing module and is output to the input end of the transparent D-type trigger through the optical coupler;
the first control chip generates a timing control signal under the control of the I2C controller, and triggers an enable end of the D-type flip-flop, so that the discrete input signal is correctly latched and transmitted to an output end of the transparent D-type flip-flop;
and the first IO chip collects and outputs the discrete input signal through the output end of the transparent D-type trigger.
Optionally, the discrete output signal processing module includes a second control chip, a second IO chip, an edge-triggered D-type flip-flop, and a darlington transistor;
the discrete output signal processing module generates a discrete output signal under the control of the I2C controller, and processes the discrete output signal, so that the level state of the discrete output signal remains unchanged, and the discrete output signal is sent to the electronic device to be tested as a discrete input signal of the electronic device to be tested, including:
the second IO chip generates a discrete output signal under the control of the I2C controller and sends the discrete output signal to the input end of the transparent D-type trigger;
the second control chip generates a timing control signal under the control of the I2C controller, and triggers an enable end of the D-type flip-flop, so that the discrete output signal is correctly latched and transmitted to an output end of the transparent D-type flip-flop;
and the discrete output signal is processed by the Darlington tube and then is sent to the electronic equipment to be tested as a discrete input signal of the electronic equipment to be tested.
In the system and method for testing discrete input/output signals provided by the embodiments of the present invention, a discrete input signal processing module receives a discrete output signal of an electronic device to be tested, takes the discrete output signal of the electronic device to be tested as a discrete input signal, and processes the discrete input signal under the control of an I2C controller, so that the level state of the discrete input signal remains unchanged; the discrete output signal processing module generates a discrete output signal under the control of the I2C controller, processes the discrete output signal, keeps the level state of the discrete output signal unchanged, and sends the discrete output signal to the electronic device to be tested as a discrete input signal of the electronic device to be tested. Compared with the prior art, the discrete input signal processing module can take the discrete output signal of the electronic equipment to be tested as the input signal of the discrete input signal processing module, the output signal of the discrete output signal processing module is sent to the electronic equipment to be tested and taken as the input signal of the electronic equipment to be tested, and the electronic equipment to be tested can obtain the simulated state information of the vehicle-mounted, airborne and ship-borne electronic equipment or receive the simulated control information from the vehicle-mounted, airborne and ship-borne electronic equipment through the signals, so that the vehicle-mounted, airborne and ship-borne equipment can be simulated to test the equipment to be tested.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a system for testing discrete input/output signals according to an embodiment of the present invention;
FIG. 2 is a block diagram of a system for testing discrete input/output signals according to another embodiment of the present invention;
FIG. 3 is a flowchart of a discrete input signal processing method in a discrete input/output signal testing method according to an embodiment of the present invention;
FIG. 4 is a flowchart of a discrete output signal processing method in a discrete input/output signal testing method according to an embodiment of the present invention;
fig. 5 is a test interface of a test system for discrete input and output signals according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
An embodiment of the present invention provides a system for testing a discrete input/output signal, as shown in fig. 1, the system includes a main control chip, at least one discrete input signal processing module, and at least one discrete output signal processing module, where the main control chip includes an I2C controller; one end of the discrete input signal processing module is connected with the electronic equipment to be tested, and the other end of the discrete input signal processing module is connected with the I2C controller; one end of the discrete output signal processing module is connected with the electronic equipment to be tested, and the other end of the discrete output signal processing module is connected with the I2C controller;
the discrete input signal processing module is used for receiving a discrete output signal of an electronic device to be tested, taking the discrete output signal of the electronic device to be tested as a discrete input signal, and processing the discrete input signal under the control of the I2C controller, so that the level state of the discrete input signal is kept unchanged;
the discrete output signal processing module is used for generating a discrete output signal under the control of the I2C controller, processing the discrete output signal to enable the level state of the discrete output signal to be kept unchanged, and sending the discrete output signal to the electronic equipment to be tested to serve as a discrete input signal of the electronic equipment to be tested.
The embodiment of the present invention further provides a system for testing discrete input/output signals, as shown in fig. 2, the south bridge HM65 is connected to the control chip A, IO, the chip B, the control chip C and the IO chip D through an I2C bus by an own I2C controller; the control chip A and the control chip C can be realized by adopting an FPGA or a single chip Microcomputer (MCU), and the IO chip B and the IO chip D can be realized by adopting a PCA9555 chip;
the input end of the optical coupler takes discrete output signals of electronic equipment to be tested as discrete input signals, and the output end of the optical coupler is connected with the input ends (D0-D15) of the transparent D-type trigger, the output ends (Q0-Q15) of the transparent D-type trigger are connected with the input end of an IO chip B, and the enabling end (/ OE and/L E) is connected with the output end of a control chip A;
the output end of the control chip C is connected with the enable end (/ OE and/L E) of the edge-triggered D-type trigger, the output end of the IO chip D is connected with the input ends (D0-D15) of the edge-triggered D-type trigger, the output ends (Q0-Q15) of the edge-triggered D-type trigger are connected with the input end of the Darlington tube, and the output end of the Darlington tube outputs discrete output signals which serve as discrete input signals of electronic equipment to be tested.
Among them, the south bridge HM65 controls and configures the I2C device connected to the bus through the I2C bus, and registers that need to be configured in the I2C controller of the south bridge HM65 include a status register STS, a control register CNT, a command register CMD, an address register S L VA, and a data register D0.
The IO chips B and D receive control commands from the I2C controller of the south bridge HM65, and have two ports port 0 and port 1, each of which includes 8 inputs and outputs. Command words 0 and 1 represent input registers that access port 0 and port 1; command words 2 and 3 represent output registers that access port 0 and port 1; command words 4 and 5 represent the polarity registers that access port 0 and port 1; command words 6 and 7 indicate that the configuration registers of port 0 and port 1 are accessed, setting the configuration register to 1 indicates setting the corresponding pin to input mode, and setting the configuration register to 0 indicates setting the corresponding pin to output mode.
The output signal of the electronic device to be tested, that is, the discrete input signal shown in fig. 2, is generally in a high-voltage working range, and after the discrete input signal of the high voltage passes through the optocoupler, the output signal of the optocoupler is used as the input signal of the transparent D-type trigger. The optocoupler not only plays an isolation role, but also transitions a high-voltage working range to a low-voltage working range, so that the optocoupler can protect vehicle-mounted, airborne and ship-mounted electronic equipment, and prevent the electronic equipment from being broken down and damaged.
Input signals of the vehicle-mounted electronic equipment, the aircraft-mounted electronic equipment and the ship-based electronic equipment are output signals shown in fig. 2, and through the signals, the electronic equipment to be tested can obtain simulated state information of the vehicle-mounted electronic equipment, the aircraft-mounted electronic equipment and the ship-based electronic equipment or receive simulated control information from the vehicle-mounted electronic equipment, the aircraft-mounted electronic equipment and the ship-based electronic equipment.
As shown in FIG. 2, the IO chip B is set to input mode, it receives the output signals from the output terminals (Q0-Q15) of the transparent D-type flip-flop, and the process of the transparent D-type flip-flop correctly latching and transmitting the input signals (D0-D15) to the output terminals (Q0-Q15) needs to be triggered when the/OE and/L E signals are valid, and the control chip A satisfies the timing control of the signals of the transparent D-type flip-flop/OE and/L.
Fig. 3 is a flowchart illustrating a discrete input signal processing method in the discrete input signal testing method according to the embodiment of the present invention. As shown in fig. 3, in conjunction with the system for testing discrete input and output signals shown in fig. 2, the method for processing discrete input signals includes the following steps:
s31, the IO chip B works in an input mode;
specifically, the IO chip B is set to the input mode by the I2C controller of the south bridge HM65, while the control chip a is emulated as an I2C device, also receiving commands and control from the I2C controller of the south bridge HM 65;
s32, outputting the discrete input signal to the input end of the transparent D-type trigger through an optical coupler;
specifically, discrete input signals are output to the input ends (D0-D15) of the transparent D-type trigger through optical couplers;
s33, the control chip A outputs a low level signal;
specifically, the control chip A outputs an effective low level signal;
s34, the/L E and/OE signals of the transparent D type flip-flop are valid;
s35, the IO chip B collects and outputs the output end signal of the transparent D-type trigger;
specifically, signals of output ends (Q0-Q15) of the transparent D-type trigger are locked, collected and output by an IO chip B;
s36, acquiring an output end signal of the IO chip B;
specifically, the I2C controller of the south bridge HM65 may obtain discrete input signals of the current vehicle-mounted, aircraft-mounted, and ship-mounted electronic device by accessing the input ports port 0 and port 1 of the IO chip B.
Fig. 4 is a flowchart illustrating a discrete output signal processing method in a discrete input signal testing method according to an embodiment of the present invention. As shown in fig. 4, in conjunction with the system for testing discrete input and output signals shown in fig. 2, the method for processing discrete output signals includes the following steps:
s41, the IO chip D works in an output mode;
specifically, when a discrete output signal needs to be sent to the electronic device to be tested, the IO chip D is set to the output mode by the I2C controller of the south bridge HM65, and the control chip C is simulated as an I2C device, and also receives a command and control from the I2C controller of the south bridge HM 65;
s42, the control chip C outputs a low level signal enable edge to trigger a/OE signal of the D-type flip-flop;
specifically, the/OE signal of the edge triggered D type flip-flop is active low, while the C L K signal is active on the edge triggered rising edge;
s43, outputting the control signal to the input end of the IO chip D and outputting the control signal to the input end of the edge-triggered D-type trigger;
specifically, the I2C controller of the south bridge HM65 connects the output of the control chip C to the/OE signal of the edge-triggered D-type flip-flop, which is always at a low level, that is, the/OE signal of the edge-triggered D-type flip-flop is always in an active state;
s44, the control chip C outputs a/C L K signal of a rising edge signal enabling edge triggering D-type flip-flop;
specifically, the I2C controller of the south bridge HM65 sets the output end pin of the IO chip D to be a required high-low level control signal and outputs the control signal to the input end (D0-D15) of the edge-triggered D-type flip-flop, and the control chip C outputs an edge rising edge signal to the/C L K signal of the edge-triggered D-type flip-flop;
s45, the edge triggers the D-type trigger to collect the input end signal and output the signal to the Lindun tube;
specifically, the edge triggered D-type trigger collects signals of input ends (D0-D15), outputs the signals to output ends (Q0-Q15) and outputs the signals to a Lindun tube;
s46, outputting discrete output signals after the driving capability is improved through a Darlington tube;
specifically, the driving capability is improved through the Darlington tube, and then the discrete output signal is output and sent to the electronic equipment to be tested to serve as the discrete input signal of the electronic equipment to be tested.
Fig. 5 shows a test interface of a test system for discrete input and output signals according to an embodiment of the present invention, where the two uppermost paths are discrete input signals of the test system for receiving discrete output signals of an electronic device to be tested as the discrete input and output signals, and the two lowermost paths are discrete input signals of the test system for outputting output signals of the discrete input and output signals to the electronic device to be tested as the discrete input signals thereof.
The discrete output signal of the electronic device to be tested can be used as the input signal of the discrete input signal processing module, the output signal of the discrete output signal processing module is sent to the electronic device to be tested and used as the input signal of the electronic device to be tested, and through the signals, the electronic device to be tested can obtain the simulated state information of the vehicle-mounted electronic device, the aircraft-mounted electronic device and the ship-mounted electronic device or receive the simulated control information from the vehicle-mounted electronic device, the aircraft-mounted electronic device and the ship-mounted electronic device, so that the vehicle-mounted electronic device, the aircraft-mounted electronic device and the ship-mounted electronic device can be simulated to test the device to be tested.
The above description is only for the specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (5)
1. The system for testing the discrete input and output signals is characterized by comprising a main control chip, at least one discrete input signal processing module and at least one discrete output signal processing module, wherein the main control chip comprises an I2C controller; one end of the discrete input signal processing module is connected with the electronic equipment to be tested, and the other end of the discrete input signal processing module is connected with the I2C controller; one end of the discrete output signal processing module is connected with the electronic equipment to be tested, and the other end of the discrete output signal processing module is connected with the I2C controller;
the discrete input signal processing module is used for receiving a discrete output signal of an electronic device to be tested, taking the discrete output signal of the electronic device to be tested as a discrete input signal, and processing the discrete input signal under the control of the I2C controller, so that the level state of the discrete input signal is kept unchanged;
the discrete output signal processing module is used for generating a discrete output signal under the control of the I2C controller, processing the discrete output signal to keep the level state of the discrete output signal unchanged, and sending the discrete output signal to the electronic equipment to be tested as a discrete input signal of the electronic equipment to be tested;
the discrete input signal processing module comprises a first control chip, a first IO chip, a transparent D-type trigger and an optocoupler; the input end of the optocoupler is connected with electronic equipment to be tested, and the output end of the optocoupler is connected with the input end of the transparent D-type trigger; the output end of the transparent D-type trigger is connected with the input end of the first IO chip, and the enable end of the transparent D-type trigger is connected with the output end of the first control chip; the I2C controller is connected with the first control chip and the first IO chip; discrete output signals of the electronic device to be tested are used as discrete input signals of the discrete input signal processing module and are output to the input end of the transparent D-type trigger through the optical coupler, the first control chip generates a time sequence control signal under the control of the I2C controller to trigger the enabling end of the transparent D-type trigger, so that the discrete input signals are correctly latched and transmitted to the output end of the transparent D-type trigger, and the first IO chip collects and outputs the discrete input signals through the output end of the transparent D-type trigger;
the discrete output signal processing module comprises a second control chip, a second IO chip, an edge triggered D-type trigger and a Darlington tube; the I2C controller is connected with the second control chip and the second IO chip, the output end of the second control chip is connected with the enabling end of the edge-triggered D-type trigger, the output end of the second IO chip is connected with the input end of the edge-triggered D-type trigger, the output end of the edge-triggered D-type trigger is connected with the input end of the Darlington tube, and the output end of the Darlington tube is connected with the electronic equipment to be tested; the second IO chip is in under the control of I2C controller, produce discrete output signal, and send to the input of border trigger D type trigger, the second control chip is in produce sequential control signal under the control of I2C controller, trigger the enable end of border trigger D type trigger makes discrete output signal correctly latch and transmit extremely the output of border trigger D type trigger, and the warp the darlington pipe is handled the back and is sent to the electronic equipment that awaits measuring, is regarded as the discrete input signal of the electronic equipment that awaits measuring.
2. The discrete input-output signal test system according to claim 1, wherein the master control chip is a south bridge HM 65.
3. The discrete input and output signal testing system according to claim 1, wherein the first control chip is an FPGA or an MCU; the first IO chip is PCA 9555.
4. The discrete input and output signal testing system according to claim 1, wherein the second control chip is an FPGA or an MCU; the second IO chip is PCA 9555.
5. A method for testing discrete input and output signals, comprising:
the discrete input signal processing module receives a discrete output signal of the electronic device to be tested, takes the discrete output signal of the electronic device to be tested as a discrete input signal, and processes the discrete input signal under the control of the I2C controller, so that the level state of the discrete input signal is kept unchanged;
the discrete output signal processing module generates a discrete output signal under the control of the I2C controller, processes the discrete output signal to keep the level state of the discrete output signal unchanged, and sends the discrete output signal to the electronic equipment to be tested as a discrete input signal of the electronic equipment to be tested;
the I2C controller is located in a main control chip, the discrete input signal processing module and the discrete output signal processing module are both at least one, one end of the discrete input signal processing module is connected with the electronic equipment to be tested, and the other end of the discrete input signal processing module is connected with the I2C controller; one end of the discrete output signal processing module is connected with the electronic equipment to be tested, and the other end of the discrete output signal processing module is connected with the I2C controller;
the discrete input signal processing module comprises a first control chip, a first IO chip, a transparent D-type trigger and an optocoupler; the discrete output signal of the electronic equipment to be tested is used as the discrete input signal of the discrete input signal processing module and is output to the input end of the transparent D-type trigger through the optical coupler; the first control chip generates a timing control signal under the control of the I2C controller, and triggers an enable end of the transparent D-type flip-flop, so that the discrete input signal is correctly latched and transmitted to an output end of the transparent D-type flip-flop; the first IO chip collects and outputs the discrete input signal through the output end of the transparent D-type trigger;
the discrete output signal processing module comprises a second control chip, a second IO chip, an edge triggered D-type trigger and a Darlington tube; the second IO chip generates a discrete output signal under the control of the I2C controller and sends the discrete output signal to the input end of the edge-triggered D-type trigger; the second control chip generates a timing control signal under the control of the I2C controller, and triggers an enable end of the edge-triggered D-type flip-flop, so that the discrete output signal is correctly latched and transmitted to an output end of the edge-triggered D-type flip-flop; and the discrete output signal is processed by the Darlington tube and then is sent to the electronic equipment to be tested as a discrete input signal of the electronic equipment to be tested.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510740780.8A CN106646010B (en) | 2015-11-02 | 2015-11-02 | System and method for testing discrete input and output signals |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510740780.8A CN106646010B (en) | 2015-11-02 | 2015-11-02 | System and method for testing discrete input and output signals |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106646010A CN106646010A (en) | 2017-05-10 |
| CN106646010B true CN106646010B (en) | 2020-07-17 |
Family
ID=58851266
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510740780.8A Active CN106646010B (en) | 2015-11-02 | 2015-11-02 | System and method for testing discrete input and output signals |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106646010B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101435842A (en) * | 2008-12-12 | 2009-05-20 | 江西洪都航空工业集团有限责任公司 | Multifunctional integrated test system |
| CN102331963A (en) * | 2010-07-13 | 2012-01-25 | 研祥智能科技股份有限公司 | Digital input and output interface test tool and test method |
| CN205028155U (en) * | 2015-09-25 | 2016-02-10 | 西安太世德航空电器有限公司 | Discrete magnitude input and output signals detects structure |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7340543B2 (en) * | 2003-09-24 | 2008-03-04 | Lockheed Martin Corporation | Device and method for discrete signal conditioning |
-
2015
- 2015-11-02 CN CN201510740780.8A patent/CN106646010B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101435842A (en) * | 2008-12-12 | 2009-05-20 | 江西洪都航空工业集团有限责任公司 | Multifunctional integrated test system |
| CN102331963A (en) * | 2010-07-13 | 2012-01-25 | 研祥智能科技股份有限公司 | Digital input and output interface test tool and test method |
| CN205028155U (en) * | 2015-09-25 | 2016-02-10 | 西安太世德航空电器有限公司 | Discrete magnitude input and output signals detects structure |
Non-Patent Citations (1)
| Title |
|---|
| 数字I/O电路的多总线自动测试诊断方法研究;任新建等;《电测与仪表》;20110731;第48卷(第547期);12-15、19 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106646010A (en) | 2017-05-10 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107704346B (en) | SOC chip debugging method and system | |
| US11041907B2 (en) | Method and system for acquisition of test data | |
| CN105790830B (en) | Optical module is in position detecting method and device | |
| KR101414720B1 (en) | Functional safety testing device for train control system software and the method thereof | |
| CN104516798B (en) | Wireless one-to-many test system | |
| CN103036740B (en) | To the method for testing of network terminal gigabit ethernet interface signal in a kind of EPON system | |
| CN111090556B (en) | System on chip and USB physical layer test method | |
| CN108287537B (en) | A kind of CAN bus protocol controller test method | |
| CN103530211A (en) | PCIE loop back self-test method based on UVM platform | |
| CN103281226A (en) | MVB bus device address configuration system and method based on TCN | |
| CN105204485A (en) | Digital electric power stability control system tester | |
| CN108885573A (en) | Safety device | |
| CN111025046B (en) | Test system, method for controlling matrix switch and storage medium | |
| CN106646010B (en) | System and method for testing discrete input and output signals | |
| CN107329427A (en) | A kind of M П И bus marcos and information recording method and system | |
| US9804217B2 (en) | EMC test bench comprising an item of equipment under test which is intended to be loaded on board an aircraft | |
| US9769051B2 (en) | Demarcation unit enclosure and method | |
| CN203416256U (en) | Differential balance MIL-STD-1553A/B signal repeater | |
| CN103067241A (en) | Controller area network (CAN) bus signal transmission device and test system | |
| US20140215106A1 (en) | Svid data test system and method | |
| CN211375588U (en) | Multi-debugging interface switching circuit | |
| JP4736135B2 (en) | Internal bus analysis system for inter-card communication, method and program | |
| KR101649790B1 (en) | Feeder terminal unit | |
| CN103701660A (en) | Ethernet equipment connection device and testing system and method applied thereby | |
| CN106469104A (en) | A kind of multichannel PCB coupling assembly test device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20230704 Address after: 518057 1701, Yanxiang science and technology building, 31 Gaoxin middle Fourth Road, Maling community, Yuehai street, Nanshan District, Shenzhen City, Guangdong Province Patentee after: Yanxiang smart IOT Technology Co.,Ltd. Patentee after: BEIJING EVOC INTELLIGENT TECHNOLOGY Co.,Ltd. Address before: 518057 floor 5, No. 1, chuangxiang place, Yanxiang Zhigu, No. 11, Gaoxin Road, Guangming New Area, Shenzhen, Guangdong Patentee before: BEIJING EVOC INTELLIGENT TECHNOLOGY Co.,Ltd. Patentee before: EVOC INTELLIGENT TECHNOLOGY Co.,Ltd. |