CN106601588A - Manufacturing method of silicon oxide passivation layer - Google Patents
Manufacturing method of silicon oxide passivation layer Download PDFInfo
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- CN106601588A CN106601588A CN201611109290.9A CN201611109290A CN106601588A CN 106601588 A CN106601588 A CN 106601588A CN 201611109290 A CN201611109290 A CN 201611109290A CN 106601588 A CN106601588 A CN 106601588A
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- passivation layer
- silicon
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- silicon oxide
- oxide passivation
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 title claims abstract description 81
- 238000002161 passivation Methods 0.000 title claims abstract description 53
- 229910052814 silicon oxide Inorganic materials 0.000 title claims abstract description 43
- 238000004519 manufacturing process Methods 0.000 title abstract description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 51
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 49
- 239000010703 silicon Substances 0.000 claims abstract description 49
- 229910052751 metal Inorganic materials 0.000 claims abstract description 45
- 239000002184 metal Substances 0.000 claims abstract description 45
- 238000000034 method Methods 0.000 claims abstract description 45
- 238000000137 annealing Methods 0.000 claims abstract description 25
- 238000002360 preparation method Methods 0.000 claims description 42
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 33
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 33
- 238000000151 deposition Methods 0.000 claims description 26
- 230000008021 deposition Effects 0.000 claims description 18
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 18
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 14
- 239000001301 oxygen Substances 0.000 claims description 14
- 229910052760 oxygen Inorganic materials 0.000 claims description 14
- 229910000449 hafnium oxide Inorganic materials 0.000 claims description 3
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 claims description 3
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 claims description 3
- 229910001928 zirconium oxide Inorganic materials 0.000 claims description 3
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims description 2
- 150000001875 compounds Chemical class 0.000 claims description 2
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 claims description 2
- 230000008569 process Effects 0.000 abstract description 26
- 230000008901 benefit Effects 0.000 abstract description 3
- 230000003647 oxidation Effects 0.000 abstract description 3
- 238000007254 oxidation reaction Methods 0.000 abstract description 3
- 239000010410 layer Substances 0.000 description 49
- 239000000377 silicon dioxide Substances 0.000 description 19
- 101001073212 Arabidopsis thaliana Peroxidase 33 Proteins 0.000 description 15
- 101001123325 Homo sapiens Peroxisome proliferator-activated receptor gamma coactivator 1-beta Proteins 0.000 description 15
- 102100028961 Peroxisome proliferator-activated receptor gamma coactivator 1-beta Human genes 0.000 description 15
- 238000009792 diffusion process Methods 0.000 description 13
- 239000004411 aluminium Substances 0.000 description 10
- 229910052782 aluminium Inorganic materials 0.000 description 10
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 10
- 238000005245 sintering Methods 0.000 description 9
- 239000007789 gas Substances 0.000 description 8
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 7
- 238000004140 cleaning Methods 0.000 description 7
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 6
- 238000004062 sedimentation Methods 0.000 description 6
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 4
- 230000008859 change Effects 0.000 description 4
- 230000000052 comparative effect Effects 0.000 description 4
- 229910052593 corundum Inorganic materials 0.000 description 4
- 239000013078 crystal Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 235000008216 herbs Nutrition 0.000 description 4
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 4
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 4
- 229910052698 phosphorus Inorganic materials 0.000 description 4
- 239000011574 phosphorus Substances 0.000 description 4
- 210000002268 wool Anatomy 0.000 description 4
- 229910001845 yogo sapphire Inorganic materials 0.000 description 4
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 3
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 3
- 229910021529 ammonia Inorganic materials 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 229910001882 dioxygen Inorganic materials 0.000 description 3
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 3
- 229910000077 silane Inorganic materials 0.000 description 3
- 229910052786 argon Inorganic materials 0.000 description 2
- 238000006388 chemical passivation reaction Methods 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000003628 erosive effect Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 125000004430 oxygen atom Chemical group O* 0.000 description 2
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- QCWXUUIWCKQGHC-UHFFFAOYSA-N Zirconium Chemical compound [Zr] QCWXUUIWCKQGHC-UHFFFAOYSA-N 0.000 description 1
- 230000003667 anti-reflective effect Effects 0.000 description 1
- 125000004429 atom Chemical group 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- LIWAQLJGPBVORC-UHFFFAOYSA-N ethylmethylamine Chemical compound CCNC LIWAQLJGPBVORC-UHFFFAOYSA-N 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910052735 hafnium Inorganic materials 0.000 description 1
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000004615 ingredient Substances 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 125000002524 organometallic group Chemical group 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000002002 slurry Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000005477 sputtering target Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 239000013589 supplement Substances 0.000 description 1
- 238000010301 surface-oxidation reaction Methods 0.000 description 1
- 239000013077 target material Substances 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- VXUYXOFXAQZZMF-UHFFFAOYSA-N titanium(IV) isopropoxide Chemical compound CC(C)O[Ti](OC(C)C)(OC(C)C)OC(C)C VXUYXOFXAQZZMF-UHFFFAOYSA-N 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- 230000007306 turnover Effects 0.000 description 1
- 229910052726 zirconium Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
- H01L31/182—Special manufacturing methods for polycrystalline Si, e.g. Si ribbon, poly Si ingots, thin films of polycrystalline Si
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The invention discloses a manufacturing method of a silicon oxide passivation layer. The method comprises the following steps of manufacturing an oxide film of IVB family metal on a silicon chip surface; annealing the silicon chip which is manufactured with the oxide film of IVB family metal; and during an annealing process, forming the silicon oxide passivation layer at an interface between the silicon chip and the oxide film of the IVB family metal. The silicon oxide passivation layer is formed during the annealing process, the annealing process can be performed in existing routine equipment, a high-temperature thermal oxidation process and the equipment do not need to be specially introduced, and advantages that a mass production threshold is low, operation cost is low and a process is short are possessed.
Description
Technical field
The invention belongs to crystal silicon photovoltaic cell preparing technical field, and in particular to a kind of preparation side of silicon oxide passivation layer
Method.
Background technology
Conventional aluminium back surface field battery front side is passivated using SiN, and the back side sinters to form aluminium back surface field using aluminium paste, and unspecial is blunt
Change layer, the electrical property of the structure battery basically reaches bottleneck, and improved efficiency is difficult.Now, the crystal silicon solar batteries back side is combined
The impact of problem has been highlighted.In order to solve this problem, the crystal silicon solar batteries structure of passivating back is occurred in that, i.e.,
SiO is prepared in cell backside2、Al2O3Etc. various deielectric-coating, the back side is passivated, significantly reduces back side recombination probability and lift electricity
The overall effectively carrier lifetime in pond, by polycrystalline absolute efficiency 0.5～0.8% is lifted, and monocrystalline absolute efficiency lifts 0.8～1%, due to
Employ passivating back and be referred to as PERC（passivated emitter and rear cell）Battery.
The back of the body passivation of the volume production of PERC batteries at present is achieved in that in cell backside depositing Al2O3, using Al2O3It is fixed
Negative electricity electric charge, in p-type battery back surface stationary electric field layer can be formed, and repelled negative electrical charge and rearwardly spread, and reduce positive and negative charge
The probability that meets further realizes passivating back, is a kind of preferable passivating film.Although mono-layer oxidized aluminium can be protected in normal sintering
The good passivation effect of card, but due to trimethyl aluminium（TMA）Price is very high, it is necessary to the consumption of TMA source gas is reduced, with thinner
Alumina layer is obtaining good passivation effect.Due to when aluminum oxide is used as back side P+During layer passivation, can Jing in postchannel process
Aluminium paste erosion is gone through, aluminum oxide is weak to the chemical composition resistance in aluminium paste, causes later process process window very narrow and can lose blunt
Change effect.Thus Al2O3Need to plate layer of sin x protective layer again after plated film.Nitridation silicon covering layer can resist aluminium paste sintering and corrode,
Improve passivation layer stability, and then widen process window, while the hydrogen in silicon nitride can through alumina layer to silicon chip surface more
Further chemical passivation, reduces defect concentration.However, when being passivated using aluminum oxide/silicon nitride stack, there is problems with：
The alumina deposit system for introducing panel PECVD or ALD, the current rank of price average 20,000,000 of these systems is needed to enter
Enter threshold very high；Trimethyl aluminium is used as organometallic sources, and expensive production cost is high；Dimension in daily production simultaneously to equipment
Shield cost is also very high.
It is the passivating back for realizing battery on the basis of not increase equipment, generally also silica is generated using thermal oxide
Chemical passivation is carried out to silicon chip surface.This layer of silica can form good passivation to p layers and n-type surface, and Jing is frequently as too
The passivation layer of positive energy cell backside；Simultaneously when silicon oxide layer thickness is more than 100nm, additionally it is possible to form good back reflection.Greatly
Width reduces the fund and equipment investment of PERC battery volume productions.However, existing in the method for existing thermal oxide generation silicon nitride following
Problem：（1）The speed that thermal oxide generates silica is very slow, and the high temperature needed for thermal oxide（Up to 900 DEG C）Thermal defect can be introduced,
It is particularly fatal especially for polycrystalline battery so as to battery body life time is greatly reduced；（2）The silica that thermal oxide is generated is very
Unstable, generally protected using covering aluminum oxide or silicon nitride layer, nonetheless when temperature is more than 500 DEG C of passivation effects
To deteriorate, and the high temperature that the postchannel process Jing of photovoltaic cell often has more than 500 DEG C is present；（3）The pipe of current deposited silicon nitride
Formula PECVD device only up to maintain 600 DEG C of temperature, it is impossible to generate silica for thermal oxide, thus thermal oxide is generated
Silica can not be completed in existing equipment, that is to say, that need to increase the equipment and increase processing procedure number dedicated for thermal oxide
Amount, but this can affect production capacity and cost.
The content of the invention
The technical problem to be solved in the present invention is to overcome the deficiencies in the prior art, there is provided a kind of volume production threshold is low, run into
The preparation method of the short silicon oxide passivation layer of this low, processing procedure.
To solve above-mentioned technical problem, the present invention is employed the following technical solutions：
A kind of preparation method of silicon oxide passivation layer, comprises the following steps：
（1）The sull of group ivb metal is prepared in silicon chip surface；
（2）The silicon chip for having the sull of group ivb metal to preparation is annealed, in silicon chip and the oxygen of group ivb metal
The interface of compound film forms silicon oxide passivation layer.
In the preparation method of above-mentioned silicon oxide passivation layer, it is preferred that the sull of the group ivb metal is oxygen
Change titanium, zirconium oxide or hafnium oxide.
In the preparation method of above-mentioned silicon oxide passivation layer, it is preferred that the thickness of the sull of the group ivb metal
Spend for 5nm～50nm.
In the preparation method of above-mentioned silicon oxide passivation layer, it is preferred that the sull of the group ivb metal is adopted
The method of vapour deposition is prepared.It is furthermore preferred that the method for the vapour deposition is PECVD, magnetron sputtering method or atom
Layer sedimentation.
In the preparation method of above-mentioned silicon oxide passivation layer, it is preferred that the annealing is carried out under oxygen atmosphere.
In the preparation method of above-mentioned silicon oxide passivation layer, it is preferred that the temperature of the annealing is 400 DEG C～700 DEG C；Institute
The time for stating annealing is 10min～40min.
In the preparation method of above-mentioned silicon oxide passivation layer, it is preferred that the step（1）In be additionally included in iv B
Silicon nitride film is prepared on the sull of race's metal.
In the preparation method of above-mentioned silicon oxide passivation layer, it is preferred that the thickness of the silicon nitride film be 50nm～
200nm。
In the preparation method of above-mentioned silicon oxide passivation layer, it is preferred that the silicon nitride film is prepared into using PECVD
Arrive.
In the preparation method of above-mentioned silicon oxide passivation layer, it is preferred that the silicon chip is p-type silicon chip or n-type silicon chip.
Compared with prior art, it is an advantage of the current invention that：
1st, the invention provides a kind of preparation method of silicon oxide passivation layer, prepares group ivb metal in silicon chip surface first
Sull, so anneals to the silicon chip of sull that preparation has group ivb metal, in annealing process silicon chip with
The interface of the sull of group ivb metal forms silicon oxide passivation layer.Iv B is prepared in the present invention in silicon chip surface
The sull of race's metal, the sull of wherein group ivb metal is a kind of diaphragm, due to this layer of Group IVB metal
Sull presence, experience later process high temperature sintering when, the sull ensure that silicon oxide passivation layer
Uniformity and stability, while in silicon oxide passivation layer is prepared as oxygen originate, be silicon chip surface generate it is oxide passivated
Layer provides oxygen atom.Silicon oxide passivation layer is formed in annealing process in the present invention, and the annealing process can be in existing conventional equipment
In carry out, introduce high-temperature thermal oxidation process and equipment without the need for special, that is to say, that the annealing process of the present invention can be integrated into existing
In conventional equipment and preparation technology, using existing equipment and technique silicon oxide passivation layer is prepared.Such as, annealing process of the invention
Can complete in the depositing device of silicon nitride front surface antireflection film, annealing process can be integrated into silicon nitride front antireflective film
In technique.As can be seen here, preparation method of the invention has the advantages that volume production threshold is low, operation cost is low, processing procedure is short.
2nd, in preparation method of the invention, annealed under oxygen atmosphere, oxygen atom can penetrate Group IVB metal
Sull is that silicon chip surface oxidation supplements oxygen source, and then generates finer and close silicon oxide layer.Meanwhile, the annealing of the present invention
Temperature is 400 DEG C～700 DEG C, and the reaction temperature for comparing thermal oxide generation silica is greatly reduced, and this avoids silicon chip and lives through
Many pyroprocesses, and then thermal defect caused by high temperature institute is eliminated, and it is shorter the time required to annealing, advantageously reduce and produce into
This.
3. in the preparation method of the present invention, silicon nitride film is prepared on the sull of group ivb metal, should
Silicon nitride film can be good at resisting the erosion of aluminium paste sintering and ensure passivation, so as to ensure the oxide of Group IVB metal
Stability of the film in sintering process, so as to overcome due to having overleaf printing aluminium paste and high temperature sintering, aluminium in postchannel process
Glass ingredient in slurry easily corrodes the sull of silica and Group IVB metal the problems such as cause oxide passivated failure.
Specific embodiment
Below in conjunction with concrete preferred embodiment, the invention will be further described, but not thereby limiting the invention
Protection domain.
Material and instrument employed in following examples is commercially available.
Embodiment 1：
A kind of preparation method of the silicon oxide passivation layer of the present invention, comprises the following steps：
（1）By p-type vertical pulling making herbs into wool monocrystalline silicon piece（Ω cm～3 Ω the cm of resistivity 1,150 μm of thickness, length of side 156.75mm ×
156.75mm）Phosphorus diffusion is carried out, 65～75 ohm of N-type surface square resistance after diffusion.Then two are carried out to the silicon chip after diffusion
Secondary cleaning.
（2）Jing after secondary cleaning, the method using vapour deposition is thin in the oxide that silicon chip back side prepares group ivb metal
Film, the wherein sull of group ivb metal are titanium oxide, and thickness is 20nm.The method of the vapour deposition for being adopted for
PECVD, its technological parameter is：Deposition pressure 0.15mbar, 300 DEG C of depositing temperature, radio-frequency power 1200W, oxygen flow
1000sccm, isopropyl titanate fluid flow is 600mL/min, takes source gases argon flow 800sccm, sedimentation time 5min.
（3）Using plasma CVD method（PECVD）In step（2）The oxide of the group ivb metal of preparation
One layer of silicon nitride film is prepared on film, thickness is 120nm.The technological parameter of the PECVD for being adopted for：Deposition pressure
0.15mbar, 450 DEG C of depositing temperature, microwave power 3000W, silane gas flow rate 190sccm, ammonia flow 600sccm, during deposition
Between, sedimentation time 5min.
（4）By step（3）Middle preparation has the sull of group ivb metal and the silicon chip of silicon nitride film in oxygen gas
Annealed under atmosphere.Annealing device therefor is Tubular PECVD device, and the temperature of annealing is 450 DEG C, and the time is 20min, oxygen stream
Amount 1000sccm.After annealed process, silicon chip back side silicon forms silica with the interface of the sull of group ivb metal
Passivating film, as silicon oxide passivation layer.Tubular PECVD device used of annealing in the present embodiment as subsequently prepares silicon nitride anti-reflection
The equipment for penetrating film, i.e., annealing process of the invention can be completed in the depositing device of silicon nitride front surface antireflection film, can be by
Annealing process is integrated in silicon nitride anti-reflection film technique.
The silicon chip that silica passivation layer is prepared in the present embodiment is made into PERC batteries, is concretely comprised the following steps：
The front side of silicon wafer for overleaf preparing silica passivating film using Tubular PECVD device prepares silicon nitride anti-reflecting film；So
Laser is utilized afterwards by the sull/slotting on silicon nitride film of oxide passivated film/group ivb metal；Finally, organizine wire mark
Brush and sintering are prepared into PERC batteries.
Embodiment 2：
A kind of preparation method of the silicon oxide passivation layer of the present invention, comprises the following steps：
（1）By p-type vertical pulling making herbs into wool monocrystalline silicon piece（Ω cm～3 Ω the cm of resistivity 1,150 μm of thickness, length of side 156.75mm ×
156.75mm）Phosphorus diffusion is carried out, 65～75 ohm of N-type surface square resistance after diffusion.Silicon chip Jing after diffusion is carried out secondary
Cleaning.
（2）Jing after secondary cleaning, the method using vapour deposition is thin in the oxide that silicon chip back side prepares group ivb metal
Film, the wherein sull of group ivb metal are zirconium oxide, and thickness is 20nm.The method of the vapour deposition for being adopted is for magnetic
Sputtering method is controlled, its technological parameter is：With metal zirconium as sputtering target material, deposition pressure 1.0Pa, sputter gas argon flow amount
1800sccm, reacting gas oxygen flow 240sccm, target-substrate distance 60mm, sedimentation time 5min.
（3）Using plasma CVD method（PECVD）In step（2）The oxide of the group ivb metal of preparation
One layer of silicon nitride film is prepared on film, thickness is 120nm.The technological parameter of the PECVD for being adopted for：Deposition pressure
0.15mbar, 450 DEG C of depositing temperature, microwave power 3000W, silane gas flow rate 190sccm, ammonia flow 600sccm, during deposition
Between 5min.
（4）By step（3）Middle preparation has the sull of group ivb metal and the silicon chip of silicon nitride film in oxygen gas
Annealed under atmosphere, annealing device is the diffusion furnace in crystal silicon cell producing line, wherein the temperature annealed is 450 DEG C, the time
For 20min, oxygen flow 1100sccm.After annealed process, the boundary of the sull of silicon chip back side silicon and group ivb metal
Oxide passivated film, as silicon oxide passivation layer are formed at face.
The silicon chip that silica passivation layer is prepared in the present embodiment is made into PERC batteries, is concretely comprised the following steps：
The front side of silicon wafer for overleaf preparing silica passivating film prepares silicon nitride anti-reflecting film；Then laser is utilized by silica
Sull/the slotting on silicon nitride film of passivating film/group ivb metal；Finally, organizine wire mark brush and sintering are prepared into PERC
Battery.
Embodiment 3：
A kind of preparation method of the silicon oxide passivation layer of the present invention, comprises the following steps：
（1）By p-type vertical pulling making herbs into wool monocrystalline silicon piece（Ω cm～3 Ω the cm of resistivity 1,150 μm of thickness, length of side 156.75mm ×
156.75mm）Phosphorus diffusion is carried out, 65～75 ohm of N-type surface square resistance after diffusion.Silicon chip after diffusion is carried out secondary clear
Wash.
（2）Jing after secondary cleaning, the method using vapour deposition is thin in the oxide that silicon chip back side prepares group ivb metal
Film, the wherein sull of group ivb metal are hafnium oxide, and thickness is 15nm.The method of the vapour deposition for being adopted is for former
Sublayer sedimentation, its technological parameter is：250 DEG C of depositing temperature, deposition cycle 15, the source gas for adopting is four (ethyl-methyl ammonia
Base) hafnium（[(CH3)(C2H5)N]4Hf）And steam.
（3）Using plasma CVD method（PECVD）In step（2）The oxide of the group ivb metal of preparation
One layer of silicon nitride film is prepared on film, thickness is 120nm.The technological parameter of the PECVD for being adopted for：Deposition pressure
0.15mbar, 450 DEG C of depositing temperature, microwave power 3000W, silane gas flow rate 190sccm, ammonia flow 600sccm, during deposition
Between, sedimentation time 5min.
（4）By step（3）Middle preparation has the sull of group ivb metal and the silicon chip of silicon nitride film in oxygen gas
Annealed under atmosphere, annealing device is Tubular PECVD device, and the temperature of annealing is 450 DEG C, and the time is 20min oxygen flows
1000sccm.After annealed process, it is blunt that silicon chip back side silicon forms silica with the interface of the sull of group ivb metal
Change film, as silicon oxide passivation layer.
The silicon chip that silica passivation layer is prepared in the present embodiment is made into PERC batteries, is concretely comprised the following steps：
The front side of silicon wafer for overleaf preparing silica passivating film prepares silicon nitride anti-reflecting film；Then laser is utilized by silica
Sull/the slotting on silicon nitride film of passivating film/group ivb metal；Finally, organizine wire mark brush and sintering are prepared into PERC
Battery.
Comparative example
A kind of preparation method of PERC batteries, comprises the following steps：
（1）By p-type vertical pulling making herbs into wool monocrystalline silicon piece（Ω cm～3 Ω the cm of resistivity 1,150 μm of thickness, length of side 156.75mm ×
156.75mm）Phosphorus diffusion is carried out, 65～75 ohm of N-type surface square resistance after diffusion.Then two are carried out to the silicon chip after diffusion
Secondary cleaning.
（2）Jing after secondary cleaning, using thermal oxidation furnace equipment, oxygen is passed through, silica passivating back is prepared at 850 DEG C
Film, using Tubular PECVD device silicon nitride diaphragm is overleaf prepared, and then turn-over prepares front in Tubular PECVD device
Silicon nitride anti-reflecting film；Then laser is utilized by oxide passivated film/slotting on silicon nitride film；Finally, organizine wire mark brush and burning
Knot is prepared into PERC batteries.
The electrical property of obtained PERC batteries, the test result such as institute of table 1 in test embodiment of the present invention 1-3 and comparative example
Show.As shown in Table 1, the electrical property of the obtained PERC batteries of the present invention is substantially better than the PERC batteries of common process preparation.
Obtained PERC battery electrical properties parameter in embodiment of the present invention 1-3 of table 1 and comparative example
| Case | Transformation efficiency（%） | Open-circuit voltage（mV） | Short circuit current（A） | Fill factor, curve factor（%） |
| Embodiment 1 | 20.5081 | 655 | 9.547 | 80.01 |
| Embodiment 2 | 20.51 | 654.3 | 9.5620 | 79.75 |
| Embodiment 3 | 20.71 | 664.5 | 9.4912 | 80.30 |
| Comparative example | 20.32 | 651.8 | 9.464 | 80.07 |
The above is only the preferred embodiment of the present invention, and protection scope of the present invention is not limited merely to above-described embodiment.
All technical schemes belonged under thinking of the present invention belong to protection scope of the present invention.It is noted that for the art
For those of ordinary skill, improvements and modifications under the premise without departing from the principles of the invention, these improvements and modifications also should be regarded
For protection scope of the present invention.
Claims (10)
1. a kind of preparation method of silicon oxide passivation layer, it is characterised in that comprise the following steps：
（1）The sull of group ivb metal is prepared in silicon chip surface；
（2）The silicon chip for having the sull of group ivb metal to preparation is annealed, in silicon chip and the oxygen of group ivb metal
The interface of compound film forms silicon oxide passivation layer.
2. the preparation method of silicon oxide passivation layer according to claim 1, it is characterised in that the group ivb metal
Sull is titanium oxide, zirconium oxide or hafnium oxide.
3. the preparation method of silicon oxide passivation layer according to claim 2, it is characterised in that the group ivb metal
The thickness of sull is 5nm～50nm.
4. the preparation method of silicon oxide passivation layer according to claim 3, it is characterised in that the group ivb metal
Sull is prepared using the method for vapour deposition.
5. the preparation method of the silicon oxide passivation layer according to any one of Claims 1 to 4, it is characterised in that described to move back
Fire is carried out under oxygen atmosphere.
6. the preparation method of silicon oxide passivation layer according to claim 5, it is characterised in that the temperature of the annealing is
400 DEG C～700 DEG C；The time of the annealing is 10min～40min.
7. the preparation method of the silicon oxide passivation layer according to any one of Claims 1 to 4, it is characterised in that the step
Suddenly（1）In be additionally included on the sull of the group ivb metal and prepare silicon nitride film.
8. the preparation method of silicon oxide passivation layer according to claim 7, it is characterised in that the thickness of the silicon nitride film
Spend for 50nm～200nm.
9. the preparation method of silicon oxide passivation layer according to claim 8, it is characterised in that the silicon nitride film is adopted
PECVD is prepared.
10. the preparation method of the silicon oxide passivation layer according to any one of Claims 1 to 4, it is characterised in that the silicon
Piece is p-type silicon chip or n-type silicon chip.
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| CN107425083A (en) * | 2017-07-26 | 2017-12-01 | 顺德中山大学太阳能研究院 | A kind of lamination back of the body passivation solar cell and preparation method thereof |
| CN108470778A (en) * | 2018-03-30 | 2018-08-31 | 顺德中山大学太阳能研究院 | Solar cell inactivating film and passivating back solar cell and preparation method thereof |
| CN111564530A (en) * | 2020-06-09 | 2020-08-21 | 山西潞安太阳能科技有限责任公司 | Novel crystalline silicon PERC battery front oxide layer preparation process |
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| CN1967787A (en) * | 2002-03-29 | 2007-05-23 | 东京毅力科创株式会社 | Method for forming underlying insulation film |
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| CN107425083A (en) * | 2017-07-26 | 2017-12-01 | 顺德中山大学太阳能研究院 | A kind of lamination back of the body passivation solar cell and preparation method thereof |
| CN108470778A (en) * | 2018-03-30 | 2018-08-31 | 顺德中山大学太阳能研究院 | Solar cell inactivating film and passivating back solar cell and preparation method thereof |
| CN111564530A (en) * | 2020-06-09 | 2020-08-21 | 山西潞安太阳能科技有限责任公司 | Novel crystalline silicon PERC battery front oxide layer preparation process |
| CN111564530B (en) * | 2020-06-09 | 2022-07-29 | 山西潞安太阳能科技有限责任公司 | Novel crystalline silicon PERC battery front oxide layer preparation process |
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