CN106575273B - 用于扩展片上系统的存储器的系统和方法 - Google Patents

用于扩展片上系统的存储器的系统和方法 Download PDF

Info

Publication number
CN106575273B
CN106575273B CN201580044312.5A CN201580044312A CN106575273B CN 106575273 B CN106575273 B CN 106575273B CN 201580044312 A CN201580044312 A CN 201580044312A CN 106575273 B CN106575273 B CN 106575273B
Authority
CN
China
Prior art keywords
memory
soc
virtual
bus
volatile memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201580044312.5A
Other languages
English (en)
Chinese (zh)
Other versions
CN106575273A (zh
Inventor
D·T·全
S·C·希图卢里
Y·李
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of CN106575273A publication Critical patent/CN106575273A/zh
Application granted granted Critical
Publication of CN106575273B publication Critical patent/CN106575273B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0604Improving or facilitating administration, e.g. storage management
    • G06F3/0607Improving or facilitating administration, e.g. storage management by facilitating the process of upgrading existing storage systems, e.g. for improving compatibility between host and storage device
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/06Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • G06F13/1684Details of memory controller using multiple buses
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629Configuration or reconfiguration of storage systems
    • G06F3/0631Configuration or reconfiguration of storage systems by allocating resources to storage systems
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0662Virtualisation aspects
    • G06F3/0665Virtualisation aspects at area level, e.g. provisioning of virtual or logical volumes
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0683Plurality of storage devices
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1048Scalability
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/15Use in a specific computing environment
    • G06F2212/152Virtualized environment, e.g. logically partitioned system
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/17Embedded application
    • G06F2212/171Portable consumer electronics, e.g. mobile phone
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/20Employing a main memory using a specific memory technology
    • G06F2212/206Memory mapped I/O
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/21Employing a record carrier using a specific recording technology
    • G06F2212/214Solid state disk
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/26Using a specific storage system architecture
    • G06F2212/261Storage comprising a plurality of storage devices
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65Details of virtual memory and virtual address translation
    • G06F2212/654Look-ahead translation
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7201Logical to physical mapping or translation of blocks or pages

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Memory System (AREA)
  • Storage Device Security (AREA)
  • Stored Programmes (AREA)
  • Power Sources (AREA)
CN201580044312.5A 2014-08-20 2015-08-13 用于扩展片上系统的存储器的系统和方法 Expired - Fee Related CN106575273B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/464,598 US9823846B2 (en) 2014-08-20 2014-08-20 Systems and methods for expanding memory for a system on chip
US14/464,598 2014-08-20
PCT/US2015/045133 WO2016028607A1 (en) 2014-08-20 2015-08-13 Systems and methods for expanding memory for a system on chip

Publications (2)

Publication Number Publication Date
CN106575273A CN106575273A (zh) 2017-04-19
CN106575273B true CN106575273B (zh) 2019-12-13

Family

ID=54015206

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201580044312.5A Expired - Fee Related CN106575273B (zh) 2014-08-20 2015-08-13 用于扩展片上系统的存储器的系统和方法

Country Status (5)

Country Link
US (1) US9823846B2 (enExample)
EP (1) EP3183661B1 (enExample)
JP (1) JP6297208B2 (enExample)
CN (1) CN106575273B (enExample)
WO (1) WO2016028607A1 (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10582017B2 (en) * 2015-12-24 2020-03-03 Intel Corporation Techniques to provide wireless storage and processing capabilities
US10877885B2 (en) * 2016-06-30 2020-12-29 Huawei Technologies Co., Ltd. Electronic device data operation method and electronic device for improved electronic device storage
EP3333709B1 (en) * 2016-12-06 2019-07-24 NXP USA, Inc. Memory management
US20180335828A1 (en) * 2017-05-19 2018-11-22 Qualcomm Incorporated Systems and methods for reducing memory power consumption via device-specific customization of ddr interface parameters
WO2020132962A1 (zh) * 2018-12-26 2020-07-02 华为技术有限公司 安全元件、数据处理装置及数据处理方法
CN110209360B (zh) * 2019-06-28 2024-08-09 深圳市亿道数码技术有限公司 基于PCIe信号转eMMC的M.2形式的存储装置
CN113595844B (zh) * 2021-08-03 2022-07-08 北京国科天迅科技有限公司 一种数据交互的方法及装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5793620A (en) * 1996-03-12 1998-08-11 Rave Engineering Computer extension board connected to an expansion board
CN101145400A (zh) * 2006-09-13 2008-03-19 上海华虹Nec电子有限公司 内嵌存储器的soc位映射实现方法
CN103942009A (zh) * 2013-01-18 2014-07-23 三星电子株式会社 扩展终端中存储器的设备和方法

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09106370A (ja) * 1995-10-12 1997-04-22 Canon Inc メモリ制御装置及びその方法及び情報処理装置
US6141712A (en) 1998-01-30 2000-10-31 Object Technology Licensing Corporation Apparatus and method for modeling behavior of expansion boards in a computer system
JP3669889B2 (ja) 1999-04-28 2005-07-13 シャープ株式会社 半導体集積回路装置
DE10015193A1 (de) 2000-03-27 2001-10-25 Infineon Technologies Ag Hochintegrierte System-on-Chip-Systeme mit nichtflüchtigen Speichereinheiten
JP4695348B2 (ja) 2004-05-27 2011-06-08 株式会社リコー カード型メモリ、画像形成装置、画像形成装置起動方法
JP2007141066A (ja) * 2005-11-21 2007-06-07 Toshiba Corp 情報処理装置およびメモリアドレス空間割り当て方法
US7613876B2 (en) * 2006-06-08 2009-11-03 Bitmicro Networks, Inc. Hybrid multi-tiered caching storage system
US20080183945A1 (en) * 2007-01-31 2008-07-31 Hughes Nathan J Firmware relocation
US8209463B2 (en) 2008-02-05 2012-06-26 Spansion Llc Expansion slots for flash memory based random access memory subsystem
US8417870B2 (en) * 2009-07-16 2013-04-09 Netlist, Inc. System and method of increasing addressable memory space on a memory board
US8069300B2 (en) * 2008-09-30 2011-11-29 Micron Technology, Inc. Solid state storage device controller with expansion mode
US8341380B2 (en) * 2009-09-22 2012-12-25 Nvidia Corporation Efficient memory translator with variable size cache line coverage
US9032411B2 (en) * 2009-12-25 2015-05-12 International Business Machines Corporation Logical extended map to demonstrate core activity including L2 and L3 cache hit and miss ratio
US8396998B2 (en) * 2010-12-10 2013-03-12 Kingston Technology Corp. Memory-module extender card for visually decoding addresses from diagnostic programs and ignoring operating system accesses
US8959298B2 (en) * 2012-12-10 2015-02-17 Qualcomm Incorporated System and method for managing performance of a computing device having dissimilar memory types
US9110795B2 (en) * 2012-12-10 2015-08-18 Qualcomm Incorporated System and method for dynamically allocating memory in a memory subsystem having asymmetric memory components
US9501222B2 (en) * 2014-05-09 2016-11-22 Micron Technology, Inc. Protection zones in virtualized physical addresses for reconfigurable memory systems using a memory abstraction

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5793620A (en) * 1996-03-12 1998-08-11 Rave Engineering Computer extension board connected to an expansion board
CN101145400A (zh) * 2006-09-13 2008-03-19 上海华虹Nec电子有限公司 内嵌存储器的soc位映射实现方法
CN103942009A (zh) * 2013-01-18 2014-07-23 三星电子株式会社 扩展终端中存储器的设备和方法

Also Published As

Publication number Publication date
JP2017528813A (ja) 2017-09-28
EP3183661A1 (en) 2017-06-28
WO2016028607A1 (en) 2016-02-25
CN106575273A (zh) 2017-04-19
US9823846B2 (en) 2017-11-21
EP3183661B1 (en) 2019-10-23
US20160054928A1 (en) 2016-02-25
JP6297208B2 (ja) 2018-03-20

Similar Documents

Publication Publication Date Title
CN106575273B (zh) 用于扩展片上系统的存储器的系统和方法
US11733869B2 (en) Apparatus and method to share host system RAM with mass storage memory RAM
EP3289465B1 (en) Systems and methods for optimizing memory power consumption in a heterogeneous system memory
US9299457B2 (en) Kernel masking of DRAM defects
CN106681931B (zh) 数据储存设备及其操作方法
US20200218653A1 (en) Controller, data storage device, and operating method thereof
CN107179996B (zh) 数据存储装置和其操作方法
US20160162416A1 (en) Apparatus and Method for Reducing Latency Between Host and a Storage Device
US9189397B2 (en) Data storage device including buffer memory
US9396108B2 (en) Data storage device capable of efficiently using a working memory device
TW202536623A (zh) 記憶體模組、在該記憶體模組中管理操作狀態資料的方法、及主機裝置
US9983930B2 (en) Systems and methods for implementing error correcting code regions in a memory
TW202111543A (zh) 串列記憶體設備i/o模式選擇
US10503406B2 (en) Data storage device and data processing system having the same
US9530466B1 (en) System and method for memory access dynamic mode switching
EP4584686A1 (en) Flexible dual ranks memory system to boost performance
CN108351789A (zh) 电子装置及其启动方法
CN115963977A (zh) 一种固态硬盘及其数据操作方法、装置及电子设备
KR20170048805A (ko) 메모리 장치 및 그 동작 방법
US20250094363A1 (en) Mobile devices and operation methods thereof, systems, and computer-readable storage mediums
US20190235606A1 (en) Hybrid Powering Off Of Storage Component Memory Cells
US11144460B2 (en) Data storage device, data processing system, and operating method of data storage device

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20191213

Termination date: 20210813