CN106569806A - Method achieving adaptive PCIE bandwidth distribution of BIOS, BIOS and motherboard - Google Patents
Method achieving adaptive PCIE bandwidth distribution of BIOS, BIOS and motherboard Download PDFInfo
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- CN106569806A CN106569806A CN201610924430.1A CN201610924430A CN106569806A CN 106569806 A CN106569806 A CN 106569806A CN 201610924430 A CN201610924430 A CN 201610924430A CN 106569806 A CN106569806 A CN 106569806A
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- Prior art keywords
- bios
- type information
- card type
- switching card
- gpio
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
- G06F9/4411—Configuring for operating with peripheral devices; Loading of device drivers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0026—PCI express
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Computer Hardware Design (AREA)
- Computer Security & Cryptography (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
Abstract
The invention discloses a method achieving adaptive PCIE bandwidth distribution of a BIOS. The method comprises the following steps: a GPIO group stores adapter card type information; a BIOS reads the adapter card type information stored in the GPIO group; and the BIOS distributes a PCIE bandwidth according to the adapter card type information. The invention also discloses a BIOS capable of adaptive PCIE bandwidth distribution. The BIOS comprises a PCIE bandwidth distribution data module for storing a configuration table entry formed by matching adapter card type information and a bandwidth configuration plan; an adapter card type information reading module for reading the adapter card type information stored in a GPIO group; and a bandwidth distribution module for generating adapter card slot bandwidth configuration information according to the adapter card type information combined with the preset configuration table entry and for configuring bandwidth.
Description
Technical field
The present invention relates to computer communication technology field, more particularly to a kind of BIOS self-adjusted block PCIE bandwidth of realizing
Method, further relate to it is a kind of can be with the BIOS of self-adjusted block PCIE bandwidth and the mainboard with above-mentioned BIOS.
Background technology
It is well known that server is the core of whole network system and calculating platform, many important data are all stored in
On server, and server has polytype, such as calculation type server, storage-type server, database server etc..Service
The type of device is determined mainly by plugged standby function, therefore the mainboard of same server may be used for inhomogeneity in fact
The server of type.Current plugged standby most of PCIE devices of server, but bandwidth shared by difference PCIE device be it is different,
So it is accomplished by same mainboard and can distributes different PCIE slot.Can be realized by adapter mode on HW at present,
The PCIE slot that mainboard is present after plugging different adapters are just different.Need after slot BIOS and coordinate as HW is distributed
To distribute certain bandwidth to the slot, can this just test BIOS and adaptively distribute different PCIE bandwidth.
Therefore, to those skilled in the art, how to provide it is a set of can be with self-adjusted block difference PCIE bandwidth
Technical problem of the BIOS methods for designing for urgent need to resolve.
The content of the invention
In order to make it easy to understand, to the partial words occurred in present specification, clarifying as follows：
GPIO：General Purpose Input Output, general I/O port, or bus extender；
BIOS：Basic Input Output System, basic input output system；
PCIE：PCI-Express, bus and interface standard.
HW：HardWare, hardware, present specification refer to mainboard.
Based on the technical problem that background technology is present, the present invention proposes one kind and realizes BIOS self-adjusted block PCIE bandwidth
Method, comprise the following steps：
Switching card type information is stored in GPIO groups；
BIOS reads the switching card type information stored in GPIO groups；
BIOS carries out PCIE bandwidth allocations according to switching card type information.
Preferably, BIOS is believed in the step of PCIE breaths carry out PCIE bandwidth allocations, including following step according to switching card type
Suddenly：
Switching card type information is matched to form configuration list item and default in BIOS with band width configuration scheme；
BIOS obtains switching card type information；
BIOS generates adapter slot band width configuration information according to switching card type information and with reference to preset configuration list item；
BIOS is configured to bandwidth according to adapter slot band width configuration information.
Preferably, BIOS reads the switching card type information stored in GPIO groups in starting up's stage.
Preferably, comprise the following steps：
Distribute some GPIO and form GPIO groups, and by switching card type information Store in GPIO groups；
Switching card type information is matched to form configuration list item and default in BIOS with band width configuration scheme；
BIOS reads the switching card type information stored in GPIO groups in starting up's stage；
BIOS generates adapter slot band width configuration information according to switching card type information and with reference to preset configuration list item；
BIOS is configured to bandwidth according to adapter slot band width configuration information；
BIOS is according to switching card type information updating adapter port information.
A kind of method for realizing BIOS self-adjusted block PCIE bandwidth provided in the present invention, is transferred by the storage of GPIO groups
Plate type information, each GPIO have high level and low level two states, according to pinboard number of types, can distribute n
GPIO forms GPIO groups, such that it is able to realize that stored information at most distinguishes 2 in GPIO groupsnPlant switching plate type information to meet
Demand；Further, the different type pinboard how information of configured bandwidth is preset in BIOS, BIOS is by reading GPIO groups
Interior stored switching plate type information, and then distribute PCIE bandwidth, so as to realize to BIOS self-adjusted block PCIE bandwidth；Together
When, BIOS further can be adjusted to the related functional information of PCIE.
The invention allows for a kind of BIOS of self-adjusted block PCIE bandwidth, including：
PCIE bandwidth allocation data modules, match matching somebody with somebody of being formed for storing switching card type information with band width configuration scheme
Put list item；
Switching card type information reading module, for reading the switching card type information stored in GPIO groups；
Bandwidth allocation module, for according to switching card type information, and generates the adapter with reference to preset configuration list item
Slot band width configuration information, and bandwidth is configured.
Preferably, also include：
Information updating module, for being updated to adapter port information according to switching card type information.
The invention allows for a kind of mainboard of the GPIO groups and above-mentioned BIOS including the switching card type information that is stored with.
The technique effect of above-mentioned BIOS and mainboard and realize BIOS self-adjusted block PCIE bandwidth method disclosed in
Technique effect is substantially similar, and here is omitted.
Description of the drawings
Fig. 1 is a kind of schematic flow sheet of method for realizing BIOS self-adjusted block PCIE bandwidth proposed by the present invention.
Specific embodiment
As shown in figure 1, Fig. 1 is a kind of flow process of method for realizing BIOS self-adjusted block PCIE bandwidth proposed by the present invention
Schematic diagram.
With reference to the accompanying drawings and examples the present invention is described in detail.
With reference to Fig. 1, based on Inter server platform frameworks as a example by, a kind of self adaptation difference mainboard disclosed in this invention
BIOS implementation methods, comprise the following steps：
S1：Distribute some GPIO by HW and form GPIO groups, and switching plate type information is stored in GPIO groups；
S2：Bios code reads information in GPIO groups in starting up's stage, obtains switching plate type information；
S3：BIOS extracts slot information on adapter according to switching plate type information, and by PCIE Root in code
Port distributes corresponding bandwidth；
S4：BIOS realizes the dynamic renewal of Root Port information under setup IIO menus according to switching plate type information.
In the above-described embodiments, in S1, there is high level and low level two states using GPIO, GPIO can be passed through
In group, each GPIO is in high level state or low level state according to stipulated form, so as to show pinboard type.
A kind of BIOS of self-adjusted block PCIE bandwidth disclosed in this invention, including：
PCIE bandwidth allocation data modules, match matching somebody with somebody of being formed for storing switching card type information with band width configuration scheme
Put list item；
Switching card type information reading module, for reading the switching card type information stored in GPIO groups；
Bandwidth allocation module, for according to switching card type information, and generates the adapter with reference to preset configuration list item
Slot band width configuration information, and bandwidth is configured；
Information updating module, for being updated to adapter port information according to switching card type information.
A kind of mainboard disclosed in this invention, including the GPIO groups and above-mentioned BIOS of the switching plate type information that is stored with.
The above, the only present invention preferably specific embodiment, but protection scope of the present invention is not limited thereto,
Any those familiar with the art the invention discloses technical scope in, technology according to the present invention scheme and its
Inventive concept equivalent or change in addition, should all be included within the scope of the present invention.
Claims (8)
1. a kind of method for realizing BIOS self-adjusted block PCIE bandwidth, it is characterised in that comprise the following steps：
Switching card type information is stored in GPIO groups；
BIOS reads the switching card type information stored in GPIO groups；
BIOS carries out PCIE bandwidth allocations according to switching card type information.
2. the method for realizing BIOS self-adjusted block PCIE bandwidth according to claim 1, it is characterised in that BIOS according to
In the step of switching card type information carries out PCIE bandwidth allocations, comprise the following steps：
Switching card type information is matched to form configuration list item and default in BIOS with band width configuration scheme；
BIOS obtains switching card type information；
BIOS generates adapter slot band width configuration information according to switching card type information and with reference to preset configuration list item；
BIOS is configured to bandwidth according to adapter slot band width configuration information.
3. the method for realizing BIOS self-adjusted block PCIE bandwidth according to claim 1, it is characterised in that BIOS is being opened
Machine startup stage reads the switching card type information stored in GPIO groups.
4. the method for realizing BIOS self-adjusted block PCIE bandwidth according to claim 1, it is characterised in that also include with
Lower step：
BIOS is according to switching card type information updating adapter port information.
5. the method for realizing BIOS self-adjusted block PCIE bandwidth according to claim 1, it is characterised in that including following
Step：
Distribute some GPIO and form GPIO groups, and by switching card type information Store in GPIO groups；
Switching card type information is matched to form configuration list item and default in BIOS with band width configuration scheme；
BIOS reads the switching card type information stored in GPIO groups in starting up's stage；
BIOS generates adapter slot band width configuration information according to switching card type information and with reference to preset configuration list item；
BIOS is configured to bandwidth according to adapter slot band width configuration information；
BIOS is according to switching card type information updating adapter port information.
6. a kind of BIOS of self-adjusted block PCIE bandwidth, it is characterised in that include：
PCIE bandwidth allocation data modules, match the allocation list to be formed with band width configuration scheme for storing switching card type information
；
Switching card type information reading module, for reading the switching card type information stored in GPIO groups；
Bandwidth allocation module, for according to switching card type information, and generates adapter slot bands with reference to preset configuration list item
Wide configuration information, and bandwidth is configured.
7. the BIOS of self-adjusted block PCIE bandwidth according to claim 6, it is characterised in that also include：
Information updating module, for being updated to adapter port information according to switching card type information.
8. a kind of mainboard, it is characterised in that GPIO groups including the switching card type information that is stored with and as claim 6-7 it is arbitrary
BIOS described in.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610924430.1A CN106569806A (en) | 2016-10-24 | 2016-10-24 | Method achieving adaptive PCIE bandwidth distribution of BIOS, BIOS and motherboard |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610924430.1A CN106569806A (en) | 2016-10-24 | 2016-10-24 | Method achieving adaptive PCIE bandwidth distribution of BIOS, BIOS and motherboard |
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| CN106569806A true CN106569806A (en) | 2017-04-19 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610924430.1A Pending CN106569806A (en) | 2016-10-24 | 2016-10-24 | Method achieving adaptive PCIE bandwidth distribution of BIOS, BIOS and motherboard |
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Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107608926A (en) * | 2017-08-18 | 2018-01-19 | 郑州云海信息技术有限公司 | One kind supports PCIE bandwidth automatic switching control equipment and method based on server |
| CN108959152A (en) * | 2018-07-26 | 2018-12-07 | 郑州云海信息技术有限公司 | A kind of pinboard, the extended method and device for storing equipment |
| CN109766147A (en) * | 2019-01-31 | 2019-05-17 | 郑州云海信息技术有限公司 | A method of updating PCIE silk-screen information in SMBIOS |
| CN110046118A (en) * | 2019-04-22 | 2019-07-23 | 苏州浪潮智能科技有限公司 | A kind of compartment system of PCIE device, method and server system |
| CN110515877A (en) * | 2019-08-26 | 2019-11-29 | 浪潮商用机器有限公司 | A kind of adapter and a kind of control method of adapter |
| CN111124505A (en) * | 2019-10-30 | 2020-05-08 | 苏州浪潮智能科技有限公司 | Configuration method and device of mainboard hardware |
| CN111159085A (en) * | 2019-12-30 | 2020-05-15 | 苏州浪潮智能科技有限公司 | Automatic configuration method of PCIE (peripheral component interface express) bandwidth, server mainboard and server |
| WO2020206879A1 (en) * | 2019-04-11 | 2020-10-15 | 苏州浪潮智能科技有限公司 | Method and device for automatically adapting link width of pcie port, electronic apparatus and storage medium |
| TWI719883B (en) * | 2020-04-13 | 2021-02-21 | 緯創資通股份有限公司 | Electronic device and initialization method thereof |
| CN112631664A (en) * | 2020-12-25 | 2021-04-09 | 曙光信息产业股份有限公司 | Signal distribution method and device, computer equipment and readable storage medium |
| US10983928B2 (en) * | 2019-07-02 | 2021-04-20 | Inventec (Pudong) Technology Corporation | Method and computer program product for automatically configuring PCIe slot |
| CN113220619A (en) * | 2021-04-30 | 2021-08-06 | 山东英信计算机技术有限公司 | Method, system and medium for distributing PCIE channel bandwidth |
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| CN203630695U (en) * | 2013-11-08 | 2014-06-04 | 华为技术有限公司 | Adapter and server |
| CN105302755A (en) * | 2014-06-27 | 2016-02-03 | 曙光信息产业(北京)有限公司 | PCIE board card with monitoring function and monitoring method therefor |
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Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107608926A (en) * | 2017-08-18 | 2018-01-19 | 郑州云海信息技术有限公司 | One kind supports PCIE bandwidth automatic switching control equipment and method based on server |
| CN108959152A (en) * | 2018-07-26 | 2018-12-07 | 郑州云海信息技术有限公司 | A kind of pinboard, the extended method and device for storing equipment |
| CN109766147A (en) * | 2019-01-31 | 2019-05-17 | 郑州云海信息技术有限公司 | A method of updating PCIE silk-screen information in SMBIOS |
| WO2020206879A1 (en) * | 2019-04-11 | 2020-10-15 | 苏州浪潮智能科技有限公司 | Method and device for automatically adapting link width of pcie port, electronic apparatus and storage medium |
| CN110046118A (en) * | 2019-04-22 | 2019-07-23 | 苏州浪潮智能科技有限公司 | A kind of compartment system of PCIE device, method and server system |
| US10983928B2 (en) * | 2019-07-02 | 2021-04-20 | Inventec (Pudong) Technology Corporation | Method and computer program product for automatically configuring PCIe slot |
| CN110515877A (en) * | 2019-08-26 | 2019-11-29 | 浪潮商用机器有限公司 | A kind of adapter and a kind of control method of adapter |
| CN111124505A (en) * | 2019-10-30 | 2020-05-08 | 苏州浪潮智能科技有限公司 | Configuration method and device of mainboard hardware |
| CN111159085A (en) * | 2019-12-30 | 2020-05-15 | 苏州浪潮智能科技有限公司 | Automatic configuration method of PCIE (peripheral component interface express) bandwidth, server mainboard and server |
| CN111159085B (en) * | 2019-12-30 | 2022-02-18 | 苏州浪潮智能科技有限公司 | Automatic configuration method of PCIE (peripheral component interface express) bandwidth, server mainboard and server |
| TWI719883B (en) * | 2020-04-13 | 2021-02-21 | 緯創資通股份有限公司 | Electronic device and initialization method thereof |
| CN112631664A (en) * | 2020-12-25 | 2021-04-09 | 曙光信息产业股份有限公司 | Signal distribution method and device, computer equipment and readable storage medium |
| CN113220619A (en) * | 2021-04-30 | 2021-08-06 | 山东英信计算机技术有限公司 | Method, system and medium for distributing PCIE channel bandwidth |
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