CN106556790A - A kind of silicon hole sensor and detection method, electronic installation - Google Patents
A kind of silicon hole sensor and detection method, electronic installation Download PDFInfo
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- CN106556790A CN106556790A CN201510615978.3A CN201510615978A CN106556790A CN 106556790 A CN106556790 A CN 106556790A CN 201510615978 A CN201510615978 A CN 201510615978A CN 106556790 A CN106556790 A CN 106556790A
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- silicon hole
- ring oscillator
- phase inverters
- silicon
- pmos
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 115
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 114
- 239000010703 silicon Substances 0.000 title claims abstract description 114
- 238000001514 detection method Methods 0.000 title claims abstract description 21
- 238000009434 installation Methods 0.000 title claims abstract description 9
- 230000000694 effects Effects 0.000 claims abstract description 10
- 230000007480 spreading Effects 0.000 claims abstract description 8
- 238000003892 spreading Methods 0.000 claims abstract description 8
- 238000003491 array Methods 0.000 claims abstract description 6
- 238000000034 method Methods 0.000 claims description 7
- 238000005259 measurement Methods 0.000 claims description 4
- 239000004065 semiconductor Substances 0.000 abstract description 12
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 230000004888 barrier function Effects 0.000 description 5
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 239000010936 titanium Substances 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000012212 insulator Substances 0.000 description 3
- 238000002360 preparation method Methods 0.000 description 3
- 229910052719 titanium Inorganic materials 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 238000007689 inspection Methods 0.000 description 2
- 229910052742 iron Inorganic materials 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- SOOUUWLPTTXTBP-UHFFFAOYSA-N C(C)O[Si](OCC)(OCC)OCC.C(CCCCCCCCCCCCCCCCC)(=O)O Chemical compound C(C)O[Si](OCC)(OCC)OCC.C(CCCCCCCCCCCCCCCCC)(=O)O SOOUUWLPTTXTBP-UHFFFAOYSA-N 0.000 description 1
- 229910003978 SiClx Inorganic materials 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Substances [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2601—Apparatus or methods therefor
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R23/00—Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
- G01R23/02—Arrangements for measuring frequency, e.g. pulse repetition rate; Arrangements for measuring period of current or voltage
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
The present invention relates to a kind of silicon hole sensor and detection method, electronic installation.Silicon hole sensor, including:Silicon hole;At least two ring oscillator arrays, mirror image are arranged at the both sides of the silicon hole;Wherein, on the direction away from the silicon hole, each described ring oscillator array at least includes 3 ring oscillators being set up in parallel, wherein each described ring oscillator includes several NMOS phase inverters or PMOS phase inverters, and the ring oscillator including the NMOS phase inverters and the ring oscillator including the PMOS phase inverters are arranged alternately.The present invention provides a kind of silicon hole sensor and detection method to solve problems of the prior art, can be detected by the silicon hole sensor and whether there is in the silicon hole stress, can also further detect whether there is ion spreading effect simultaneously, semiconductor device can be evaluated by the detection, it is further provided the performance of the semiconductor device.
Description
Technical field
The present invention relates to semiconductor applications, in particular it relates to a kind of silicon hole sensor and detection
Method, electronic installation.
Background technology
In consumer electronics field, multifunctional equipment is increasingly liked by consumer, compared to function letter
Single equipment, multifunctional equipment manufacturing process will be more complicated, than if desired for integrated multiple in circuit version
The chip of difference in functionality, thus 3D integrated circuits (integrated circuit, IC) technology is occurred in that, 3D
Integrated circuit (integrated circuit, IC) is defined as a kind of system-level integrated morphology, by multiple cores
Piece is stacked in vertical plane direction, and so as to save space, the marginal portion of each chip can be as needed
Multiple pins are drawn, as needed using these pins, it would be desirable to which the chip of interconnection passes through metal wire
Interconnection, but aforesaid way yet suffers from many deficiencies, and such as stacked chips quantity is more, and chip
Between annexation it is more complicated, it may be desirable to using many metal lines, final wire laying mode is relatively mixed
It is random, and also result in volume increase.
Therefore, mostly adopt in the 3D integrated circuits (integrated circuit, IC) technology at present
Silicon hole (Through Silicon Via, TSV), silicon hole are a kind of to penetrate hanging down for Silicon Wafer or chip
Straight to interconnect, the preparation method of TSV can be drilled (via) with etching or laser mode on Silicon Wafer, then
Filled up with the conductive material such as material such as copper, polysilicon, tungsten, so as to realize the interconnection between different silicon chips.
Although silicon hole is widely used, it has also been found that silicon hole can produce stress significant impact
The performance of device, wherein, device may be subject to radial stress and tangential pressure, and silicon hole is for NMOS
With the stress influence of PMOS be it is diverse, but the at present not detection for silicon hole stress
Sensor.
Additionally, it is moving iron diffusion that another affects the factor of device performance, but do not have at present yet
For the detection structure of moving iron diffusion.
Therefore, in order to improve the performance and yield of semiconductor device, need to silicon hole stress and it is mobile from
The detection of son diffusion is improved.
The content of the invention
A series of concept of reduced forms is introduced in Summary, this will be in specific embodiment
Further describe in part.The Summary of the present invention is not meant to attempt to limit institute
The key feature and essential features of claimed technical scheme, more do not mean that attempt determine it is wanted
Seek the protection domain of the technical scheme of protection.
The present invention is in order to overcome the problem of presently, there are, there is provided a kind of silicon hole sensor, including:
Silicon hole;
At least two ring oscillator arrays, mirror image are arranged at the both sides of the silicon hole;
Wherein, on the direction away from the silicon hole, each described ring oscillator array at least includes
3 ring oscillators being set up in parallel, wherein each described ring oscillator include several NMOS
Phase inverter or PMOS phase inverters, including the ring oscillator and bag of the NMOS phase inverters
The ring oscillator for including the PMOS phase inverters is arranged alternately.
Alternatively, the silicon hole sensor includes four ring oscillator arrays, and mirror image is arranged at respectively
The both sides up and down of the silicon hole and the left and right sides.
Alternatively, two are included at least in described each described ring oscillator by the NMOS phase inverters
The first annular agitator and second ring oscillator being made up of PMOS phase inverters of composition.
Alternatively, the first annular agitator is located near the side of the silicon hole, and described the
The bearing of trend of the grid structure of the phase inverter in one ring oscillator is parallel to the silicon hole;
Second ring oscillator and additional is orderly arranged outside each in the first annular agitator
First annular agitator;Wherein, second ring oscillator and the additional first annular agitator
In the grid structure of phase inverter extend perpendicularly to the silicon hole.
Alternatively, the ring oscillator is in rectangular configuration, wherein the NMOS phase inverters or described
PMOS phase inverters are arranged on the both sides parallel with the silicon hole, perpendicular with the silicon hole
The length on both sides is at least 1U.
Alternatively, the silicon hole sensor further comprises the frequency being connected with the ring oscillator
Rate detects structure.
Present invention also offers a kind of detection method of above-mentioned silicon hole sensor, including:
Step S1:Measurement includes the frequency of the ring oscillator of the NMOS phase inverters;
Step S2:By the frequency of the ring oscillator including the NMOS phase inverters and reference
Value is contrasted, to judge whether silicon hole stress.
Alternatively, in step S2, if the frequency of the ring oscillator is consistent with reference value
Close, then there is no silicon hole stress;There is silicon hole stress if not meeting.
Alternatively, when there is no silicon hole stress, further detection includes the PMOS phase inverters
The frequency of the ring oscillator, if the frequency of the ring oscillator including the PMOS phase inverters
Less than reference value, then there is ion spreading effect.
Present invention also offers a kind of electronic installation, including above-mentioned silicon hole sensor.
The present invention provides a kind of silicon hole sensor and and inspection to solve problems of the prior art
Survey method, can be detected with the presence or absence of stress in the silicon hole by the silicon hole sensor, while
Can also further detect whether there is ion spreading effect, can be to semiconductor device by the detection
Evaluated, it is further provided the performance of the semiconductor device.
Description of the drawings
The drawings below of the present invention is used to understand the present invention in this as the part of the present invention.Show in accompanying drawing
Embodiments of the invention and its description are gone out, for explaining the device and principle of the present invention.In the accompanying drawings,
Fig. 1 is the structural representation of silicon hole sensor described in the embodiment of the invention;
Fig. 2 is the detection method flow chart of silicon hole sensor described in the embodiment of the invention.
Specific embodiment
In the following description, a large amount of concrete details are given to provide to the present invention more thoroughly
Understand.It is, however, obvious to a person skilled in the art that the present invention can be without the need for one
Or multiple these details and be carried out.In other examples, in order to avoid obscuring with the present invention,
For some technical characteristics well known in the art are not described.
It should be appreciated that the present invention can be implemented in different forms, and should not be construed as being limited to this
In the embodiment that proposes.Disclosure will be made thoroughly and complete on the contrary, providing these embodiments, and will be originally
The scope of invention fully passes to those skilled in the art.In the accompanying drawings, in order to clear, Ceng He areas
Size and relative size may be exaggerated.Same reference numerals represent identical element from start to finish.
It should be understood that work as element or layer be referred to as " ... on ", " with ... it is adjacent ", " being connected to " or " coupling
Close " other elements or during layer, which can directly on other elements or layer, adjacent thereto, connection
Or other elements or layer are coupled to, or there may be element between two parties or layer.Conversely, when element is claimed
For " on directly existing ... ", " with ... direct neighbor ", " being directly connected to " or " being directly coupled to " other units
When part or layer, then there is no element between two parties or layer.Although it should be understood that can using term first, the
2nd, the various elements of the third description, part, area, floor and/or part, these elements, part, area,
Layer and/or part should not be limited by these terms.These terms be used merely to distinguish element, part,
Area, floor or part and another element, part, area, floor or part.Therefore, without departing from the present invention
Under teaching, the first element discussed below, part, area, floor or part be represented by the second element,
Part, area, floor or part.
Spatial relationship term for example " ... under ", " ... below ", " below ", " ... under ",
" ... on ", " above " etc., can describe for convenience here and be used so as to describe in figure
A shown element or feature and other elements or the relation of feature.It should be understood that except shown in figure
Orientation beyond, spatial relationship term be intended to also include using and operating in device different orientation.Example
Such as, if the device upset in accompanying drawing, then, it is described as " below other elements " or " its it
Under " or " under which " element or feature will be oriented to other elements or feature " on ".Therefore, example
Property term " ... below " and " ... under " may include it is upper and lower two orientation.Device additionally can take
To (be rotated by 90 ° or other orientation) and spatial description language as used herein is correspondingly explained.
The purpose of term as used herein is only that description specific embodiment and the limit not as the present invention
System.When here is used, " one " of singulative, " one " and " described/should " be also intended to include plural number
Form, unless context is expressly noted that other mode.It is also to be understood that term " composition " and/or " including ",
When using in this specification, the feature, integer, step, operation, element and/or part are determined
Presence, but be not excluded for one or more other features, integer, step, operation, element, part
And/or the presence or addition of group.When here is used, term "and/or" includes any of related Listed Items
And all combinations.
In order to thoroughly understand the present invention, detailed step and detailed knot will be proposed in following description
Structure, to explain technical scheme.Presently preferred embodiments of the present invention is described in detail as follows, but
In addition to these detailed descriptions, the present invention can also have other embodiment.
Embodiment 1
In order to solve problems of the prior art, the invention provides a kind of silicon hole sensor construction,
1 pair of sensor is described further below in conjunction with the accompanying drawings.
The present invention is in order to solve problems of the prior art, there is provided a kind of silicon hole sensor, bag
Include:
Silicon hole 101;
At least two ring oscillator arrays 102, mirror image are arranged at the relative both sides of the silicon hole;
Wherein, on the direction away from the silicon hole, each described ring oscillator array at least includes
3 ring oscillators being set up in parallel, wherein each described ring oscillator include that some NMOS are anti-
Phase device or PMOS phase inverters, the ring oscillator including the NMOS phase inverters and including
The ring oscillator of the PMOS phase inverters is arranged alternately.
Wherein, the silicon hole is arranged in Semiconductor substrate or wafer, wherein the Semiconductor substrate or
Wafer can be at least one in the following material being previously mentioned:Silicon, silicon-on-insulator (SOI), insulation
It is laminated on body on silicon (SSOI), insulator and is laminated SiGe (S-SiGeOI) and germanium on insulator SiClx
(SiGeOI) etc..Other active areas or active device are could be formed with the substrate, here is no longer
Repeat.
Alternatively, the silicon hole include positioned at center conductive layer and be looped around conductive layer outside
Barrier layer 1 and laying.
Wherein, the conductive layer is formed by metal material, and the metal material includes Pt, Au, Cu, Ti
With one or more in W, polysilicon can also be selected, limitation with it is a certain, can realize
Conducting function, preferably Ni metal in the present invention, from Ni metal can not only reduces cost,
And form the technique of the silicon hole and existing process from metallic copper can be compatible with simplifying work
Skill process.
The barrier layer is for the adhesiveness for improving filler metal in silicon hole, in the barrier layer and institute
State what is formed between silicon hole, its thickness is 300-500 angstrom, including in titanium nitride TiN and titanium Ti
Plant or various, the titanium nitride TiN of levels lamination is preferably in of the invention one specifically embodiment
With titanium Ti.
The laying is insulating barrier, and its thickness is 1000-3000 angstrom, but is not limited to the numerical value model
Enclose, the effect of the laying is that metal and substrate in order to prevent from being subsequently filled in silicon hole are led
Logical, the insulating barrier is preferably oxide, can by stearic acid tetraethoxysilane (SATEOS) or
The materials such as tetraethoxysilane (TEOS) are constituted, but be not limited to that the material.
Wherein, the shape of the silicon hole can be cylindricality, for example cylinder or cube cylindricality, and
It is not limited to a certain kind.
The silicon hole is cylinder in this embodiment.
Wherein, the ring oscillator array 102 at least two, for example, can be 4, wherein dividing
Around not being arranged at the silicon hole.It should be noted that the ring oscillator array is not
It is confined to this and enumerates number, can be configured according to specific needs.
Further, in mirror alignment, left and right is relative for the ring oscillator array 102 relative in front and back
The ring oscillator array 102 is also in mirror alignment.
Alternatively, the size of the ring oscillator array is identical with composition, and only position is set in mirror image
Put.
Alternatively, wherein, each described ring oscillator array at least include 3 annulars being set up in parallel
Agitator, wherein each ring oscillator are independently arranged.
First annular agitator is referred to as by the ring oscillator that NMOS phase inverters are constituted in this embodiment
1021, the second ring oscillator 1022 is referred to as by the ring oscillator that PMOS phase inverters are constituted.
Wherein, the NMOS phase inverters are included including at least two in described each described ring oscillator
First annular agitator and one include PMOS phase inverters the second ring oscillator.
Further, some ring oscillators are outwards arranged in order in the side near the silicon hole,
As shown in the part-structure on right side in Fig. 1.Specifically, the first annular agitator 1021 and described
Second ring agitator 1022 is arranged alternately and separate, for example, first annular agitator 1021
In near the side of the silicon hole, second ring oscillator 1022 is located at the first annular vibration
The outside of device 1021, further, is additionally provided with the outside of second ring oscillator 1022 additional
First annular agitator 1021.
Further, the first annular agitator 1021 is located near the side of the silicon hole, and institute
The bearing of trend for stating the grid structure of the NMOS phase inverters in first annular agitator leads to parallel to the silicon
Hole;In second ring oscillator that the outside of the first annular agitator is arranged, PMOS is anti-phase
The grid structure of device extends perpendicularly to the silicon hole, for the PMOS phase inverters pass through institute
State setting silicon hole stress when ion diffusion is failed more preferable in theory;Shake in second annular
Swing the grid of NMOS phase inverters in the additional first annular agitator 1021 that the outside of device 1022 also sets up
Pole structure extends perpendicularly to the silicon hole.
Alternatively, the ring oscillator is in regular polygon structure, such as near silicon hole and parallel
Some NMOS phase inverters or the PMOS phase inverters, other sides are set on the side of the silicon hole
On less than 1U distance within be not provided with NMOS phase inverters or the PMOS phase inverters, to guarantee
Distal end will not occur silicon hole stress, to eliminate distal end impact.
Specifically, the ring oscillator is in rectangular configuration, as shown in figure 1, wherein described NMOS is anti-
Phase device or the PMOS phase inverters are arranged on the both sides parallel with the silicon hole, logical with the silicon
The perpendicular both sides in hole are not provided with NMOS phase inverters or the PMOS phase inverters, and with the silicon
The length on the perpendicular both sides of through hole is at least 1U.
Wherein, the preparation method of the ring oscillator can select preparation method commonly used in the art,
This repeats no more.
Further, the silicon hole sensor further comprises the frequency being connected with the ring oscillator
Rate detects structure, to be respectively used to each independent described first annular agitator and described second annular
The frequency of agitator is measured.
So far, complete the introduction of the silicon hole sensor construction of the embodiment of the present invention.Said structure it
Outward, other related elements can also be included, here is omitted.
The present invention provides a kind of silicon hole sensor and and inspection to solve problems of the prior art
Survey method, can be detected with the presence or absence of stress in the silicon hole by the silicon hole sensor, while
Can also further detect whether there is ion spreading effect, can be to semiconductor device by the detection
Evaluated, it is further provided the performance of the semiconductor device.
Fig. 2 is the detection method flow chart of silicon hole sensor described in the embodiment of the invention,
Specifically include following steps:
Step S1:Measurement includes the frequency of the ring oscillator of the NMOS phase inverters;
Step S2:By the frequency of the ring oscillator including the NMOS phase inverters and reference
Value is contrasted, to judge whether silicon hole stress.
Step S3:When there is no silicon hole stress, further detection includes the PMOS phase inverters
The frequency of the ring oscillator, if the frequency of the ring oscillator including the PMOS phase inverters
Less than reference value, then there is ion spreading effect.
Embodiment 2
Present invention also offers the detection method of described silicon hole sensor, including:
Step S1:Measurement respectively includes the ring oscillator of the NMOS phase inverters and including described
The frequency of the ring oscillator of PMOS phase inverters;
Step S2:According to the frequency and reference value of the ring oscillator of the NMOS phase inverters
Contrasted, to judge whether silicon hole stress.
Wherein, the frequency of the described first annular agitator for including the NMOS phase inverters is detected first
, if the frequency of the ring oscillator is consistent with reference value, there is no silicon hole stress in rate;
There is silicon hole stress if not meeting.
When there is no silicon hole stress, further detection includes described the second of the PMOS phase inverters
The frequency of ring oscillator, if the frequency of the ring oscillator of the PMOS phase inverters is less than reference
, then there is ion spreading effect in value.
Silicon hole sensor of the present invention whether there is stress in not only can detecting the silicon hole, together
When can also further detect whether there is ion spreading effect, can be to semiconductor device by the detection
Part is evaluated, it is further provided the performance of the semiconductor device.
Embodiment 3
Present invention also offers a kind of electronic installation, including the silicon hole sensor described in embodiment 1.
The electronic installation of the present embodiment, can be mobile phone, panel computer, notebook computer, net book,
Game machine, television set, VCD, DVD, navigator, photographing unit, video camera, recording pen, MP3,
Any electronic product such as MP4, PSP or equipment, it is alternatively any including in the silicon hole sensor
Between product.The electronic installation of the embodiment of the present invention, due to having used above-mentioned silicon hole sensor, thus
With better performance.
The present invention is illustrated by above-described embodiment, but it is to be understood that, above-described embodiment
Citing and descriptive purpose are only intended to, and are not intended to limit the invention to described scope of embodiments
It is interior.In addition it will be appreciated by persons skilled in the art that the invention is not limited in above-described embodiment, root
More kinds of variants and modifications can also be made according to the teachings of the present invention, these variants and modifications all fall within this
Within inventing scope required for protection.Protection scope of the present invention is by the appended claims and its waits
Effect scope is defined.
Claims (10)
1. a kind of silicon hole sensor, including:
Silicon hole;
At least two ring oscillator arrays, mirror image are arranged at the both sides of the silicon hole;
Wherein, on the direction away from the silicon hole, each described ring oscillator array at least includes
3 ring oscillators being set up in parallel, wherein each described ring oscillator include several NMOS
Phase inverter or PMOS phase inverters, including the ring oscillator and bag of the NMOS phase inverters
The ring oscillator for including the PMOS phase inverters is arranged alternately.
2. silicon hole sensor according to claim 1, it is characterised in that the silicon hole sensing
Device includes four ring oscillator arrays, and mirror image is arranged at the both sides up and down and left and right of the silicon hole respectively
Both sides.
3. silicon hole sensor according to claim 1, it is characterised in that described each described ring
Two first annular agitators being made up of the NMOS phase inverters and one are included at least in shape agitator
The second ring oscillator being made up of PMOS phase inverters.
4. silicon hole sensor according to claim 3, it is characterised in that described first annular to shake
Swing device to be located near the side of the silicon hole, and the grid of the phase inverter in the first annular agitator
The bearing of trend of pole structure is parallel to the silicon hole;
Second ring oscillator and additional is orderly arranged outside each in the first annular agitator
First annular agitator;Wherein, second ring oscillator and the additional first annular agitator
In the grid structure of phase inverter extend perpendicularly to the silicon hole.
5. silicon hole sensor according to claim 1, it is characterised in that the ring oscillator
It is in rectangular configuration, wherein the NMOS phase inverters or the PMOS phase inverters are arranged at leading to the silicon
On the parallel both sides in hole, the length on the both sides perpendicular with the silicon hole is at least 1U.
6. silicon hole sensor according to claim 1, it is characterised in that the silicon hole sensing
Device further comprises the frequency detecting structure being connected with the ring oscillator.
7. a kind of detection method of the silicon hole sensor based on described in one of claim 1 to 6, including:
Step S1:Measurement includes the frequency of the ring oscillator of the NMOS phase inverters;
Step S2:By the frequency of the ring oscillator including the NMOS phase inverters and reference
Value is contrasted, to judge whether silicon hole stress.
8. method according to claim 7, it is characterised in that in step S2, if institute
The frequency for stating ring oscillator is consistent with reference value, then there is no silicon hole stress;If not meeting
Then there is silicon hole stress.
9. method according to claim 8, it is characterised in that when there is no silicon hole stress,
Further detection includes the frequency of the ring oscillator of the PMOS phase inverters, if including described
The frequency of the ring oscillator of PMOS phase inverters is less than reference value, then there is ion spreading effect.
10. the silicon hole sensor described in a kind of one of electronic installation, including claim 1 to 6.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110058113A (en) * | 2019-05-05 | 2019-07-26 | 哈尔滨工业大学 | Through silicon via test structure and method after a kind of binding for through silicon via leak current fault |
CN114207399A (en) * | 2019-08-09 | 2022-03-18 | 希奥检测有限公司 | Strain measuring circuit |
Citations (10)
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