CN106548937A - The process of annealing - Google Patents
The process of annealing Download PDFInfo
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- CN106548937A CN106548937A CN201510599282.6A CN201510599282A CN106548937A CN 106548937 A CN106548937 A CN 106548937A CN 201510599282 A CN201510599282 A CN 201510599282A CN 106548937 A CN106548937 A CN 106548937A
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- annealing
- dce
- temperature
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- passed
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- 238000000137 annealing Methods 0.000 title claims abstract description 70
- 238000000034 method Methods 0.000 title claims abstract description 46
- 230000008569 process Effects 0.000 title claims abstract description 43
- 239000000758 substrate Substances 0.000 claims abstract description 11
- 238000010438 heat treatment Methods 0.000 claims description 14
- 238000002347 injection Methods 0.000 claims description 6
- 239000007924 injection Substances 0.000 claims description 6
- 230000006641 stabilisation Effects 0.000 claims description 6
- 238000011105 stabilization Methods 0.000 claims description 6
- 230000001186 cumulative effect Effects 0.000 claims description 2
- 230000007812 deficiency Effects 0.000 abstract 1
- 230000000694 effects Effects 0.000 description 9
- 239000000523 sample Substances 0.000 description 9
- 238000012360 testing method Methods 0.000 description 8
- 230000007547 defect Effects 0.000 description 4
- 239000012535 impurity Substances 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000006555 catalytic reaction Methods 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000004904 shortening Methods 0.000 description 2
- SCYULBFZEHDVBN-UHFFFAOYSA-N 1,1-Dichloroethane Chemical class CC(Cl)Cl SCYULBFZEHDVBN-UHFFFAOYSA-N 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000012467 final product Substances 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910021645 metal ion Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000008092 positive effect Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
- 238000010792 warming Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
Abstract
The invention discloses a kind of process of annealing, wherein, the process of the annealing is applied to the annealing after substrate injects carrier, and the process of the annealing includes：Furnace tube temperature is risen to into annealing temperature from initial temperature, wherein, gas is passed through in the temperature rise period, the gas includes DCE.The present invention can make up existing annealing process made by diode have the deficiency of apparent leaky, diode leakage failure can be improved.
Description
Technical field
The present invention relates to semiconductor applications, more particularly to a kind of process of annealing.
Background technology
In the diode course of processing, it will usually carry out annealing propulsion after injecting carrier in the substrate,
The general annealing atmosphere of existing annealing process only has N2/O2Or N2/H2/O2, this annealing process causes
Made by diode have apparent leaky.
The content of the invention
The technical problem to be solved in the present invention is that have for diode made by overcoming existing annealing process
A kind of defect of apparent leaky, there is provided technique of the annealing that can improve diode leakage failure
Method.
The present invention is to solve above-mentioned technical problem by the following technical programs：
The present invention provides a kind of process of annealing, is characterized in, the process application of the annealing
Annealing after carrier is injected in substrate, the process of the annealing include：By furnace tube temperature from
Initial temperature rises to annealing temperature, wherein, gas is passed through in the temperature rise period, the gas includes DCE
(dichloroethanes C2H4CL2).
It is described to be included in P type substrate injection N-type impurity or in N-type substrate in substrate injection carrier
Implanting p-type impurity, it is preferred that the concentration of the carrier of injection is more than E19/cm3, resistivity
<10mohm.cm.The process of annealing is typically first to heat to uniform temperature, is then kept for a period of time,
Progressively cool down again, (initial temperature of annealing is 950 ° to start annealing when such as furnace tube temperature is raised to 950 DEG C
C), annealing temperature is 1150 DEG C, then the temperature of boiler tube can rise to 1150 DEG C from 950 DEG C,
Reach 1150 DEG C afterwards, a period of time can be kept to be cooled back to uniform temperature.Due to furnace tube temperature from
During initial temperature rises to annealing temperature, furnace tube temperature is difficult directly to rise to annealing temperature from initial temperature
Degree, even if side effect also easily can be produced, so generally adopting stepped mode of heating, i.e., first rises
To uniform temperature, then temperature stabilization for a period of time, is further continued for being warming up to certain hour to temperature, then temperature is steady
Fixed a period of time, then heat up again, it is stable, until it reaches annealing temperature.The present invention is exactly in intensification
During (i.e. temperature rise period) be passed through the gas including DCE, by PN junction introduce defect center,
Reduce carrier minority carrier life time to reach the effect for reducing leakage current.
DCE, is commonly used in boiler tube in the prior art and can also use as clean (cleaning) gas
Come the effect for removing metal ion He expedite the emergence of oxidation.It is exactly normal after the annealing for having carried out the present invention
Back segment metal lead wire and passivation layer step.
It is preferred that the concentration accounting of DCE is more than 3% in the gas.
It is preferred that the concentration accounting of DCE is more than 4% in the gas.
It is preferred that the gas also includes O2。
It is preferred that the flow of DCE is 300sccm, O in the gas2Flow be 7000sccm.
It is preferred that in the temperature rise period of annealing, DCE annealing all temperature rise periods it is cumulative when being passed through
Length is more than 1 hour.
Wherein, DCE is decomposed at high temperature, introduces defect center and catalysis on Si (silicon) surface
Si+O2=>The time that SiO2, DCE are passed through is longer, introduces defect center on Si surfaces and plays catalysis
The time of effect is longer, can more reduce leakage current.
It is preferred that the process of the annealing the temperature rise period heating rate in 5 DEG C/below min.
Slower heating rate can ensure that the effect that DCE is played is more abundant.That is, the liter of temperature rise period
Warm speed is slower, and the effect for reducing leakage current is better, and such as heating rate compares heating rate for 3 DEG C/min
Effect for the reduction leakage current of 5 DEG C/min will be got well.
It is preferred that the annealing temperature, between 1050 DEG C to 1200 DEG C, the initial temperature is
950℃。
It is preferred that the process of the annealing is also included according to when the temperature rise period is passed through gas
Between adjust the concentration accounting of DCE in the gas, and/or, be passed through gas according in the temperature rise period
The concentration accounting of middle DCE adjusts the heating rate of temperature rise period.
Wherein, if the time for being passed through gas is shorter, then can suitably heighten DCE in the gas
Concentration accounting, if the time for being passed through gas is longer, then can suitably turn down DCE in the gas
Concentration accounting；If the concentration accounting for being passed through DCE in gas is relatively low, then suitably can reduce rising
Warm speed, prolongation are passed through the time of DCE, if the concentration accounting for being passed through DCE in gas is higher, then
Heating rate can be suitably improved, shortening is passed through the time of DCE.Above-mentioned adjustment, it is ensured that
DCE has the enough response time.
It is preferred that the process of the annealing is additionally included in furnace tube temperature rises to annealing temperature from initial temperature
During degree, stop being passed through DCE in the temperature stabilization stage, and/or, stop in the temperature stabilization stage
It is passed through DCE and is passed through N2。
On the basis of common sense in the field is met, above-mentioned each optimum condition, can combination in any, obtain final product this
Bright each preferred embodiments.
The present invention positive effect be：The present invention can effectively improve diode leakage failure,
Improve the quality of diode.And the present invention also has the advantages that simple possible.
Description of the drawings
Flow charts of the Fig. 1 for the process of the annealing of the embodiment of the present invention；
Temperature variations of the Fig. 2 for the annealing of the embodiment of the present invention；
Test result figures of the Fig. 3 for the embodiment of the present invention.
Specific embodiment
The present invention is further illustrated below by the mode of embodiment, but is not therefore limited the present invention to
Among described scope of embodiments.
Embodiment
A kind of process of annealing, the process of the annealing be applied to substrate injection carrier it
Annealing afterwards, wherein, the concentration of the carrier of injection is more than E19/Cm3.The process of the annealing
Annealing temperature is risen to from initial temperature including by furnace tube temperature：As shown in figure 1, in furnace tube temperature from starting
During temperature rises to annealing temperature, following steps are performed：
Step 101, gas is passed through in the temperature rise period, the gas includes DCE and O2。
Step 102, the temperature stabilization stage stop be passed through the gas, be especially off being passed through DCE,
And N is passed through when stopping and being passed through DCE2。
After furnace tube temperature is risen to annealing temperature from initial temperature, other steps of annealing are continued to complete
Suddenly, such as kept for a period of time cooled down again in annealing temperature.Carry out after whole annealing process is completed
The back segment metal lead wire and passivation layer step of conventional semiconductor manufacturing.
In the gas being passed through in step 101, the concentration accounting of DCE is more than 3%, with the gas O2's
As a example by flow is 7000sccm, the flow of the DCE can be 240sccm.
In order to reach the effect for preferably improving electric leakage, in the gas, the concentration accounting of DCE is further
More than 4%, or with O in the gas2Flow be 7000sccm as a example by, the flow of the DCE
Can be 300sccm.
In order to ensure that DCE can have the enough response time, DCE all temperature rise periods add up it is logical
The angle of incidence should ensure that more than 1 hour, and the heating rate annealed in the temperature rise period is in 5 DEG C/below min.
Wherein, the annealing temperature of annealing can between 1050 DEG C to 1200 DEG C, the temperature rise period
Initial temperature can be 950 DEG C.
The process of the annealing of the present embodiment and the effect for being reached are done into one with reference to experiment
Step explanation, takes 4 samples, and (concentration is more than E to inject N-type impurity in P type substrate respectively19/Cm3)
Afterwards, carry out annealing propulsion at 1150 DEG C, temperature changing process as shown in Fig. 2 when furnace tube temperature from
700 DEG C be raised to 950 DEG C after start annealing, the gas station that annealing process and each sample are passed through such as table 1
It is shown：
Table 1
Wherein, the N being passed through in 1～No. 4 sample2Flow be 104Sccm, 1 to No. 4 sample are moved back
Fire is identical in the heating rate of temperature rise period, and in 5 DEG C/below min, all temperature rise periods tire out
Plus the when a length of 67min for being passed through gas；
All the time DCE is not passed through in No. 1 sample；
In No. 2 samples, the concentration accounting of DCE is 2.8%；
In No. 3 samples, the concentration accounting of DCE is 3.3%；
In No. 4 samples, the concentration accounting of DCE is 4.1%.
The leakage current of 1 to No. 4 sample is detected using tetra- probe methods of kelvin, it is additional in two probes
Rated voltage, leakage current of another two probe tests under rated voltage.Testing result is as shown in Figure 3.
In Fig. 3, abscissa is test voltage, and unit is volt (V), and vertical coordinate is the leakage current for measuring, unit
Ampere (A).Following testing result is obtained with reference to Fig. 3：
(1) (No. 1 sample of correspondence, the song of the top in Fig. 3 when the gas being passed through does not include DCE
Line), the leakage current of diode is larger；
(2) when the gas being passed through includes that the concentration of DCE but DCE is less (No. 2 samples of correspondence,
Count Article 2 curve in Fig. 3 from top to bottom), the leakage current of diode slightly improves, especially in test
Voltage is obvious when being between 0 to 7.8V；
(3) when the gas being passed through includes that the concentration of DCE and DCE is larger (No. 3 samples of correspondence,
Count Article 3 curve in Fig. 3 from top to bottom), the leakage current of diode is equal on whole test voltage interval
Have clear improvement；
(4) when the gas being passed through includes that the concentration of DCE and DCE is bigger (No. 4 samples of correspondence,
Count the last item curve in Fig. 3 from top to bottom), the leakage current of diode is on whole test voltage interval
Improvement become apparent from, leakage current can reach below 1.E-08A.
By comparing as can be seen that when the gas that is passed through includes DCE than not including DCE, leakage current meeting
Reduce, when including DCE in the gas being passed through, the concentration of DCE is higher, and leakage current is less.
The process of the annealing of the present embodiment is also included according to when the temperature rise period is passed through gas
Between adjust the concentration accounting of DCE in the gas.The time for being such as passed through gas is shorter, then Ke Yishi
The concentration accounting of DCE in the gas is heightened in locality, and the time for being and for example passed through gas is longer, then can
Suitably to turn down the concentration accounting of DCE in the gas.
The process of the annealing of the present embodiment also includes that basis was passed through in gas in the temperature rise period
The concentration accounting of DCE adjusts the heating rate of temperature rise period.The concentration accounting of DCE in gas is passed through such as
Relatively low, then can suitably to reduce heating rate, prolongation is passed through the time of DCE, is and for example passed through gas
In body, the concentration accounting of DCE is higher, then can suitably improve heating rate, and shortening is passed through DCE
Time.
Two kinds of above-mentioned adjustment, can ensure that DCE fully participates in reaction.
Although the present embodiment only gives the annealing after P type substrate injects N-type impurity and the inspection of correlation
Survey result, but the process of the annealing of the present embodiment be equally applicable to it is miscellaneous in N-type substrate implanting p-type
Annealing after matter.
Although the foregoing describing the specific embodiment of the present invention, those skilled in the art should manage
Solution, these are merely illustrative of, and protection scope of the present invention is defined by the appended claims.This
The technical staff in field, can be to these embodiment party on the premise of the principle and essence without departing substantially from the present invention
Formula makes various changes or modifications, but these changes and modification each fall within protection scope of the present invention.
Claims (10)
1. a kind of process of annealing, it is characterised in that the process of the annealing is applied to
Annealing after substrate injection carrier, the process of the annealing include：By furnace tube temperature from starting
Temperature rises to annealing temperature, wherein, gas is passed through in the temperature rise period, the gas includes DCE.
2. the process annealed as claimed in claim 1, it is characterised in that DCE in the gas
Concentration accounting be more than 3%.
3. the process annealed as claimed in claim 2, it is characterised in that DCE in the gas
Concentration accounting be more than 4%.
4. the process of the annealing as described in any one in claims 1 to 3, it is characterised in that
The gas also includes O2。
5. the process annealed as claimed in claim 4, it is characterised in that DCE in the gas
Flow be 300sccm, O2Flow be 7000sccm.
6. the process annealed as claimed in claim 1, it is characterised in that DCE is in annealing
What all temperature rise periods were cumulative was passed through duration more than 1 hour.
7. the process annealed as claimed in claim 6, it is characterised in that the work of the annealing
Process the temperature rise period heating rate in 5 DEG C/below min.
8. the process annealed as claimed in claim 7, it is characterised in that the annealing temperature
Between 1050 DEG C to 1200 DEG C, the initial temperature is 950 DEG C.
9. the process annealed as claimed in claim 1, it is characterised in that the work of the annealing
Process also includes adjusting DCE in the gas according to the time that gas is passed through in the temperature rise period
Concentration accounting, and/or, adjusted according to the concentration accounting that DCE in gas is passed through in the temperature rise period and risen
The heating rate of thermophase.
10. the process annealed as claimed in claim 1, it is characterised in that the work of the annealing
Process is additionally included in during furnace tube temperature rises to annealing temperature from initial temperature, in temperature stabilization rank
Section stops being passed through DCE, and/or, stop being passed through DCE and being passed through N in the temperature stabilization stage2。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510599282.6A CN106548937B (en) | 2015-09-18 | 2015-09-18 | The process of annealing |
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|---|---|---|---|
| CN201510599282.6A CN106548937B (en) | 2015-09-18 | 2015-09-18 | The process of annealing |
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| Publication Number | Publication Date |
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| CN106548937A true CN106548937A (en) | 2017-03-29 |
| CN106548937B CN106548937B (en) | 2019-06-25 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106206266A (en) * | 2016-07-22 | 2016-12-07 | 上海芯导电子科技有限公司 | One pushes away trap technique |
| CN108198909A (en) * | 2018-01-15 | 2018-06-22 | 浙江晶科能源有限公司 | A kind of silicon slice processing method and solar cell production method |
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|---|---|---|---|---|
| KR0125310B1 (en) * | 1994-07-06 | 1997-12-10 | 김주용 | A method for oxidation film of semiconductor device |
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| CN102154708A (en) * | 2010-12-31 | 2011-08-17 | 常州天合光能有限公司 | Method for growing solar cell film |
| US20120037891A1 (en) * | 2008-12-18 | 2012-02-16 | Postech Academy-Industry Foundation | Method of manufacturing multilayered thin film through phase separation of blend of organic semiconductor/insulating polymer and organic thin film transistor using the same |
| CN103681288A (en) * | 2013-12-18 | 2014-03-26 | 无锡中微晶园电子有限公司 | High-reliability growth technique for low-temperature gate oxide layer |
-
2015
- 2015-09-18 CN CN201510599282.6A patent/CN106548937B/en active Active
Patent Citations (8)
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|---|---|---|---|---|
| KR0125310B1 (en) * | 1994-07-06 | 1997-12-10 | 김주용 | A method for oxidation film of semiconductor device |
| CN1227963A (en) * | 1997-12-22 | 1999-09-08 | 国际商业机器公司 | Defect induced buried oxide for throughput SOI |
| US6495429B1 (en) * | 2002-01-23 | 2002-12-17 | International Business Machines Corporation | Controlling internal thermal oxidation and eliminating deep divots in SIMOX by chlorine-based annealing |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106206266A (en) * | 2016-07-22 | 2016-12-07 | 上海芯导电子科技有限公司 | One pushes away trap technique |
| CN108198909A (en) * | 2018-01-15 | 2018-06-22 | 浙江晶科能源有限公司 | A kind of silicon slice processing method and solar cell production method |
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| CN106548937B (en) | 2019-06-25 |
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Address after: 200233, No. 385 Rainbow Road, Shanghai, Xuhui District Patentee after: SHANGHAI ADVANCED SEMICONDUCTO Address before: 200233, No. 385 Rainbow Road, Shanghai, Xuhui District Patentee before: ADVANCED SEMICONDUCTOR MANUFACTURING Co.,Ltd. |
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