CN106546914A - A kind of CBTC systems trackside relay rack FMECA method - Google Patents

A kind of CBTC systems trackside relay rack FMECA method Download PDF

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Publication number
CN106546914A
CN106546914A CN201610942047.9A CN201610942047A CN106546914A CN 106546914 A CN106546914 A CN 106546914A CN 201610942047 A CN201610942047 A CN 201610942047A CN 106546914 A CN106546914 A CN 106546914A
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China
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fmeca
data bases
pspice
relay rack
circuit
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CN201610942047.9A
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CN106546914B (en
Inventor
袁捷
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Thales SAIC Transport System Ltd
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Thales SAIC Transport System Ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/327Testing of circuit interrupters, switches or circuit-breakers
    • G01R31/3277Testing of circuit interrupters, switches or circuit-breakers of low voltage devices, e.g. domestic or industrial devices, such as motor protections, relays, rotation switches
    • G01R31/3278Testing of circuit interrupters, switches or circuit-breakers of low voltage devices, e.g. domestic or industrial devices, such as motor protections, relays, rotation switches of relays, solenoids or reed switches

Abstract

The invention discloses a kind of CBTC systems trackside relay rack FMECA method, including:Structure, the failure mode of device of circuit in trackside relay rack are specified, and sets up FMECA data bases;With PSpice software emulation fault impacts;Improve FMECA data bases.The present invention improves accuracy and analysis efficiency, realizes the partial automation of FMECA.

Description

A kind of CBTC systems trackside relay rack FMECA method
Technical field
The present invention relates to track traffic signal field.
Background technology
FMECA (Failure Mode Effects and Criticality Analysis, failure mode effect and danger Evil analysis) as a kind of conventional analysis method, it is widely used in safety-related circuit design process.By FMECA, can To assess the failure mould of each device level in the system that a safety concerns, the harm in design can be recognized, can be directed to Mitigation strategy is formulated in harm caused by failure, it is ensured that do not have a kind of Single Point of Faliure threaten the safety of whole system.
CBTC (Communications Based Train Control, the train automatic controlling system based on communication) system System is the rail traffic signal system of current extensive utilization, and its interlocking subsystem is with trackside equipment interface by relay rack come real It is existing, wherein containing the devices such as signal lighting circuit, turnout start circuit.Such as operation track switch, letter is lighted (as interlock command Number machine etc.) execution circuit, these circuits have higher safe class, are safety analysis for the FMECA of these circuits Requisite link.
Currently for relay rack FMECA mostly by the experience of analysis personnel carrying out, compare circuit drawing, directly Fill in analysis result.This analysis mode is simple to operate, but there is problems with:
1) analysis process places one's entire reliance upon personnel's micro-judgment, higher to analyzing personnel requirement, and accuracy is difficult to ensure that;
2) fault mode for being covered is limited;
3) for complicated circuit, it is difficult to immediately arrive at analysis result.
The content of the invention
It is an object of the invention to provide a kind of CBTC systems trackside relay rack FMECA method, improves accuracy and divides Analysis efficiency, realizes the partial automation of FMECA.
The technical scheme for realizing above-mentioned purpose is:
A kind of CBTC systems trackside relay rack FMECA method, including:
Structure, the failure mode of device of circuit in trackside relay rack are specified, and sets up FMECA data bases;
With PSpice software emulation fault impacts;
Improve FMECA data bases.
In above-mentioned CBTC system trackside relay rack FMECA methods, described utilization PSpice is (for microcomputer series Universal circuit analysis program) software emulation fault impact, including:
The characterisitic parameter of acquisition device;
Device phantom is set up in PSpice softwares;
Artificial circuit is built in PSpice softwares, operation emulation obtains the first simulation result;
According to clear and definite failure mode, setting up successively needs corresponding to each device of analysis, each failure mode Defective device model;
In the artificial circuit built, normal device is replaced with each defective device model successively, obtain second and imitate True result;
Second simulation result is made comparisons with the first simulation result, is obtained the impact analysis result of equipment/subsystem irrespective of size, is filled out Enter FMECA data bases.
In above-mentioned CBTC system trackside relay rack FMECA methods, described improves FMECA data bases, including:
According to the impact analysis result of equipment/subsystem irrespective of size, system-level impact analysis result is obtained, FMECA numbers are inserted According to storehouse;
According to system-level impact analysis result, the form of expression of failure is analyzed, FMECA data bases are inserted.
The invention has the beneficial effects as follows:The present invention is directed to the circuit in CBTC system trackside relay racks, with PSpice Software carries out simulation analysis, obtains the failure effect analysis (FEA) result of circuit-level.Effectively improve the accuracy and analysis effect of FMECA Rate, can cover most fault modes.For complicated circuit design, the fault impact of acquisition is clear, directly perceived.
Description of the drawings
Fig. 1 is the flow chart of the CBTC system trackside relay rack FMECA methods of the present invention;
Fig. 2 is the circuit diagram of four display signal lighting circuits;
Fig. 3 is the circuit diagram of four display Signal lighting artificial circuits;
Fig. 4 is the schematic diagram of the semaphore current waveform of normal work;
Fig. 5 is the semaphore current waveform of relay ADJ working values increase;
Fig. 6 is the semaphore current waveform that relay LJ increases release time.
Specific embodiment
Below in conjunction with accompanying drawing, the invention will be further described.
Fig. 1 is referred to, the CBTC system trackside relay rack FMECA methods of the present invention comprise the following steps:
Step one, defined analysis scope, specifically includes:
Step S1, specifies the concrete structure of analyzed object (circuit in trackside relay rack).With four displays shown in Fig. 2 Signal lighting circuit as a example by, including 3 lighting relays, 3 filament state relays and semaphore etc..Lighting after The coil of electrical equipment is controlled by the lighting order that PMI (Poste de Manoeuvre Informatise, computer interlock) is exported, For lighting different light colors;The coil of filament state relay is connected in lamp circuit, and its contact provides filament to PMI State is input into, and PMI can judge the light color of actual displayed by different filament combinations of states.
Step S2, specifies the failure mode of typical device.Standard EN50129 (railway applications:Communication, signal and processing system System --- safety-related signal electron system) in give the failure mode list of conventional components and parts, by taking relay as an example, its Failure mode includes coil interruption, contact adhesion, working value increase/reduction etc., refers to table 1 below.
Step S3, sets up FMECA data bases.It is for storing analysis result, every corresponding to each components and parts in circuit A kind of failure mode is all listed successively, and subsystem, system-level impact and safety analysis corresponding to every kind of failure mode etc. also will It is embodied in data base.According to the components and parts type in circuit and failure mode specified in standard, set up in EXCEL FMECA data bases, each column are defined as follows table 2:
Step 2, with PSpice software emulation fault impacts.Specifically include:
Step S4, obtains the characterisitic parameter of typical device.Before phantom is set up, the characteristic ginseng of first acquisition device is needed Number.JWXC-1700 types nonpolarized relay for use as lighting relay and the JZXC-H18 types as filament state relay are whole As a example by stream slow release relay, working value, release value, coil resistance can be obtained according to the technical instruction of two kinds of relays and delayed Put the characterisitic parameters such as time.
Step S5, sets up typical device phantom in PSpice softwares.PSpice is a powerful circuit Simulation software, there is provided abundant component library selects to use for user, but for relay, the version that software is carried is little, Therefore carrying out needing voluntarily to build device model, conventional modeling according to the concrete model of relay when relay circuit is emulated Method has following two:
Sentence method, the device model in PSpice it is final all by distinctive sentence storing and call, therefore can be straight Connect relay model is write using PSpice sentences.
Equivalent circuit method, by the structure and operation principle of split-phase relay, obtains the equivalent circuit of relay, utilizes The base components enriched in PSpice, build equivalent circuit and carry out analogue relay.
In both the above method, the language syntax requirements complete outlines device characteristic of PSpice language needs to have PSpice More deep understanding, and equivalent circuit method is more directly perceived, enforcement difficulty is less.With JWXC-1700 relays and JZXC-H18 As a example by relay, using the basic relay model provided in PSpice, build with reference to both the above relay feature equivalent Circuit.If JWXC-1700 is voltage-type relay, voltage-controlled current source need to be added to realize voltage control, and JZXC-H18 is whole Current relay, need to add rectifier bridge on the basis of master mould, and need according to the characterisitic parameter of two kinds of relays to equivalent Circuit is adjusted.
Step S6, builds artificial circuit in PSpice softwares, and operation emulation obtains the first simulation result.For example:According to Circuit design in accompanying drawing 2, builds artificial circuit, such as accompanying drawing 3 in PSpice.Wherein lighting unit and colored lights belong to external electrical Road, therefore replaced with resistance.After the completion of circuit is built, simulation parameter is set, operation emulation, simulation send the point of each light color successively Lamp order, records the current waveform of each colored lights, sees accompanying drawing 4.In figure, without order acquiescence point red light, 1s-5s sends a blue lamp to 0s-1s Command point light blue lamp, 5s-10s send a green light command point and give a green light, and 10s-15s sends a little greenish-yellow lamp order while putting viride nitens Lamp, amber light, 15s-16s send a blue lamp command point light blue lamp without order acquiescence point red light, 16s-20s.
Step S7, according to aforementioned clearly failure mode, setting up successively needs each device, each failure mould of analysis Defective device model corresponding to formula.
Step S8, in the artificial circuit built, replaces normal device with defective device model successively, obtains second and imitates True result, to needing each device of analysis, each failure mode to repeat the step.
Step S9, is made comparisons with the first simulation result to the second simulation result, obtains the impact analysis of equipment/subsystem irrespective of size As a result, FMECA data bases are inserted.
Example 1:By taking blue lamp lighting relay ADJ as an example, adjustment relay parameter, simulated failure state " working value increase ", Keep lighting command timing consistent with step S6, operation emulation records the current waveform of each colored lights, sees accompanying drawing 5.Control accompanying drawing 4, it is seen that after 1s and 16s send a blue lamp order, blue lamp lighting relay does not have action, and semaphore still sends out a warning.By this As a result insert the " shadow of equipment/subsystem irrespective of size corresponding to device ADJ, failure mode " working value increase " in FMECA data bases Ring " in.
Example 2:By taking green light lighting relay LJ as an example, adjustment relay parameter, simulated failure state " prolongation release time ", Keep lighting command timing consistent with step f, operation emulation records the current waveform of each colored lights, sees accompanying drawing 6.Control accompanying drawing 4, it is seen that after 10s sends a little greenish-yellow lamp order, as green light lighting relay extends release time, semaphore continues viride nitens Lamp, until 12s or so green light lightings relay discharges, semaphore just switches to greenish-yellow lamp.This result is inserted into FMECA data bases In " impact of equipment/subsystem irrespective of size " corresponding to middle device LJ, failure mode " prolongation release time ".
Step 3, improves FMECA data bases.Specifically include:
Step S10, according to the impact analysis result of equipment/subsystem irrespective of size, with reference to subsystem, systemic-function, obtains system The impact analysis result of level, inserts FMECA data bases.
In above-mentioned steps S9, in example 1, during command point blue lamp, actual signal machine shows red light, as red light is disable signal, The failure may cause vehicle to stop in emergency.
In above-mentioned steps S9, actual displayed green light during command point greenish-yellow lamp in example 2, under backup mode, green light represents front only It it is two section free time, greenish-yellow lamp represents that front only one of which section is idle, and the failure makes vehicle or driver be mistakenly considered front to be had Two section free time, the accidents such as collision may be caused.
Step S11, according to system-level impact analysis result, analyzes the form of expression of failure, inserts FMECA data bases.
In above-mentioned steps S9, the failure in 2 examples can be judged by the input of the state of filament back production relay. For example 1, malfunction coefficient is downgraded to red light, is secure side, therefore there is no dangerous impact.For example 2, malfunction coefficient upgrades to Green light, is hazardous side, there is dangerous impact, need to take mitigation strategy, first need to be removed all when such as green light switches to greenish-yellow lamp Lighting order, point send out a warning, and only filament state back production shows that red light can apply to light greenish-yellow lamp order after correctly lighting.
Above example is used for illustrative purposes only, rather than limitation of the present invention, about the technology people of technical field Member, without departing from the spirit and scope of the present invention, can also make various conversion or modification, therefore all equivalents Technical scheme should also belong to scope of the invention, should be limited by each claim.

Claims (3)

1. a kind of CBTC systems trackside relay rack FMECA method, it is characterised in that include:
Structure, the failure mode of device of circuit in trackside relay rack are specified, and sets up FMECA data bases;
With PSpice software emulation fault impacts;
Improve FMECA data bases.
2. CBTC systems trackside relay rack FMECA method according to claim 1, it is characterised in that described utilization PSpice software emulation fault impacts, including:
The characterisitic parameter of acquisition device;
Device phantom is set up in PSpice softwares;
Artificial circuit is built in PSpice softwares, operation emulation obtains the first simulation result;
According to clear and definite failure mode, set up the failure needed corresponding to each device of analysis, each failure mode successively Device model;
In the artificial circuit built, normal device is replaced with each defective device model successively, obtain the second emulation knot Really;
Second simulation result is made comparisons with the first simulation result, is obtained the impact analysis result of equipment/subsystem irrespective of size, is inserted FMECA data bases.
3. CBTC systems trackside relay rack FMECA method according to claim 2, it is characterised in that described is perfect FMECA data bases, including:
According to the impact analysis result of equipment/subsystem irrespective of size, system-level impact analysis result is obtained, FMECA data bases are inserted;
According to system-level impact analysis result, the form of expression of failure is analyzed, FMECA data bases are inserted.
CN201610942047.9A 2016-11-01 2016-11-01 A kind of CBTC system trackside relay rack FMECA method Active CN106546914B (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102393864A (en) * 2011-06-28 2012-03-28 电子科技大学 Method for optimizing reliability of harmonic gear used for space vehicle based on fault physics
CN103760886A (en) * 2013-12-02 2014-04-30 北京航空航天大学 Newly-developed aviation electronic product hardware comprehensive FMECA method
CN104504248A (en) * 2014-12-05 2015-04-08 中国航空工业集团公司第六三一研究所 Failure diagnosis modeling method based on designing data analysis
CN105844435A (en) * 2016-06-15 2016-08-10 南京中车浦镇城轨车辆有限责任公司 Subway vehicle fault information management system based on FMECA

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102393864A (en) * 2011-06-28 2012-03-28 电子科技大学 Method for optimizing reliability of harmonic gear used for space vehicle based on fault physics
CN103760886A (en) * 2013-12-02 2014-04-30 北京航空航天大学 Newly-developed aviation electronic product hardware comprehensive FMECA method
CN104504248A (en) * 2014-12-05 2015-04-08 中国航空工业集团公司第六三一研究所 Failure diagnosis modeling method based on designing data analysis
CN105844435A (en) * 2016-06-15 2016-08-10 南京中车浦镇城轨车辆有限责任公司 Subway vehicle fault information management system based on FMECA

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