CN106526923B - Array substrate, its test method and display device - Google Patents
Array substrate, its test method and display device Download PDFInfo
- Publication number
- CN106526923B CN106526923B CN201710022521.0A CN201710022521A CN106526923B CN 106526923 B CN106526923 B CN 106526923B CN 201710022521 A CN201710022521 A CN 201710022521A CN 106526923 B CN106526923 B CN 106526923B
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- driving chip
- array substrate
- outlet line
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- measurement circuit
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- 239000000758 substrate Substances 0.000 title claims abstract description 58
- 238000010998 test method Methods 0.000 title claims abstract description 15
- 238000005259 measurement Methods 0.000 claims abstract description 51
- 238000012360 testing method Methods 0.000 claims abstract description 44
- 230000005540 biological transmission Effects 0.000 claims abstract description 36
- 238000001514 detection method Methods 0.000 claims description 10
- 230000005669 field effect Effects 0.000 claims description 3
- 230000002035 prolonged effect Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 10
- 239000004973 liquid crystal related substance Substances 0.000 description 9
- 230000000694 effects Effects 0.000 description 5
- 230000001960 triggered effect Effects 0.000 description 3
- 230000008859 change Effects 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 229910002056 binary alloy Inorganic materials 0.000 description 1
- 230000004069 differentiation Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/1306—Details
- G02F1/1309—Repairing; Testing
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The embodiment of the invention discloses a kind of array substrate, its test method and display devices, including driving chip and at least one pixel unit, the pixel unit includes outlet line, the first end of the outlet line is connected to the output end of the driving chip, the array substrate effective display area is overseas, and measurement circuit identical with the outlet line is arranged；The first end of the measurement circuit is connected to the second end of the outlet line, and the second end of the measurement circuit is connected to the test lead of the driving chip.The embodiment of the present invention passes through in the array substrate of display panel, one measurement circuit identical with common output route is set, outlet line is connected with measurement circuit, to by the measurement of outlet line both ends transmission delay be converted into outlet line and measurement circuit respectively between driving chip connecting pin transmission delay measurement, solve the problems, such as that outlet line is difficult to actual measurement far from driving chip end signal.
Description
Technical field
The present invention relates to field of display technology, a kind of array substrate, its test method and display device are particularly related to.
Background technique
In the array substrate of liquid crystal display during designing and manufacturing, the AC impedance of outlet line in array substrate
There may be excessive problem, cause to generate delay by the signal of outlet line.As shown in Figure 1, being the output of array substrate
The schematic diagram of signal delay caused by route AC impedance is excessive, route initial endpoint signal is square wave, and line end signal is because of face
Plate AC impedance is excessive, produces obvious distortion (T in such as figuredIt is shown).This results in the driving chip of liquid crystal display normal
Advise driving force under, can not normal driving liquid crystal display panel, directly affect the display effect of liquid crystal display.
However in a practical situation, outlet line end is because of reasons such as encapsulation, it is difficult to is directly connected to, be caused defeated by instrument
The signal delay of route can not be measured directly out, and then can not be adjusted to the driving force of driving chip, and liquid crystal display is influenced
The display effect of device.
Summary of the invention
In view of this, it is an object of the invention to propose a kind of array substrate, its test method and display device, to reality
Now detect the signal delay of array substrate outlet line.
Based on above-mentioned purpose, the embodiment of the present invention provides a kind of array substrate, including driving chip and at least one pixel
Unit, the pixel unit include outlet line, and the first end of the outlet line is connected to the output end of the driving chip,
The array substrate effective display area is overseas, and measurement circuit identical with the outlet line is arranged；The of the measurement circuit
One end is connected to the second end of the outlet line, and the second end of the measurement circuit is connected to the test of the driving chip
End.
Optionally, it is connected between the second end of the outlet line and the first end of the measurement circuit by switch unit
It connects.
Optionally, the switch unit includes triode or field-effect tube.
Optionally, the delay inspection for detecting transmission delay is provided between the output end and test lead of the driving chip
Survey unit.
Optionally, the delay detection unit includes 2 or 2 or more sequentially connected d type flip flops, and is touched with the D
Hair device connect one to one with door；The clock signal terminal of first d type flip flop is connected to known clock signal；It is triggered in preceding D
The data signal end and inverse output terminal of device are connected to the adjacent clock signal terminal in rear d type flip flop；The reset of whole d type flip flops
End is connected to the output end of the driving chip；The output end of d type flip flop is respectively connected to the first end with door, all with door
Second end is connected to the test lead of the driving chip.
Based on identical purpose, the embodiment of the present invention provides a kind of test method of array substrate, and the array substrate includes
Driving chip and at least one pixel unit, the pixel unit includes outlet line, the first end connection of the outlet line
To the output end of the driving chip, which is characterized in that the array substrate effective display area is overseas, setting and the output line
The identical measurement circuit in road；The first end of the measurement circuit is connected to the second end of the outlet line, the measurement circuit
Second end be connected to the test lead of the driving chip, the test method includes:
By the transmission delay tested between the driving chip output end and test lead, the biography of the array substrate is calculated
Defeated delay.
Optionally, it is connected between the second end of the outlet line and the first end of the measurement circuit by switch unit
It connects；The test method includes:
When the switch unit is connected, the transmission delay of the array substrate is tested.
Optionally, the transmission delay between the test driving chip output end and test lead, specifically includes:
Apply the first test voltage to the driving chip output end, and starts timing；
Detect the driving chip test terminal voltage value；
When driving chip test terminal voltage value reaches the second test voltage, stop timing and by duration obtained by timing
As the transmission delay between the driving chip output end and test lead.
Optionally, the transmission delay for calculating the array substrate, specifically includes:
Transmission delay between the driving chip output end and test lead is obtained into the biography of the array substrate divided by two
Defeated delay.
Based on identical purpose, the embodiment of the present invention provides a kind of display device, battle array described in above-mentioned any one embodiment
Column substrate.
From the above it can be seen that array substrate provided in an embodiment of the present invention, its test method and display device are logical
It crosses in the array substrate of display panel, a measurement circuit identical with common output route is set, by outlet line and survey
Try route series connection, thus by the measurement of outlet line both ends transmission delay be converted into outlet line and measurement circuit respectively with driving
The measurement of transmission delay between chip connecting pin solves outlet line far from driving chip end signal and is difficult to asking for actual measurement
Topic.
Detailed description of the invention
Fig. 1 is the schematic diagram of signal delay caused by the outlet line AC impedance of array substrate in the prior art is excessive；
Fig. 2 is the structural schematic diagram for the array substrate that first embodiment of the invention provides；
Fig. 3 is the structural schematic diagram for the array substrate that second embodiment of the invention provides；
Fig. 4 is the structural schematic diagram for the array substrate that third embodiment of the invention provides；
Fig. 5 is a kind of circuit structure signal for the optional embodiment for postponing detection unit in third embodiment of the invention
Figure.
Specific embodiment
To make the objectives, technical solutions, and advantages of the present invention clearer, below in conjunction with specific embodiment, and reference
Attached drawing, the present invention is described in more detail.
It should be noted that all statements for using " first " and " second " are for differentiation two in the embodiment of the present invention
The non-equal entity of a same names or non-equal parameter, it is seen that " first " " second " only for the convenience of statement, does not answer
It is interpreted as the restriction to the embodiment of the present invention, subsequent embodiment no longer illustrates this one by one.
Fig. 2 is the structural schematic diagram for the array substrate that first embodiment of the invention provides.As shown, of the invention
In one embodiment, a kind of array substrate 10, including driving chip 20 and at least one pixel unit 12, the pixel unit are provided
12 include outlet line 30, and the first end of the outlet line 30 is connected to the output end 21 of the driving chip 20, the battle array
Outside the effective display area domain 11 of column substrate 10, measurement circuit 40 identical with the outlet line 30 is set；The measurement circuit
40 first end is connected to the second end of the outlet line 30, and the second end of the measurement circuit 40 is connected to the driving core
The test lead 22 of piece 20.
The pixel unit 12 is provided in the effective display area domain 11, for driving liquid crystal to generate display effect.And
Liquid crystal will not be then set outside the effective display area domain 11, this part is usually located at array substrate edge, therefore the present embodiment
The measurement circuit 40 is arranged in selection here, to eliminate the influence generated to display effect.
The embodiment of the present invention based on a general thought be: in the array substrate of liquid crystal display, all output
The friendship impedance of route is typically in same level under normal circumstances, therefore the transmission by measuring a wherein outlet line is prolonged
Late, the AC impedance for learning the outlet line can be calculated, to learn the whole AC impedance and transmission of the array substrate
Delay.Based on this thinking, the array substrate of the present embodiment when measuring, need to only measure output end 21 and test lead 22 it
Between transmission delay, and the transmission delay (because outlet line 30 is identical as measurement circuit 40, therefore is had identical divided by 2
Transmission delay, and the two can be considered series relationship, thus total transmission delay for both each from the sum of transmission delay)
Obtain the overall transfer delay of array substrate.
In the present embodiment and other alternative embodiments, the quantity of the measurement circuit may be 2 or 2 or more,
All the measurement circuit is successively connected with each other from beginning to end with the outlet line, positioned at the end of the last outlet line
(second end of equivalent measurement circuit 40 in this present embodiment) is connected to the test lead of driving chip, after a measurement according to test
The quantity of route calculates the transmission delay of outlet line.By increasing the quantity of measurement circuit, can be use up in measurement and calculating
Side view error caused by occasional case may be eliminated, measuring accuracy is improved.
In the present embodiment and other alternative embodiments, the outlet line 30 can be source level (Source grades) output line
Road, or grid (Gate grades) outlet line, the corresponding driving chip 20 are respectively source level driving chip or grid
Driving chip；And the measurement circuit 40 also should be identical as the set-up mode of route to be measured.
To sum up, the present embodiment is by being arranged one and common output route phase in the array substrate of display panel
Same measurement circuit, outlet line is connected with measurement circuit, to convert the measurement of outlet line both ends transmission delay to
Outlet line and measurement circuit respectively between driving chip connecting pin transmission delay measurement, solve outlet line far from driving
The problem of dynamic chip end signal is difficult to actual measurement.
Fig. 3 is the structural schematic diagram for the array substrate that second embodiment of the invention provides.As shown, in second embodiment
In, it is connected between the second end of the outlet line 30 and the first end of the measurement circuit 40 by switch unit 50.
When 50 open circuit of switch unit, the outlet line 30 does not constitute circuit with the measurement circuit 40, therefore surveys
Examination route 40 will not have any impact to the normal use of outlet line 30；It is described defeated when the switch unit 50 is connected
Route 30 and the measurement circuit 40 constitute circuit out, can test the transmission delay of the array substrate.As it can be seen that logical
Setting switch unit 50 is crossed, the state of array substrate is switched between normal operating condition and test mode,
The normal use of array substrate 10 will not be influenced because increasing measurement circuit 40.
In some optional embodiments of the present embodiment, the switch unit 50 includes triode or field-effect tube.
Condition is set in array substrate 10 while control circuit on-off effect can be reached it should be noted that other can satisfy
Electrical component or circuit structure also belong to the optional embodiment of switch unit 50 in the present embodiment.
Fig. 4 is the structural schematic diagram for the array substrate that third embodiment of the invention provides.As shown, in the present embodiment
In, the delay detection unit for detecting transmission delay is provided between the output end 21 and test lead 22 of the driving chip 20
60。
When executing test, the output end 21 of the driving chip 20 exports the first test voltage, and the delay detection is single
Member 60 is triggered by first test voltage, starts to execute timing, at this time since there are transmission delay, the driving chips
There is no voltages to change for 20 test lead 22；When the voltage value of the output end 21 reaches and (be greater than or equal to) the second test voltage
When, the delay detection unit 60 is triggered again, and stops timing.Read the timing result of the delay detection unit 60
Obtain transmission delay between 10 output end 21 of driving chip and test lead 22 namely the outlet line 30 and the survey
Try the total transmission delay of route 40.
Fig. 5 is a kind of circuit structure signal for the optional embodiment for postponing detection unit in third embodiment of the invention
Figure.As shown, the delay detection unit includes 2 or 2 or more suitable in some optional embodiments of the present embodiment
D type flip flop (the D in Fig. 5 of secondary connection1-Dn), and connect one to one with the d type flip flop with door；First d type flip flop
Clock signal terminal is connected to known clock signal；The data signal end and inverse output terminal of preceding d type flip flop be connected to it is adjacent
The clock signal terminal of d type flip flop afterwards；The reset terminal of whole d type flip flops is connected to the output end of the driving chip；D type flip flop
Output end is respectively connected to the first end with door, and the test lead of the driving chip is all connected to the second end of door.It is above-mentioned
In circuit structure, other ports of each electrical component are placed in normal operating conditions.
By the combination of setting multiple groups " d type flip flop+and door " in above embodiment, the binary system of a multidigit is established
Counter.The output end Q of first d type flip flop can be jumped when the rising edge of the known clock signal arrives；In rear D
The output end Q of trigger can be jumped, when it is " 0 " that previous d type flip flop, which is exported by " 1 " jump, to set up more than one
The binary counter of position, the lowest order of count results are first and door (D1) output, highest order be the last one and door
(Dn) output.After high potential (the first test voltage) on driving chip output end, the counter of the present embodiment starts, until
Driving chip test lead equally reaches the moment of high potential (the second test voltage), reads with the output end of door, passes through note
Record is read at this time and the decimal system, carries out simple computation further according to the known clock signal period, the output can be obtained
Route connect with measurement circuit after total transmission delay duration.
The embodiment of the present invention also provides a kind of display device comprising array substrate described in above-mentioned any embodiment,
It certainly further include such as other known structures of color membrane substrates, this will not be detailed here.
Display device in the embodiment of the present invention is liquid crystal display device, can also be Electronic Paper, mobile phone, tablet computer,
Any products or components having a display function such as television set, display, laptop, Digital Frame, navigator.
It should be understood by those ordinary skilled in the art that: the discussion of any of the above embodiment is exemplary only, not
It is intended to imply that the scope of the present disclosure (including claim) is limited to these examples；Under thinking of the invention, above embodiments
Or can also be combined between the technical characteristic in different embodiments, step can be realized with random order, and be existed such as
Many other variations of the upper different aspect of the invention, for simplicity, they are not provided in details.
In addition, to simplify explanation and discussing, and in order not to obscure the invention, it can in provided attached drawing
It is connect with showing or can not show with the well known power ground of integrated circuit (IC) chip and other components.Furthermore, it is possible to
Device is shown in block diagram form, to avoid obscuring the invention, and this has also contemplated following facts, i.e., about this
The details of the embodiment of a little block diagram arrangements be height depend on will implementing platform of the invention (that is, these details should
It is completely within the scope of the understanding of those skilled in the art).Elaborating that detail (for example, circuit) is of the invention to describe
In the case where exemplary embodiment, it will be apparent to those skilled in the art that can be in these no details
In the case where or implement the present invention in the case that these details change.Therefore, these descriptions should be considered as explanation
Property rather than it is restrictive.
The embodiment of the present invention be intended to cover fall into all such replacements within the broad range of appended claims,
Modifications and variations.Therefore, all within the spirits and principles of the present invention, any omission, modification, equivalent replacement, the improvement made
Deng should all be included in the protection scope of the present invention.
Claims (10)
1. a kind of array substrate, including driving chip and at least one pixel unit, the pixel unit includes outlet line, institute
The first end for stating outlet line is connected to the output end of the driving chip, which is characterized in that the array substrate is effectively shown
Outside region, measurement circuit identical with the outlet line is set；The first end of the measurement circuit is connected to the output line
The second end on road, the second end of the measurement circuit are connected to the test lead of the driving chip.
2. array substrate according to claim 1, which is characterized in that the second end of the outlet line and the p-wire
It is connected between the first end on road by switch unit.
3. array substrate according to claim 2, which is characterized in that the switch unit includes triode or field-effect
Pipe.
4. array substrate according to claim 1, which is characterized in that between the output end and test lead of the driving chip
It is provided with the delay detection unit for detecting transmission delay.
5. array substrate according to claim 4, which is characterized in that the delay detection unit includes 2 or 2 or more
Sequentially connected d type flip flop, and connect one to one with the d type flip flop with door；The clock signal terminal of first d type flip flop
It is connected to known clock signal；It is connected in the data signal end and inverse output terminal of preceding d type flip flop adjacent in rear d type flip flop
Clock signal terminal；The reset terminal of whole d type flip flops is connected to the output end of the driving chip；The output end of d type flip flop is distinguished
It is connected to the first end with door, the test lead of the driving chip is all connected to the second end of door.
6. a kind of test method of array substrate, the array substrate includes driving chip and at least one pixel unit, described
Pixel unit includes outlet line, and the first end of the outlet line is connected to the output end of the driving chip, and feature exists
In the array substrate effective display area is overseas, and measurement circuit identical with the outlet line is arranged；The measurement circuit
First end is connected to the second end of the outlet line, and the second end of the measurement circuit is connected to the test of the driving chip
End, the test method include:
By the transmission delay tested between the driving chip output end and test lead, the transmission for calculating the array substrate is prolonged
Late.
7. test method according to claim 6, which is characterized in that the second end of the outlet line and the p-wire
It is connected between the first end on road by switch unit；The test method includes:
When the switch unit is connected, the transmission delay of the array substrate is tested.
8. test method according to claim 6, which is characterized in that the test driving chip output end and test
Transmission delay between end, specifically includes:
Apply the first test voltage to the driving chip output end, and starts timing；
Detect the driving chip test terminal voltage value；
When driving chip test terminal voltage value reaches the second test voltage, stop timing and using duration obtained by timing as
Transmission delay between the driving chip output end and test lead.
9. according to test method described in claim 6-8 any one, which is characterized in that the calculating array substrate
Transmission delay specifically includes:
The transmission that transmission delay between the driving chip output end and test lead obtains the array substrate divided by two is prolonged
Late.
10. a kind of display device, which is characterized in that including array substrate described in claim 1-5 any one.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201710022521.0A CN106526923B (en) | 2017-01-12 | 2017-01-12 | Array substrate, its test method and display device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201710022521.0A CN106526923B (en) | 2017-01-12 | 2017-01-12 | Array substrate, its test method and display device |
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| CN106526923A CN106526923A (en) | 2017-03-22 |
| CN106526923B true CN106526923B (en) | 2019-04-23 |
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| CN107068027B (en) * | 2017-05-27 | 2020-12-25 | 深圳市华星光电技术有限公司 | Liquid crystal display panel, liquid crystal display panel detection system and method |
| CN109272912B (en) * | 2018-11-30 | 2020-05-19 | 惠科股份有限公司 | Mis-charging detection method and mis-charging detection system |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1482588A (en) * | 2002-07-12 | 2004-03-17 | ��֥������ʾ��������˾ | Display device |
| CN1497512A (en) * | 2002-09-27 | 2004-05-19 | ������������ʽ���� | Signal transmission circuit and display equipment |
| CN1577465A (en) * | 2003-07-24 | 2005-02-09 | 精工爱普生株式会社 | Display driver, electrooptical device and driving method |
| CN106205443A (en) * | 2016-09-22 | 2016-12-07 | 合肥京东方光电科技有限公司 | Testing circuit and method of work, drive circuit |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4276373B2 (en) * | 2000-12-07 | 2009-06-10 | セイコーエプソン株式会社 | Electro-optical device inspection circuit, electro-optical device, and electronic apparatus |
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2017
- 2017-01-12 CN CN201710022521.0A patent/CN106526923B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1482588A (en) * | 2002-07-12 | 2004-03-17 | ��֥������ʾ��������˾ | Display device |
| CN1497512A (en) * | 2002-09-27 | 2004-05-19 | ������������ʽ���� | Signal transmission circuit and display equipment |
| CN1577465A (en) * | 2003-07-24 | 2005-02-09 | 精工爱普生株式会社 | Display driver, electrooptical device and driving method |
| CN106205443A (en) * | 2016-09-22 | 2016-12-07 | 合肥京东方光电科技有限公司 | Testing circuit and method of work, drive circuit |
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Granted publication date: 20190423 |