CN211293080U - LCR measuring device based on transformer lead compensation bridge - Google Patents

LCR measuring device based on transformer lead compensation bridge Download PDF

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CN211293080U
CN211293080U CN201921108824.5U CN201921108824U CN211293080U CN 211293080 U CN211293080 U CN 211293080U CN 201921108824 U CN201921108824 U CN 201921108824U CN 211293080 U CN211293080 U CN 211293080U
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chip
transformer
compensation
terminal
short circuit
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段发阶
王宪全
蒋佳佳
黄婷婷
傅骁
孙中波
卜令冉
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Tianjin University
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Tianjin University
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Abstract

The utility model discloses a LCR measuring device based on transformer lead wire compensation bridge, the both ends of the component that awaits measuring and standard component have L respectively1、L2And P1、P2Four terminals, wherein L1Terminal and L2End internal short circuit, P1Terminal and P2End internal short circuit; the FPGA is connected with two DA chips and three AD chips; l of the device under test1Terminals connected to the first DA chip, P1Terminals connected to the first AD chip via input buffers, P2The end is connected with a compensation transformer and a feedback transformer; p of standard cell2Terminal and second DA chip connection, L2Terminals connected to a second AD chip via an input buffer, L1The end is connected with a compensation transformer and a feedback transformer; the output ends at two sides of the compensation transformer are respectively connected with the compensation operational amplifier and the ground; the output end of the compensation operational amplifier is connected with the feedback transformer; two input ends of the analog switch are respectively connected with the element to be tested and the standard element; and the output end of the analog switch is connected with the third AD chip.

Description

LCR measuring device based on transformer lead compensation bridge
Technical Field
The utility model relates to a LCR measurement field, especially an LCR measuring device based on transformer lead wire compensation bridge.
Background
In engineering practice and scientific research experiments, the measurement accuracy of the resistance, the inductance and the capacitance is not high, and the problem needs to be overcome all the time; particularly in the aspect of the measurement of small resistance and small inductance, the traditional LCR measuring instrument based on the commercial digital bridge technology is difficult to quickly and accurately measure the small resistance and the small inductance due to the existence of lead errors; the LCR measuring instrument based on other bridge circuits (such as kelvin bridge circuits) can accurately measure resistance, inductance and capacitance, but the LCR measuring instrument is complex in system, expensive in price, low in measuring speed, high in debugging difficulty, limited in use and difficult to popularize; along with the development of modern society, the precision requirements on resistance, inductance and capacitance are higher and higher, and the traditional LCR measuring instrument is more and more difficult to meet the requirements of social development, so that the LCR measuring method and the device which are quick, effective, convenient to use, economical and practical have great significance.
SUMMERY OF THE UTILITY MODEL
The utility model aims at providing a LCR measuring device based on transformer lead wire compensation bridge in order to overcome among the prior art shortcoming that digital bridge measurement accuracy is low, high accuracy bridge measurement speed is slow, with high costs not enough. The method has the advantages of low cost, high precision, high measuring speed and the like.
The utility model aims at realizing through the following technical scheme:
the LCR measuring device comprises an FPGA, a first DA chip, a second DA chip, a first AD chip, a second AD chip, a third AD chip, a component to be measured, a standard component, a compensation transformer, a compensation operational amplifier, a feedback transformer and an analog switch, wherein L is arranged at each of two ends of the component to be measured and the standard component1、L2And P1、P2Four terminals, FPGA is connected with first DA chip, second DA chip, first AD chip, second AD chip and third AD chip, and first DA chip is with the L of the component that awaits measuring1End-connected, L of the device under test1Terminal and L2End internal short circuit, P1Terminal and P2End internal short circuit; p of the device under test1The end is connected with the first AD chip through an input buffer; p of the device under test2The end is connected with the input end at one side of the compensation transformer;
p of second DA chip and standard element2End connection; l of standard cell1Terminal and L2End internal short circuit, P1Terminal and P2End internal short circuit; l of standard cell2The end is connected with the second AD chip through an input buffer; l of standard cell1The end is connected with the input end of the other side of the compensation transformer; the output ends at two sides of the compensation transformer are respectively connected with the compensation operational amplifier and the ground; the output end of the compensation operational amplifier is connected with the input end of one side of the feedback transformer; the input end of the other side of the feedback transformer is grounded; the output ends at two sides of the feedback transformer are respectively connected with the P of the element to be tested2L of terminal and standard element1End connection;
two input ends of the analog switch are respectively connected with the L of the element to be tested2P of terminal and standard cell1End connection; and the output end of the analog switch is connected with the third AD chip through the buffer amplifier.
Compared with the prior art, the utility model discloses a beneficial effect that technical scheme brought is:
(1) the utility model discloses based on transformer lead wire compensation technique, compensated the error that the lead wire introduced, overcome the shortcoming that digital electrical apparatus measurement accuracy is low.
(2) The utility model discloses utilize quick search technique, carry out rough estimate to the element that awaits measuring earlier, search out the accurate value of the element that awaits measuring again in the small range, improved measuring speed, overcome the slow shortcoming of high accuracy electric bridge measuring speed.
(3) The device simple structure makes the system cost lower, utilizes FPGA automatic balance electric bridge to make system convenient operation, has overcome high accuracy electric bridge and has costsly, operates complicated shortcoming.
Drawings
Fig. 1 is a functional structure diagram of the LCR measuring device of the present invention.
Reference numerals: 1-DA chip, 2-DA chip, 3-element to be tested, 4-compensation transformer, 5-compensation operational amplifier, 6-feedback transformer, 7-standard element, 8-AD chip, 9-AD chip, 10-analog switch, 11-AD chip, 12-FPGA
Detailed Description
The present invention will be described in further detail with reference to the following drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
As shown in fig. 1, the LCR measuring apparatus based on the transformer lead compensation bridge has the following connection relationship among the devices:
the FPGA12 is connected with the DA chip 1 for driving the element to be tested 3 and the DA chip 2 for driving the standard element 7; DA chip 1 and L of element to be tested 31End connection; l of the device under test 31Terminal and L2End internal short circuit, P1Terminal and P2End internal short circuit; p of the device under test 31End-pass input buffer and measurement
Figure DEST_PATH_GDA0002523873830000021
The AD chip 8 of (1) is connected; p of the device under test 32The end is connected with a compensation transformer 4; driving the DA chip 2 of the standard cell and P of the standard cell 72End connection; l of the standard cell 71Terminal and L2End internal short circuit, P1Terminal and P2End internal short circuit; l of the standard cell 72End-pass input buffer and measurement
Figure DEST_PATH_GDA0002523873830000022
The AD chip 9 of (1); l of the standard cell 71The end is connected with a compensation transformer 4; the output end of the compensation transformer 4 is respectively connected with the compensation operational amplifier 5 and the ground; the output end of the compensation operational amplifier 5 is connected with the input end of the feedback transformer 6; the output end of the feedback transformer 6 is connected with the P of the element to be tested 32And L of the standard cell 71End connection; the analog switch 10 has two input terminals respectively connected to L of the device under test 32P of terminal and standard element 71End connection; the output of the analog switch 10 passes through a buffer amplifier and measurement
Figure DEST_PATH_GDA0002523873830000031
And
Figure DEST_PATH_GDA0002523873830000032
the AD chip 11 of (a); measuring
Figure DEST_PATH_GDA0002523873830000033
AD chip 8 of (1), measurement
Figure DEST_PATH_GDA0002523873830000034
AD chip
9 of (1) and (2) and measurement
Figure DEST_PATH_GDA0002523873830000035
And
Figure DEST_PATH_GDA0002523873830000036
the AD chip 11 is connected with the FPGA 12;
the measurement method by the above device is as follows:
(1) the FPGA12 controls the corresponding DA chips 1 and 2, and outputs two paths of sine waves with independently adjustable amplitudes and phases by utilizing a DDS technology
Figure DEST_PATH_GDA0002523873830000037
And
Figure DEST_PATH_GDA0002523873830000038
wherein
Figure DEST_PATH_GDA0002523873830000039
Acting on the element to be measured 3ZxIn the above-mentioned manner,
Figure DEST_PATH_GDA00025238738300000310
acting on the standard cell 7ZBThe above step (1);
(2) under the requirement of high-precision measurement, the error introduced by the lead wire is not negligible, and the lead wire has a pressure price due to the resistance on the lead wire, and the element to be measured 3P is assumed2The voltage at the terminal is
Figure DEST_PATH_GDA00025238738300000311
Standard cell 7L1The voltage at the terminal is
Figure DEST_PATH_GDA00025238738300000312
The input voltage of the compensating transformer 4 is
Figure DEST_PATH_GDA00025238738300000313
The output of the compensating operational amplifier 5 is
Figure DEST_PATH_GDA00025238738300000314
The output of the flyback transformer 6 is
Figure DEST_PATH_GDA00025238738300000315
Due to losses and delays in the compensation transformer 4, the compensation operational amplifier 5 and the feedback remote amplifier 6
Figure DEST_PATH_GDA00025238738300000316
(3) After the compensation transformer 4 is connected, the voltage drop on the lead is
Figure DEST_PATH_GDA00025238738300000317
After compensation, the lead voltage drop delta is almost zero, and the error introduced by the lead voltage drop delta can be ignored;
by adjusting
Figure DEST_PATH_GDA00025238738300000318
And
Figure DEST_PATH_GDA00025238738300000319
should the amplitude and phase of the bridge reach an equilibrium condition,
Figure DEST_PATH_GDA00025238738300000320
at this time have
Figure DEST_PATH_GDA00025238738300000321
ZxRepresenting the element to be measured, ZBRepresenting a standard element, wherein A is a real part of a ratio result, B is an imaginary part of the ratio result, and DFT refers to discrete Fourier transform;
(4) when the bridge has reached an equilibrium state,
Figure DEST_PATH_GDA00025238738300000322
and
Figure DEST_PATH_GDA00025238738300000323
should be approximately zero, however, because
Figure DEST_PATH_GDA00025238738300000324
And
Figure DEST_PATH_GDA00025238738300000325
the regulating accuracy and the compensation capability of the transformer are limited, and the external noise exists, therefore
Figure DEST_PATH_GDA00025238738300000326
Since the condition (2) is difficult to satisfy, note DWIs a new price-balancing index
Figure DEST_PATH_GDA00025238738300000327
When | DWWhen | takes the minimum value, the bridge considers that equilibrium is reached;
(5) in order to quickly adjust the bridge to the balanced state, the device needs to adopt a certain quick search algorithm, which is written as follows:
Figure DEST_PATH_GDA00025238738300000328
Figure DEST_PATH_GDA0002523873830000041
wherein a isxControl for FPGA12
Figure DEST_PATH_GDA0002523873830000042
Register of amplitude, pxFor FPGA control
Figure DEST_PATH_GDA0002523873830000043
Register of phase aBFor FPGA control
Figure DEST_PATH_GDA0002523873830000044
Register of amplitude, pBFor FPGA control
Figure DEST_PATH_GDA0002523873830000045
Register of phase, function fxAnd fBCan be pre-measured and stored in the FPGA 12;
(6) in order to roughly estimate the position of the equilibrium point, it is necessary to roughly estimate ZxAnd ZBMemory for recording
Figure DEST_PATH_GDA0002523873830000046
Wherein
Figure DEST_PATH_GDA0002523873830000047
(7) Fixing of aBAnd pBWithout changing, adjust axAnd pxRespectively take the value (a)x1,px1) And (a)x2,px2) And through AD chip 9, corresponding
Figure DEST_PATH_GDA0002523873830000048
Are respectively as
Figure DEST_PATH_GDA0002523873830000049
And
Figure DEST_PATH_GDA00025238738300000410
at this time, it can be known
Figure DEST_PATH_GDA00025238738300000411
Rough estimation of the impedance of the device under test
Figure DEST_PATH_GDA00025238738300000412
Is composed of
Figure DEST_PATH_GDA00025238738300000413
Corresponding to
Figure DEST_PATH_GDA00025238738300000414
Coarse estimation of amplitude and phase registers
Figure DEST_PATH_GDA00025238738300000415
And
Figure DEST_PATH_GDA00025238738300000416
is composed of
Figure DEST_PATH_GDA00025238738300000417
Figure DEST_PATH_GDA00025238738300000418
(8) In that
Figure DEST_PATH_GDA00025238738300000419
Performing small-range traversal search nearby to find the absolute value DWPoint where | takes minimum value (a)xW,pxW),(axW,pxW) I.e. the point at which the bridge is balanced;
(9) the FPGA12 controls the analog switch 10 to respectively collect and collect data through the AD chip 11
Figure DEST_PATH_GDA00025238738300000420
And
Figure DEST_PATH_GDA00025238738300000421
can then find out
Figure DEST_PATH_GDA00025238738300000422
And
Figure DEST_PATH_GDA00025238738300000423
and then have
Figure DEST_PATH_GDA00025238738300000424
Finally obtaining the impedance value Z of the element to be measured 3xIs composed of
Zx=(A+j·B)·ZB
The present invention is not limited to the above-described embodiments. The above description of the embodiments is intended to describe and illustrate the technical solutions of the present invention, and the above embodiments are merely illustrative and not restrictive. Without departing from the spirit of the invention and the scope of the appended claims, the person skilled in the art can make many changes in form and detail within the teaching of the invention.

Claims (1)

1. The LCR measuring device based on the transformer lead compensation bridge is characterized by comprising an FPGA (field programmable gate array) (12), a first DA chip (1), a second DA chip (2), a first AD chip (8), a second AD chip (9), a third AD chip (11), an element to be measured (3), a standard element (7), a compensation transformer (4), a compensation operational amplifier (5), a feedback transformer (6) and an analog switch (10), wherein L are respectively arranged at two ends of the element to be measured (3) and the standard element (7)1、L2And P1、P2Four terminals, FPGA (12) are connected with first DA chip (1), second DA chip (2), first AD chip (8), second AD chip (9) and third AD chip (11), and first DA chip (1) is connected with the L of the component (3) that awaits measuring1End-connected, L of the component (3) to be tested1Terminal and L2End internal short circuit, P1Terminal and P2End internal short circuit; p of the device under test (3)1The end is connected with a first AD chip (8) through an input buffer; p of the device under test (3)2The end of the transformer is connected with the input end of one side of the compensation transformer (4);
p of the second DA chip (2) and the standard element (7)2End connection; l of the standard element (7)1Terminal and L2End internal short circuit, P1Terminal and P2End internal short circuit; l of the standard element (7)2The end is connected with a second AD chip (9) through an input buffer; l of the standard element (7)1The end of the voltage regulator is connected with the input end of the other side of the compensation transformer (4); the output ends at two sides of the compensation transformer (4) are respectively connected with the compensation operational amplifier (5) and the ground; the output end of the compensation operational amplifier (5) is connected with the input end of one side of the feedback transformer (6); the input end of the other side of the feedback transformer (6) is grounded; the output ends at two sides of the feedback transformer (6) are respectively connected with the P of the element to be tested (3)2L of terminal and standard element (7)1End connection;
two input ends of the analog switch (10) are respectively connected with the L of the element to be tested (3)2P of terminal and standard element (7)1End connection; the output end of the analog switch (10) is connected with the third AD chip (11) through a buffer amplifier.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110320410A (en) * 2019-07-15 2019-10-11 天津大学 A kind of LCR measuring device and method based on transformer lead compensator bridge

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110320410A (en) * 2019-07-15 2019-10-11 天津大学 A kind of LCR measuring device and method based on transformer lead compensator bridge

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