CN106504986B - Substrate etching method - Google Patents
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- CN106504986B CN106504986B CN201510564304.5A CN201510564304A CN106504986B CN 106504986 B CN106504986 B CN 106504986B CN 201510564304 A CN201510564304 A CN 201510564304A CN 106504986 B CN106504986 B CN 106504986B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
- H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
Abstract
The invention providesThe method for etching the substrate relates to the technical field of semiconductors, and can solve the problem that polymers which are difficult to clean are generated during etching to cause high preceding-stage voltage of an LED on the premise of ensuring sufficient etching selection ratio during etching. The substrate etched by the etching method of the substrate is provided with a photoresist layer with a required pattern in advance, and the etching method comprises the following steps: in the rough etching stage, the substrate is etched by adopting first etching gas by taking the photoresist layer as a mask, and the first etching gas contains carbon; and a fine etching stage, wherein the substrate after the coarse etching stage is etched by using a second etching gas by taking the photoresist layer as a mask, and the second etching gas does not contain carbon. The etching method of the substrate is suitable for SiO on the GaN substrate in the GaN-based LED2And etching the film.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a substrate etching method.
Background
GaN (gallium nitride) -based LEDs (Light-emitting diodes) have the advantages of low power consumption, long lifetime, high luminous efficiency, and the like, and are widely used in the fields of high-power illumination lamps, automobile instrument displays, large-area outdoor display screens, signal lamps, and general illumination.
How to improve the light extraction efficiency of GaN-based LEDs is one of the important research directions in the field. In order to improve the light extraction efficiency of the GaN-based LED, the current common practice is: plating a layer of SiO with thickness of about 1.5 μm on the surface of the GaN substrate2(silicon dioxide) film, then on SiO2Forming a photoresist layer with a desired pattern on the film, and masking the SiO layer with the photoresist layer2The film is dry etched to form the desired pattern. The formed pattern can be a plurality of small bulges distributed on the surface of the GaN substrate, and the pattern can increase the reflection and refraction of light, thereby improving the light extraction efficiency of the GaN-based LED.
SiO on the surface of the substrate facing GaN2When the film is dry-etched, CHF may be used3(trifluoromethane) or CxFy(fluorocarbon) as an etching gas, SF may also be used6(sulfur hexafluoride) as an etching gas. When CHF is used, however3Or CxFyWhen the etching gas is used as the etching gas, the etching gas contains C (carbon), C is easily combined with F (fluorine) to form a polymer containing C-F, the polymer is deposited on the surface of a GaN substrate and is difficult to clean by a wet method, the previous stage voltage of the GaN-based LED (namely the junction voltage when the LED is in forward conduction) is higher, and the power consumption of the GaN-based LED is larger. When SF is used6(Sulfur hexafluoride) gas etching of SiO2Film, albeit SF6F in the gas can form CF which is easy to be cleaned by wet method with C in the photoresist layerxPolymers (e.g.: CF)2(fluorocarbon) polymers) but due to SF6F in the gas reacts very easily with C in the photoresist layer, so that the etching rate of the photoresist layer becomes fast, resulting in an etching Selectivity (SiO)2The ratio of the etching rate of the film to the etching rate of the photoresist layer) decreases, failing to satisfy the normal etching of SiO2The desired etch selectivity of the film.
Disclosure of Invention
In order to overcome the defects in the prior art, the invention provides a substrate etching method, which is used for solving the problem of high LED preceding stage voltage caused by the generation of polymer which is difficult to clean in etching on the premise of ensuring that the etching selection ratio is sufficient in etching.
In order to achieve the purpose, the invention adopts the following technical scheme:
the first aspect of the present invention provides an etching method for a substrate, on which a photoresist layer having a desired pattern is formed in advance, the etching method comprising: in the rough etching stage, the substrate is etched by adopting first etching gas by taking the photoresist layer as a mask, and the first etching gas contains carbon; and a fine etching stage, wherein the substrate passing through the coarse etching stage is etched by using a second etching gas by using the photoresist layer as a mask, and the second etching gas does not contain carbon.
Different from the mode of finishing the whole etching process by adopting the same etching gas in the prior art, the etching method of the substrate provided by the invention divides the whole etching process into a rough etching stage and a fine etching stage: the etching gas adopted in the rough etching stage is the first etching gas which contains carbon, so that the first etching gas is not easy to react with the photoresist layer containing the same carbon, namely the etching of the photoresist layer is not easy to form, the etching selection ratio (the ratio of the etching rate of the substrate to the etching rate of the photoresist layer) is improved, and a required pattern is preliminarily formed on the surface of the substrate; the etching gas adopted in the fine etching stage is the second etching gas, the second etching gas does not contain carbon, and the second etching gas can react with the polymer generated in the rough etching stage and the carbon in the light resistance layer to generate the polymer which is easy to clean, so that the polymer which is difficult to clean and is remained on the surface of the substrate after etching is reduced, the problem of high preceding stage voltage caused by the polymer which is difficult to clean and remained on the surface of the substrate is solved on the premise of ensuring that the etching selectivity ratio is enough during etching, and the power consumption of a semiconductor device manufactured by adopting the substrate is reduced.
The etching method based on the substrate, wherein the first etching gas preferably comprises trifluoromethane gas or fluorocarbon gas.
Optionally, in the rough etching stage, a gas flow rate of the trifluoromethane gas or the fluorocarbon gas included in the first etching gas is 150 seem to 200 seem.
Optionally, the first etching gas further includes argon.
Optionally, in the rough etching stage, a gas flow rate of argon included in the first etching gas is 40sccm to 60 sccm.
The etching method based on the substrate is characterized in that the second etching gas preferably comprises sulfur hexafluoride gas.
Optionally, in the fine etching stage, the gas flow of sulfur hexafluoride gas included in the second etching gas is 150sccm to 200 sccm.
Based on the etching method of the substrate, the gas pressure in the etching chamber is preferably 3 mT-5 mT when the rough etching stage and the fine etching stage are carried out.
Based on the etching method of the substrate, when the rough etching stage and the fine etching stage are carried out, the radio frequency power of the upper electrode in the etching chamber is preferably 800W-1200W.
Based on the etching method of the substrate, when the rough etching stage and the fine etching stage are carried out, the radio frequency power of the lower electrode in the etching chamber is preferably 50W-100W.
For the etching method of the substrate described in the above items, the duration of the rough etching stage may preferably be 15min to 20 min.
For the etching method of the substrate described in the above items, the duration of the fine etching stage may preferably be 2min to 5 min.
The etching method of the substrate described in the above items is particularly suitable for the following cases: the substrate comprises a gallium nitride substrate and a silicon dioxide film formed on the gallium nitride substrate, and the photoresist layer is formed on the silicon dioxide film.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a flow chart of a method for etching a substrate according to an embodiment of the present invention;
fig. 2a to 2e are cross-sectional views of steps of a method for etching a substrate according to an embodiment of the present invention.
Description of reference numerals:
1-a GaN substrate; 2-SiO2A film; 3-photoresist layer.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The embodiment provides an etching method of a substrate, wherein a photoresist layer with a required pattern is formed on the substrate in advance, and the etching method comprises the following steps: in the rough etching stage, the substrate is etched by adopting first etching gas by taking the light resistance layer as a mask, and the first etching gas contains C (carbon); and a fine etching stage, wherein the substrate after the coarse etching stage is etched by using a second etching gas by using the photoresist layer as a mask, and the second etching gas does not contain carbon.
It should be noted that the rough etching stage described in this embodiment refers to: an etching stage for primarily forming a required pattern appearance on the surface of the substrate, wherein the etching depth of the coarse etching stage is larger than half of the total etching depth of the required pattern formed on the surface of the substrate; the fine etching stage in this embodiment refers to: and an etching stage for further etching the pattern formed in the rough etching stage and modifying the surface of the pattern so as to improve the verticality and the surface flatness of the pattern, wherein the etching depth of the fine etching stage is smaller than half of the total etching depth of the pattern required to be formed on the surface of the substrate.
The etching method of the substrate divides the whole etching process into a rough etching stage and a fine etching stage: the first etching gas containing carbon is adopted for etching in the rough etching stage, and the first etching gas contains carbon, so that the first etching gas does not easily react with a light resistance layer containing the same carbon, namely, the etching of the light resistance layer is not easily formed, and the etching rate of the light resistance layer is slower, thereby being beneficial to improving the etching selection ratio (the ratio of the etching rate of the substrate to the etching rate of the light resistance layer) and ensuring the etching selection ratio required by normal etching; the second etching gas which does not contain carbon is adopted for etching in the fine etching stage, and the second etching gas does not contain carbon, so that the second etching gas can react with the polymer generated in the rough etching stage and the carbon in the photoresist layer to generate polymer which is easy to clean, the residue of the polymer which is difficult to clean on the surface of the substrate after etching is reduced, and the problem of high preceding stage voltage caused by the residue of the polymer which is difficult to clean on the surface of the substrate is solved on the premise of ensuring enough etching selection ratio during etching, so that the power consumption of a semiconductor device manufactured by adopting the substrate is reduced, the defect of the semiconductor device caused by high preceding stage voltage is reduced, and the problem of scrapping of the semiconductor device caused by the overhigh preceding stage voltage, the overlarge power consumption and the exceeding of the tolerable threshold value of the semiconductor device is avoided.
Based on the above technical solution, in this embodiment, the first etching gas may specifically include CHF3(trifluoromethane) gas or CxFyThe (fluorocarbon) gases containing C have a slow etching rate for the photoresist layer containing C and a fast etching rate for the substrate, so that the substrate has a large etching selectivity for the photoresist layer, and the pattern on the surface of the substrate can be initially formed in the rough etching stage.
CHF included in the first etching gas during the rough etching stage3Gas or CxFyThe gas flow rate of the gas can be selected according to actual conditions (such as various process parameters), and can be preferably 150sccm to 200 sccm. CxFyThe gas may specifically be CF4Gas, C4F8Gases, and the like.
It should be noted that although the first etching gas contains CHF in the rough etching stage3Gas or CxFyThe C and F in the gas may combine to form a C-F containing polymer that is difficult to clean, but the resulting C-F containing polymer is mostly pumped away by molecular pumps, and the remaining C-F containing polymer is partially deposited on the walls of the etch chamber, leaving only a small layer deposited on the substrate surface.
The first etching gas can also comprise Ar (argon) gas so as to enhance the physical bombardment effect of plasma formed by the first etching gas on the substrate and further improve the etching rate of the substrate. The gas flow rate of Ar gas can be selected according to actual conditions (such as various process parameters), and can be preferably 40sccm to 60 sccm.
The second etching gas in the present embodiment may preferably include SF6(Sulfur hexafluoride) gas, SF6The gas does not contain C, and is easier to combine with C in the photoresist layer to form CFx(e.g., CF)2) Polymers, CFxThe polymer is easy to clean, so that the polymer residue which is difficult to clean is not left on the substrate after the etching is finished, and the reduction of the semiconductor device manufactured by using the substrate is facilitatedThe forward voltage of the element. And, SF6F in the gas also reacts with the polymer containing C-F units deposited on the substrate surface during the rough etching stage to form easily cleaned CFxThe polymer is further reduced, thereby further reducing the polymer which is difficult to clean on the substrate and reducing the pre-stage voltage.
SF included in the second etching gas during the fine etching stage6The gas flow rate of the gas can be selected according to actual conditions, and can be preferably 150sccm to 200 sccm.
It should be noted that, on the basis of primarily forming the substrate surface pattern in the rough etching stage, the fine etching stage mainly realizes the modification of the substrate surface pattern, improves the flatness of the substrate surface, and is beneficial to reducing the preceding-stage voltage.
In this embodiment, during the rough etching stage and the fine etching stage, if the gas pressure in the etching chamber is too low, the etching rate is reduced, and if the gas pressure in the etching chamber is too high, the process window is unstable, the molecular free path is too small, the number of molecules is increased, the ion bombardment is weak, so that reaction byproducts of etching are not easily pumped away, and polymers remained on the surface of the substrate and not easy to clean are increased. Therefore, the gas pressure in the etching chamber can be reasonably designed, and the gas pressure is preferably 3 mT-5 mT, so that the high etching rate is ensured, and excessive polymer which is difficult to clean is prevented from remaining on the surface of the substrate. It should be noted that the gas pressure of the etching chamber in the rough etching stage may be the same as or different from the gas pressure of the etching chamber in the fine etching stage, and this embodiment is not limited thereto.
During the rough etching stage and the fine etching stage, if the SRF (upper electrode radio frequency power) of the etching chamber is too low, the molecular ionization rate is easily low, which results in a slow etching rate, and if the SRF of the etching chamber is too high, the sidewall of the surface pattern of the substrate is rough, which is not favorable for the light extraction efficiency of the LED device manufactured by using the substrate. Accordingly, the SRF in the etching chamber can be reasonably designed, and the SRF can be preferably 800W-1200W, so that the high etching rate is ensured, the side wall of the pattern on the surface of the substrate can be finely etched, and the verticality and the smoothness of the side wall of the pattern are improved. It should be noted that the SRF of the etching chamber in the rough etching stage may be the same as or different from the SRF of the etching chamber in the fine etching stage, and this embodiment is not limited thereto.
During the rough etching stage and the fine etching stage, if the BRF (lower electrode radio frequency power) of the etching chamber is too low, the etching rate is likely to be slow, and if the BRF of the etching chamber is too high, the surface of the substrate is likely to be damaged, which may cause the increase of the front stage voltage of the semiconductor device manufactured by using the substrate. Therefore, the BRF in the etching chamber can be reasonably designed, and the BRF can be preferably 50-100W, so that the high etching rate is ensured, and the surface of the substrate cannot be damaged. It should be noted that the BRF of the etching chamber in the rough etching stage may be the same as or different from the BRF of the etching chamber in the fine etching stage, and this embodiment is not limited thereto.
In this embodiment, the duration of the rough etching stage may preferably be 15min to 20min, so as to ensure that the required pattern is initially formed on the surface of the substrate after the rough etching stage. The duration of the fine etching stage may preferably be 2min to 5min for further etching and modifying the sidewall of the pattern formed in the coarse etching stage.
The substrate etched by the etching method provided by the embodiment can comprise a GaN substrate and SiO formed on the GaN substrate2(silicon dioxide) thin film, photoresist layer formed on SiO2On the film, the etching of the substrate at this time mainly refers to the etching of SiO on the GaN substrate2And etching the film. Based on this, the following describes the etching method for the substrate provided in this embodiment in detail, please refer to fig. 1 and fig. 2a to 2c, and the etching method includes the following steps:
step S1: providing a GaN substrate 1, and forming SiO on the GaN substrate 12 Film 2, GaN substrate 1 and SiO2The membrane 2 constitutes the substrate to be etched. SiO 22The thickness of the film 2 may preferably be 1.5 μm.
Step S2: in SiO2Coating a photoresist layer 3 on the film 2, exposing and developing the photoresist layer 3 to make the photoresist layer 3 have a desired shapeAnd (6) a graph.
Step S3: a coarse etch stage of the etch process is performed. The method specifically comprises the following steps: placing the substrate to be etched coated with the photoresist layer 3 on a cooler of an etching chamber, taking the photoresist layer 3 as a mask, and adopting a first etching gas to etch SiO of the substrate to be etched2Etching the film 2; wherein the first etching gas contains C, preferably CHF3Gas or CxFyGas to increase etching Selectivity (SiO)2Ratio of etching rate of the thin film 2 to etching rate of the photoresist layer 3), CHF3Gas or CxFyThe gas flow of the gas can be 150 sccm-200 sccm; the first etching gas can also comprise Ar gas to enhance the physical bombardment effect, and the gas flow of the Ar gas can be 40sccm to 60 sccm; the gas pressure in the etching chamber can be 3 mT-5 mT to ensure high etching rate and timely pumping away reaction by-products (such as polymer containing C-F bond); the SRF in the etching chamber can be 800W-1200W so as to ensure higher etching rate; the BRF in the etching chamber can be 50W-100W, so that a high etching rate is ensured, the GaN substrate is not damaged, and the preceding stage voltage of the LED is reduced; the temperature of the cooler in the etching chamber can be 20 ℃; the duration of the rough etching stage can be 15 min-20 min, and the etching depth is about 1.3 mu m, so as to ensure that SiO passes through the rough etching stage2The desired pattern is preliminarily formed in the film 2.
Step S4: a fine etch phase of the etch process is performed. The method specifically comprises the following steps: using the photoresist layer 3 as a mask, and applying a second etching gas to the SiO2Etching the film 2; wherein the second etching gas does not contain C, preferably SF6Gas to react with the polymer containing C-F bond generated in the rough etching stage and C in the photoresist layer to generate easily cleaned CFxPolymers (e.g.: CF)2Polymer) to reduce the polymer residue on the surface of the substrate after etching, and prevent the increase of the LED front-stage voltage due to the polymer residue, SF6The gas flow of the gas can be 150 sccm-200 sccm; the gas pressure in the etching chamber can be 3 mT-5 mT to ensure higher etching rate; the SRF in the etching chamber can be 800W-1200W, so as to ensure the comparisonHigh etching rate and can realize the etching of SiO2The side wall of the graph in the film 2 is finely etched, so that the verticality and the smoothness of the side wall of the graph are improved, and the light emitting efficiency of the LED is enhanced; the BRF in the etching chamber can be 50W-100W, so that a high etching rate is ensured, the GaN substrate is not damaged, and the preceding stage voltage of the LED is reduced; the temperature of the cooler in the etching chamber can be 20 ℃; the duration of the fine etching stage can be 2 min-5 min, and the etching depth is about 0.2 μm, so as to further etch SiO2And (3) modifying the side wall of the graph formed in the rough etching stage to obtain the graph with smooth side wall.
After the steps S1-S4 are completed, the method further comprises a step of removing the photoresist layer 3, and after the photoresist layer 3 is removed, a substrate with a required pattern can be obtained, wherein the substrate comprises a GaN substrate 1 and a SiO with a pattern2Film, SiO2The film may have a pattern comprising a plurality of small protrusions that enhance the reflection and refraction of light to increase the light extraction efficiency of LEDs fabricated using the substrate.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.
Claims (13)
1. A method for etching a substrate, wherein a photoresist layer with a required pattern is formed on the substrate in advance, and the method comprises the following steps:
in the rough etching stage, the substrate is etched by adopting first etching gas by taking the light resistance layer as a mask, wherein the first etching gas contains carbon so as to improve the ratio of the etching rate of the substrate to the etching rate of the light resistance layer;
and a fine etching stage, using the light resistance layer as a mask, further etching the substrate after the coarse etching stage by using a second etching gas, and modifying the surface of the pattern formed in the coarse etching stage, wherein the second etching gas does not contain carbon, so that the second etching gas reacts with the polymer generated in the coarse etching stage and carbon in the light resistance layer.
2. The method of etching a substrate according to claim 1, wherein the first etching gas comprises a trifluoromethane gas or a fluorocarbon gas.
3. The method according to claim 2, wherein a gas flow rate of the trifluoromethane gas or the fluorocarbon gas included in the first etching gas is 150 seem to 200 seem at the time of the rough etching step.
4. The method of etching a substrate according to claim 2, wherein the first etching gas further comprises argon.
5. The method for etching a substrate according to claim 4, wherein the first etching gas includes argon gas at a gas flow rate of 40sccm to 60sccm when the rough etching is performed.
6. The method of etching a substrate according to claim 1, wherein the second etching gas comprises sulfur hexafluoride gas.
7. The method for etching a substrate according to claim 6, wherein a gas flow rate of sulfur hexafluoride gas included in the second etching gas is 150 seem to 200 seem at the time of the fine etching step.
8. The method of etching a substrate according to claim 1, wherein a gas pressure in the etching chamber is 3mT to 5mT at the time of performing the rough etching stage and the fine etching stage.
9. The method of etching a substrate according to claim 1, wherein the rf power of the upper electrode in the etching chamber is 800W to 1200W during the rough etching stage and the fine etching stage.
10. The method for etching a substrate according to claim 1, wherein the rf power of the bottom electrode in the etching chamber is 50W to 100W during the rough etching stage and the fine etching stage.
11. A method for etching a substrate according to any of claims 1 to 10, wherein the duration of the rough etching stage is in the range of 15min to 20 min.
12. The method for etching a substrate according to any one of claims 1 to 10, wherein the duration of the fine etching stage is 2min to 5 min.
13. The method for etching the substrate according to any one of claims 1 to 10, wherein the substrate comprises a gallium nitride substrate and a silicon dioxide thin film formed on the gallium nitride substrate, and the photoresist layer is formed on the silicon dioxide thin film.
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Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103730350A (en) * | 2013-12-26 | 2014-04-16 | 迪源光电股份有限公司 | Method for removing coarse pattern on surface of coarsened material |
CN104253035A (en) * | 2013-06-27 | 2014-12-31 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Substrate etching method |
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CN101615579B (en) * | 2009-07-29 | 2012-04-25 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Semiconductor plasma etching technology |
CN102324387A (en) * | 2011-09-28 | 2012-01-18 | 上海宏力半导体制造有限公司 | Deep trench formation method |
CN104517975B (en) * | 2013-09-27 | 2017-07-07 | 中芯国际集成电路制造(上海)有限公司 | A kind of preparation method of semiconductor devices |
-
2015
- 2015-09-07 CN CN201510564304.5A patent/CN106504986B/en active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104253035A (en) * | 2013-06-27 | 2014-12-31 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Substrate etching method |
CN103730350A (en) * | 2013-12-26 | 2014-04-16 | 迪源光电股份有限公司 | Method for removing coarse pattern on surface of coarsened material |
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