CN106504714B - A kind of display device and its multi-screen display method - Google Patents
A kind of display device and its multi-screen display method Download PDFInfo
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- CN106504714B CN106504714B CN201611139791.1A CN201611139791A CN106504714B CN 106504714 B CN106504714 B CN 106504714B CN 201611139791 A CN201611139791 A CN 201611139791A CN 106504714 B CN106504714 B CN 106504714B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/14—Display of multiple viewports
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- Crystallography & Structural Chemistry (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
The present invention provides a kind of display device and its multi-screen display method, which includes: application processor, for providing the public voltage signal as data-signal to dark-state split screen part in split screen display available；GOA circuit, for exporting scanning signal under the control of application processor；The scanning signal for the public voltage signal to be converted to common voltage driving signal, and is converted to scanning drive signal by driving circuit；Backlight assembly cooperates for providing backlight, and under the control of application processor with the common voltage driving signal and the scanning drive signal to carry out split screen display available.The split screen display available of indicator screen may be implemented in the present invention.
Description
Technical field
The invention belongs to display control technology fields, specifically, more particularly to a kind of display device and its split screen display available
Method.
Background technique
GOA (Gate Driver On Array, the row scanning being integrated in array substrate) is to utilize existing film crystal
Scanning drive signal circuit production in array substrate, is realized and is progressively scanned to grid line by pipe LCD (Liquid Crystal Display) array processing procedure
One technology of driving method.
As mobile intelligent process is increasingly accelerated, some special display demands are brought into schedule gradually at design end, example
Such as split screen display available, as shown in Figure 1.The purpose of split screen display available is more diversified, power saving, easy to use, application requirement etc..
Summary of the invention
The present invention provides a kind of display device and its multi-screen display methods, and the split screen to realize indicator screen is aobvious
Show.
According to an aspect of the invention, there is provided a kind of display device, comprising:
Application processor is believed for providing in split screen display available to dark-state split screen part as the common voltage of data-signal
Number；
GOA circuit, for exporting scanning signal under the control of application processor；
Driving circuit, for the public voltage signal to be converted to common voltage driving signal, and by the scanning
Signal is converted to scanning drive signal；
Backlight assembly, for providing backlight, and under the control of application processor with the common voltage driving signal
Cooperate with the scanning drive signal to carry out split screen display available.
According to one embodiment of present invention, the split screen includes two split screens of main screen and vice screen.
According to one embodiment of present invention, the backlight assembly includes and each split screen backlight group correspondingly
Part.
According to one embodiment of present invention, the GOA circuit includes:
The first transistor, grid input second clock signal, and source electrode is separately connected the drain electrode and the tenth of the 9th transistor
The drain electrode of transistor, the grid of drain electrode connection second transistor；
Second transistor, source electrode input second clock signal, the drain electrode of drain electrode connection third transistor；
Third transistor, source electrode input high level signal, grid input the first clock signal；
4th transistor, grid input the first clock signal, and source electrode connects the drain electrode of the 5th transistor, drain electrode connection the
The drain electrode of one transistor；
5th transistor, grid connect the drain electrode of second transistor, source electrode input low level signal；
6th transistor, grid input low level signal, source electrode connect the drain electrode of the first transistor, drain electrode connection the 7th
The grid of transistor；
7th transistor, source electrode input the first clock signal, and the drain electrode of drain electrode the 8th transistor of connection simultaneously exports the same level
The scanning signal of GOA circuit；
8th transistor, grid connect the drain electrode of second transistor, source electrode input low level signal；
9th transistor, grid input first control signal, and source electrode input is upwards every the scanning of level-one GOA module output
Signal；
Tenth transistor, grid input second control signal, and source electrode input is downwards every the scanning of level-one GOA module output
Signal；
11st transistor, grid and source electrode input the first reset signal, the drain electrode of drain electrode connection second transistor；
First capacitor, one end connect the grid of the 7th transistor, and the other end connects the drain electrode of the 7th transistor；
Second capacitor, one end connect the grid of the 8th transistor, and the other end connects the source electrode of the 8th transistor；
Tenth two-transistor, grid input the second reset signal, source electrode input low level signal, the 8th crystalline substance of drain electrode connection
The grid of body pipe；
13rd transistor, grid input the second reset signal, source electrode input high level signal, the 8th crystalline substance of drain electrode connection
The drain electrode of body pipe.
According to one embodiment of present invention, the GOA circuit in split screen junction includes:
The first transistor, grid input the first clock signal, and source electrode is separately connected the drain electrode and the tenth of the 9th transistor
The drain electrode of transistor, the grid of drain electrode connection second transistor；
Second transistor, source electrode input second clock signal, the drain electrode of drain electrode connection third transistor；
Third transistor, source electrode input high level signal, grid input the first clock signal；
4th transistor, grid input the first clock signal, and source electrode connects the drain electrode of the 5th transistor, drain electrode connection the
The drain electrode of one transistor；
5th transistor, grid connect the drain electrode of second transistor, source electrode input low level signal；
6th transistor, grid input low level signal, source electrode connect the drain electrode of the first transistor, drain electrode connection the 7th
The grid of transistor；
7th transistor, source electrode input the first clock signal, and the drain electrode of drain electrode the 8th transistor of connection simultaneously exports the same level
The scanning signal of GOA circuit；
8th transistor, grid connect the drain electrode of second transistor, source electrode input low level signal；
9th transistor, grid input first control signal, and source electrode input is upwards every the scanning of level-one GOA module output
Signal；
Tenth transistor, grid input second control signal, and source electrode input is downwards every the scanning of level-one GOA module output
Signal；
11st transistor, grid and source electrode input the first reset signal, the drain electrode of drain electrode connection second transistor；
First capacitor, one end connect the grid of the 7th transistor, and the other end connects the drain electrode of the 7th transistor；
Second capacitor, one end connect the grid of the 8th transistor, and the other end connects the source electrode of the 8th transistor；
14th transistor, grid input the first enabling signal, and source electrode inputs sweeping every level-one GOA circuit output upwards
Retouch signal, the source electrode of drain electrode the 9th transistor of connection, wherein first enabling signal is for closing the 14th transistor and opening
The first order GOA circuit of split screen where opening the 14th transistor.
According to another aspect of the present invention, a kind of multi-screen display method is additionally provided, comprising:
Application processor controls the public voltage signal provided to dark-state split screen part as data-signal；
The public voltage signal is converted to common voltage driving signal by driving circuit；
The common voltage driving signal is input to dark-state split screen part.
According to another aspect of the present invention, second of multi-screen display method is additionally provided, comprising:
Application processor controls the public voltage signal provided to dark-state split screen part as data-signal；
The public voltage signal is converted to common voltage driving signal by driving circuit；
The common voltage driving signal is inputted into dark-state split screen, simultaneously closes off the sub- backlight group of corresponding dark-state split screen
Part.
According to another aspect of the present invention, the third multi-screen display method is additionally provided, comprising:
Application processor controls the public voltage signal provided to dark-state split screen part as data-signal；
The public voltage signal is converted to common voltage driving signal by driving circuit；
When split screen display available, to GOA circuit input the first reset signal and continue the first clock signal of input high level with
So that GOA circuit keeps output high level scanning signal；
Under the conditions of keeping exporting high level scanning signal, the common voltage driving signal is input to dark-state split screen.
According to another aspect of the present invention, the 4th kind of multi-screen display method is additionally provided, comprising:
Application processor controls the public voltage signal provided to dark-state split screen part as data-signal；
The public voltage signal is converted to common voltage driving signal by driving circuit；
Dark-state split screen part is set to show black picture by the common voltage driving signal, wherein different when split screen display available
The first order GOA circuit of split screen part is controlled by different enabling signals, the 14th transistor of the GOA circuit of split screen junction by
The control of first enabling signal closes to limit the transmission of the enabling signal between dark-state split screen and non-dark-state split screen.
According to another aspect of the present invention, the 5th kind of multi-screen display method is additionally provided, comprising:
Application processor control, which is spaced on schedule to display screen, inputs blank screen signal, remaining time is to dark-state split screen portion
The public voltage signal provided as data-signal is provided；
The public voltage signal is converted to common voltage driving signal by driving circuit, or blank screen signal is converted to black
Shield driving signal；
When split screen display available, believed using the scanning that the second reset signal drags down all GOA circuit outputs of corresponding dark-state split screen
Number to low level, while driving circuit drags down and is input to the clock signals of all GOA circuits of corresponding dark-state split screen to low level.
Beneficial effects of the present invention:
The present invention provides several different schemes to realize split screen display available, and production is made to have various selective.
Other features and advantages of the present invention will be illustrated in the following description, also, partly becomes from specification
It obtains it is clear that understand through the implementation of the invention.The objectives and other advantages of the invention can be by specification, right
Specifically noted structure is achieved and obtained in claim and attached drawing.
Detailed description of the invention
To describe the technical solutions in the embodiments of the present invention more clearly, required in being described below to embodiment
Attached drawing does simple introduction:
Fig. 1 is a kind of display split screen display available schematic diagram；
Fig. 2 is display device structure figure according to an embodiment of the invention；
Fig. 3 is a kind of GOA circuit structure figure in the prior art；
Fig. 4 is the timing diagram of corresponding diagram 3；
Fig. 5 is the timing diagram of first and second embodiments according to the present invention；
Fig. 6 is the timing diagram of third embodiment according to the present invention；
Fig. 7 is the timing diagram of the 4th embodiment according to the present invention；
Fig. 8 is the timing diagram of the 5th embodiment according to the present invention.
Specific embodiment
Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings and examples, how to apply to the present invention whereby
Technological means solves technical problem, and the realization process for reaching technical effect can fully understand and implement.It needs to illustrate
As long as not constituting conflict, each feature in each embodiment and each embodiment in the present invention can be combined with each other,
It is within the scope of the present invention to be formed by technical solution.
It is illustrated in figure 2 display device structure schematic diagram according to an embodiment of the invention, is come pair below with reference to Fig. 2
The present invention is described in detail, the present invention using split screen display available as two split screens of main screen and vice screen, main screen be dark-state split screen for into
Row explanation.
As shown in Fig. 2, the display device includes application processor AP, GOA circuit, driving circuit DIC and backlight assembly
BLU.Wherein, application processor is believed for providing to each split screen part as the common voltage of data-signal in split screen display available
Number；GOA circuit controls output scanning signal by application processor；Driving circuit respectively with application processor and GOA circuit connection,
For public voltage signal to be converted to common voltage driving signal and scanning signal is converted to scanning drive signal；Backlight
Source component is connect with application processor, for providing backlight, by application processor control and common voltage driving signal and scanning
Driving signal cooperates to carry out split screen display available.
The display device keeps the dark-state split screen of the part aobvious by providing public voltage signal to the data line of split screen part
Show black picture.
When implementing split screen display available, application processor controls to split screen part and provides public voltage signal using as data
Signal；Public voltage signal is converted to common voltage driving signal by driving circuit；Common voltage driving signal is input to secretly
State split screen is to show black picture split screen.This is because when public voltage signal is inputted as data-signal, in display panel
Liquid crystal molecule both end voltage is common voltage, thus liquid crystal molecule does not rotate, and then backlight cannot penetrate liquid crystal molecule,
So that corresponding split screen part shows black picture.
According to one embodiment of present invention, which includes and each split screen backlight group correspondingly
Part.That is, each split screen has a sub- backlight assembly.For the display dress with two split screens of main screen and vice screen
It sets, there are two sub- backlight assemblies, a sub- backlight assembly corresponds to main screen, and another sub- backlight assembly corresponds to vice screen.
According to one embodiment of present invention, which includes 13 transistors and two capacitors, specific: the
The grid of one transistor inputs second clock signal, and source electrode is separately connected the drain electrode of the 9th transistor and the leakage of the tenth transistor
Pole, the grid of drain electrode connection second transistor；The source electrode of second transistor inputs second clock signal, drain electrode connection third crystal
The drain electrode of pipe；The source electrode input high level signal of third transistor, grid input second clock signal；The grid of 4th transistor
The first clock signal is inputted, source electrode connects the drain electrode of the 5th transistor, the drain electrode of drain electrode connection the first transistor；5th transistor
Grid connection second transistor drain electrode, source electrode input low level signal；The grid input low level signal of 6th transistor,
Source electrode connects the drain electrode of the first transistor, the grid of drain electrode the 7th transistor of connection；When the source electrode input first of the 7th transistor
Clock signal, the drain electrode of drain electrode the 8th transistor of connection and the scanning signal for exporting the same level GOA circuit；The grid of 8th transistor connects
Connect the drain electrode of second transistor, source electrode input low level signal；The grid of 9th transistor inputs first control signal, and source electrode is defeated
Enter upwards every the scanning signal of level-one GOA module output；The grid of tenth transistor inputs second control signal, source electrode input to
Under every level-one GOA module output scanning signal；The grid and source electrode of 11st transistor input the first reset signal, and drain electrode connects
Connect the drain electrode of second transistor；One end of first capacitor connects the grid of the 7th transistor, and the other end connects the 7th transistor
Drain electrode；Second capacitor, one end connect the grid of the 8th transistor, and the other end connects the source electrode of the 8th transistor；12nd is brilliant
The grid of body pipe inputs the second reset signal, source electrode input low level signal, the grid of drain electrode the 8th transistor of connection；13rd
The grid of transistor inputs the second reset signal, source electrode input high level signal, the drain electrode of drain electrode the 8th transistor of connection.
Specifically, increase the tenth two-transistor and the 13rd transistor as shown in figure 3, on the basis of the circuit diagram, and
Increase corresponding control signal, wherein NT indicates that N-type TFT, CK indicate the first clock signal, and XCK indicates second clock signal, L
Indicate low level signal, H indicates high level signal, and U2D and D2U indicates different two driving signals of current potential, and RESET indicates the
One reset signal.Fig. 4 includes the timing diagram and value of each input signal in corresponding diagram 3, further includes solution needed for the work of Fig. 3 circuit
Multiplexed signals DEMUX1, DEMUX2, DEMUX3, scanning signal G1, G2, G3, G4, open signal STV, high level in corresponding diagram 3
The VGH of signal H, the VGL of low level signal L in corresponding diagram 3, CK1L, CK2R of the first clock signal CK in corresponding diagram 3, CK3L,
CK4R etc..
According to one embodiment of present invention, the GOA circuit of split screen junction includes 12 transistors and two capacitors,
Specific: the grid of the first transistor inputs second clock signal, and source electrode is separately connected drain electrode and the tenth crystalline substance of the 9th transistor
The drain electrode of body pipe, the grid of drain electrode connection second transistor；The source electrode of second transistor inputs second clock signal, drain electrode connection
The drain electrode of third transistor；The source electrode input high level signal of third transistor, grid input second clock signal；4th crystal
The grid of pipe inputs the first clock signal, and source electrode connects the drain electrode of the 5th transistor, the drain electrode of drain electrode connection the first transistor；The
The drain electrode of the grid connection second transistor of five transistors, source electrode input low level signal；The grid input of 6th transistor is low
Level signal, source electrode connect the drain electrode of the first transistor, the grid of drain electrode the 7th transistor of connection；The source electrode of 7th transistor is defeated
Enter the first clock signal, the drain electrode of drain electrode the 8th transistor of connection and the scanning signal for exporting the same level GOA circuit；8th transistor
Grid connection second transistor drain electrode, source electrode input low level signal；Grid input the first control letter of 9th transistor
Number, source electrode input is upwards every the scanning signal of level-one GOA module output；The grid of tenth transistor inputs second control signal,
Source electrode input is downwards every the scanning signal of level-one GOA module output；Grid and the source electrode input first of 11st transistor resets
Signal, the drain electrode of drain electrode connection second transistor；One end of first capacitor connects the grid of the 7th transistor, other end connection the
The drain electrode of seven transistors；One end of second capacitor connects the grid of the 8th transistor, and the other end connects the source electrode of the 8th transistor；
The grid of 14th transistor inputs the first enabling signal, and source electrode input is upwards every the scanning signal of level-one GOA circuit output, leakage
Pole connects the source electrode of the 9th transistor, wherein the first enabling signal is for closing the 14th transistor and opening the 14th crystal
The first order GOA circuit of split screen where pipe.
As shown in figure 3, increasing by the 14th transistor on the basis of the circuit diagram, and increase corresponding first starting letter
Number.First enabling signal is the enabling signal of the first order GOA circuit of split screen where the 14th transistor.The first of each split screen
The enabling signal of grade GOA circuit is external signal, and the enabling signal of second level GOA circuit is sweeping for upper level GOA circuit output
Signal is retouched, the 14th transistor can prevent upper level GOA circuit from being input to the scanning signal for doing enabling signal at the split screen
Next stage GOA circuit is reached, so that two split screens at both ends are controlled by different enabling signals at split screen.
According to another aspect of the present invention, a kind of multi-screen display method is additionally provided, corresponding to the display device of Fig. 2,
It include: that application processor controls the public voltage signal provided to dark-state split screen part as data-signal；Driving circuit will be public
Common voltage signal is converted to common voltage driving signal；Common voltage driving signal is input to dark-state split screen part.The implementation
Example the method needs application processor to adjust data-signal, and normal GOA driving remains unchanged.Fig. 5 show correspondence
The main screen of the embodiment shows the timing diagram that black picture, vice screen are normally shown, at this point, being in the main screen of dark-state, data-signal is
The scanning signal of public voltage signal, the first clock signal and GOA circuit output that input GOA circuit is normal.The embodiment
It can support main-auxiliary screen while display is shown with independent, and support forward and reverse scanning.
According to another aspect of the present invention, second of multi-screen display method is additionally provided, corresponding to Fig. 2 has multiple sons
The case where backlight assembly, comprising: application processor controls the common voltage provided to dark-state split screen part as data-signal
Signal；Public voltage signal is converted to common voltage driving signal by driving circuit；The common voltage driving signal is inputted
Dark-state split screen part simultaneously closes off the sub- backlight assembly of corresponding black picture split screen.Method described in the embodiment needs to apply
Processor adjusts data-signal, and backing structure is also redesigned.The main screen that Fig. 5 show the corresponding embodiment is aobvious
Show the timing diagram that black picture, vice screen are normally shown, at this point, being in the main screen of dark-state, data-signal is public voltage signal, input
First clock signal of GOA circuit and the scanning signal of GOA circuit output are normal.The embodiment can support main-auxiliary screen while show
Show and individually shows and support forward and reverse scanning.Individually the backlight of black picture split screen part is closed when display, screen without light leakage and
Power consumption is greatly reduced.
According to another aspect of the present invention, the third multi-screen display method is additionally provided, corresponds to Fig. 3 and increases the 12nd
Circuit when transistor and the 13rd transistor and corresponding control signal, comprising: application processor is controlled to dark-state split screen part
Public voltage signal as data-signal is provided；Public voltage signal is converted to common voltage driving signal by driving circuit；
The first reset signal is inputted to GOA circuit when split screen display available and continues the first clock signal of input high level so that GOA circuit
Keep output high level scanning signal；Under the conditions of keeping exporting high level scanning signal, common voltage driving signal is inputted
To dark-state split screen.The embodiment the method needs application processor to adjust data-signal, at the same need GOA circuit into
Row changes and GOA driving signal is adjusted.Its corresponding timing diagram is as shown in fig. 6, at this point, be in the main screen of dark-state, data
Signal is public voltage signal, and the scanning signal of the first clock signal and GOA circuit output that input GOA circuit is high electricity
It is flat.Method described in the embodiment can support main-auxiliary screen while display and vice screen are individually shown, only support simple scanning.It is individually aobvious
Black screen portion GOA signal is direct current, lower power consumption when showing.
According to another aspect of the present invention, the 4th kind of multi-screen display method is additionally provided, corresponds to Fig. 3 and increases the 14th
The GOA circuit of transistor, comprising: application processor controls to provide to dark-state split screen part to be believed as the common voltage of data-signal
Number；Public voltage signal is converted to common voltage driving signal by driving circuit；Make dark-state point by common voltage driving signal
Screen part shows black picture, wherein when split screen display available, the first order GOA circuit of different split screen parts is by different enabling signal controls
System, the 14th transistor of the GOA circuit of split screen junction is controlled by the first enabling signal closes to limit dark-state split screen and non-
Enabling signal transmission between dark-state split screen.The embodiment the method needs application processor to the data for being input to data line
Signal adjusts, at the same need GOA circuit to be changed and GOA driving remain unchanged, corresponding timing diagram such as Fig. 7 institute
Show.At this point, being in the main screen of dark-state, data-signal is public voltage signal, and GOA circuit keeps output low potential (i.e. data
Signal can not be transmitted to pixel, so data-signal can also be normal data signal or hanging), the first clock signal can be just
Often output.The method of the embodiment can support main-auxiliary screen while display is shown with independent, and support forward and reverse scanning.
According to another aspect of the present invention, the 5th kind of multi-screen display method is additionally provided, comprising: when split screen display available, answer
It is spaced on schedule with processor control to display screen and inputs blank screen signal, remaining time provides conduct to dark-state split screen part
The public voltage signal of data-signal；The public voltage signal is converted to common voltage driving signal by driving circuit, or will
Blank screen signal is converted to blank screen driving signal；Sweeping for all GOA circuit outputs of corresponding dark-state split screen is dragged down using reset signal
Signal is retouched, while driving circuit drags down the clock signal for being input to all GOA circuits of corresponding dark-state split screen.This method needs are answered
It is input to the data-signal of data line with processor adjustment, with inserting black picture, while adjusting the driving letter of GOA circuit output
Number.Its corresponding timing diagram, when not inputting blank screen signal to data line, inputs public as shown in figure 8, under the state to data line
Common voltage signal or normal data signal are hanging, because data-signal can not be input to pixel at this time；GOA circuit is kept
Export low level；First clock signal keeps input low level.The insertion black picture of one frame in interval can prevent blank screen on schedule
Partial pixel stores charge.The method of the embodiment can support main-auxiliary screen while display is shown with independent, and support forward and reverse sweep
It retouches.
While it is disclosed that embodiment content as above but described only to facilitate understanding the present invention and adopting
Embodiment is not intended to limit the invention.Any those skilled in the art to which this invention pertains are not departing from this
Under the premise of the disclosed spirit and scope of invention, any modification and change can be made in the implementing form and in details,
But scope of patent protection of the invention, still should be subject to the scope of the claims as defined in the appended claims.
Claims (7)
1. a kind of display device, comprising:
Application processor, for providing the public voltage signal as data-signal to dark-state split screen part in split screen display available；
GOA circuit, for exporting scanning signal under the control of application processor；
Driving circuit, for the public voltage signal to be converted to common voltage driving signal, and by the scanning signal
Be converted to scanning drive signal；
Backlight assembly, for providing backlight, and under the control of application processor with the common voltage driving signal and institute
Scanning drive signal cooperation is stated to carry out split screen display available；
The split screen includes two split screens of main screen and vice screen；
Wherein, the GOA circuit of main screen includes:
The first transistor, grid input second clock signal, and source electrode is separately connected drain electrode and the tenth crystal of the 9th transistor
The drain electrode of pipe, the grid of drain electrode connection second transistor；
Second transistor, source electrode input second clock signal, the drain electrode of drain electrode connection third transistor；
Third transistor, source electrode input high level signal, grid input second clock signal；
4th transistor, grid input the first clock signal, and source electrode connects the drain electrode of the 5th transistor,
The drain electrode of drain electrode connection the first transistor；
5th transistor, grid connect the drain electrode of second transistor, source electrode input low level signal；
6th transistor, grid input low level signal, source electrode connect the drain electrode of the first transistor, drain electrode the 7th crystal of connection
The grid of pipe；
7th transistor, source electrode input the first clock signal, and the drain electrode of drain electrode the 8th transistor of connection simultaneously exports the same level GOA electricity
The scanning signal on road；
8th transistor, grid connect the drain electrode of second transistor, source electrode input low level signal；
9th transistor, grid input first control signal, and source electrode input is upwards every the scanning letter of level-one GOA module output
Number；
Tenth transistor, grid input second control signal, and source electrode input is downwards every the scanning letter of level-one GOA module output
Number；
11st transistor, grid and source electrode input the first reset signal, the drain electrode of drain electrode connection second transistor；
First capacitor, one end connect the grid of the 7th transistor, and the other end connects the drain electrode of the 7th transistor；
Second capacitor, one end connect the grid of the 8th transistor, and the other end connects the source electrode of the 8th transistor；
Tenth two-transistor, grid input the second reset signal, source electrode input low level signal, drain electrode the 8th transistor of connection
Grid；
13rd transistor, grid input the second reset signal, source electrode input high level signal, drain electrode the 8th transistor of connection
Drain electrode.
2. the apparatus according to claim 1, which is characterized in that the backlight assembly includes one-to-one with each split screen
Sub- backlight assembly.
3. a kind of display device, comprising:
Application processor, for providing the public voltage signal as data-signal to dark-state split screen part in split screen display available；
GOA circuit, for exporting scanning signal under the control of application processor；
Driving circuit, for the public voltage signal to be converted to common voltage driving signal, and by the scanning signal
Be converted to scanning drive signal；
Backlight assembly, for providing backlight, and under the control of application processor with the common voltage driving signal and institute
Scanning drive signal cooperation is stated to carry out split screen display available；
GOA circuit in split screen junction includes:
The first transistor, grid input second clock signal, and source electrode is separately connected drain electrode and the tenth crystal of the 9th transistor
The drain electrode of pipe, the grid of drain electrode connection second transistor；
Second transistor, source electrode input second clock signal, the drain electrode of drain electrode connection third transistor；
Third transistor, source electrode input high level signal, grid input second clock signal；
4th transistor, grid input the first clock signal, and source electrode connects the drain electrode of the 5th transistor,
The drain electrode of drain electrode connection the first transistor；
5th transistor, grid connect the drain electrode of second transistor, source electrode input low level signal；
6th transistor, grid input low level signal, source electrode connect the drain electrode of the first transistor, drain electrode the 7th crystal of connection
The grid of pipe；
7th transistor, source electrode input the first clock signal, and the drain electrode of drain electrode the 8th transistor of connection simultaneously exports the same level GOA electricity
The scanning signal on road；
8th transistor, grid connect the drain electrode of second transistor, source electrode input low level signal；
9th transistor, grid input first control signal, and source electrode input is upwards every the scanning letter of level-one GOA module output
Number；
Tenth transistor, grid input second control signal, and source electrode input is downwards every the scanning letter of level-one GOA module output
Number；
11st transistor, grid and source electrode input the first reset signal, the drain electrode of drain electrode connection second transistor；
First capacitor, one end connect the grid of the 7th transistor, and the other end connects the drain electrode of the 7th transistor；
Second capacitor, one end connect the grid of the 8th transistor, and the other end connects the source electrode of the 8th transistor；
14th transistor, grid input the first enabling signal, and source electrode input is believed every the scanning of level-one GOA circuit output upwards
Number, the source electrode of drain electrode the 9th transistor of connection, wherein first enabling signal is for closing the 14th transistor and opening the
The first order GOA circuit of split screen where 14 transistors.
4. device according to claim 3, which is characterized in that the split screen includes two split screens of main screen and vice screen.
5. device according to claim 3 or 4, which is characterized in that the backlight assembly includes a pair of with each split screen one
The sub- backlight assembly answered.
6. a kind of multi-screen display method of display device, the display device is display device of any of claims 1 or 2, institute
Stating multi-screen display method includes:
Application processor controls the public voltage signal provided to dark-state split screen part as data-signal；
The public voltage signal is converted to common voltage driving signal by driving circuit；
When split screen display available, to GOA circuit input the first reset signal and continue input high level the first clock signal so that
GOA circuit keeps output high level scanning signal；
Under the conditions of keeping exporting high level scanning signal, the common voltage driving signal is input to dark-state split screen.
7. a kind of display device multi-screen display method, the display device is the described in any item display dresses of claim 3~5
It sets, the multi-screen display method includes:
Application processor controls the public voltage signal provided to dark-state split screen part as data-signal；
The public voltage signal is converted to common voltage driving signal by driving circuit；
Dark-state split screen part is set to show black picture by the common voltage driving signal, wherein when split screen display available, different split screens
Partial first order GOA circuit is controlled by different enabling signals, and the 14th transistor of the GOA circuit of split screen junction is by first
Enabling signal control closes to limit the transmission of the enabling signal between dark-state split screen and non-dark-state split screen.
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| CN110211544A (en) * | 2018-04-13 | 2019-09-06 | 京东方科技集团股份有限公司 | Gate driving mould group, gate driving control method and display device |
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| JP3854905B2 (en) * | 2002-07-30 | 2006-12-06 | 株式会社 日立ディスプレイズ | Liquid crystal display |
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