CN106463340A - Resistive random-access memory with implanted and radiated channels - Google Patents

Resistive random-access memory with implanted and radiated channels Download PDF

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CN106463340A
CN106463340A CN201580027848.6A CN201580027848A CN106463340A CN 106463340 A CN106463340 A CN 106463340A CN 201580027848 A CN201580027848 A CN 201580027848A CN 106463340 A CN106463340 A CN 106463340A
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electrode
ion
switch region
memory device
layer
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王士原
王士平
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B63/00Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/80Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B63/00Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/80Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
    • H10B63/84Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B63/00Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/80Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
    • H10B63/84Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays
    • H10B63/845Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays the switching components being connected to a common vertical conductor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011Manufacture or treatment of multistable switching devices
    • H10N70/041Modification of the switching material, e.g. post-treatment, doping
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011Manufacture or treatment of multistable switching devices
    • H10N70/041Modification of the switching material, e.g. post-treatment, doping
    • H10N70/043Modification of the switching material, e.g. post-treatment, doping by implantation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20Multistable switching devices, e.g. memristors
    • H10N70/24Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/821Device geometry
    • H10N70/826Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/881Switching materials
    • H10N70/883Oxides or nitrides
    • H10N70/8833Binary metal oxides, e.g. TaOx

Abstract

Resistive RAM (RRAM) devices having increased uniformity and related manufacturing methods are described. Greater uniformity of performance across an entire chip that includes larger numbers of RRAM cells can be achieved by uniformly creating enhanced channels in the switching layers through the use of radiation damage. The radiation, according to various described embodiments, can be in the form of ions, electromagnetic photons, neutral particles, electrons, and ultrasound.

Description

There is the resistive random access memory of injection and radiation channel
The quoting of related application
Present patent application requires the priority of following patent application in allowed limits, and is merged in it by quoting Hold:
International patent application serial number PCT/US14/039990 that on May 29th, 2014 submits to;
The U.S.Provisional Serial 62/100,028 that on January 5th, 2015 submits to;
The U.S.Provisional Serial 62/112,159 submitted to on 2 4th, 2015;
The U.S.Provisional Serial 62/132,507 that on March 13rd, 2015 submits to;
The U.S.Provisional Serial 62/137,282 that on March 24th, 2015 submits to;
The U.S.Provisional Serial 62/144,328 that on April 7th, 2015 submits to;
The U.S.Provisional Serial 62/145,450 that on April 9th, 2015 submits to;
The U.S.Provisional Serial 62/151,394 that on April 22nd, 2015 submits to;
The U.S.Provisional Serial 62/171,209 that on June 4th, 2015 submits to;And
The U.S.Provisional Serial 62/172,110 that on June 7th, 2015 submits to.
In addition, present patent application is related to and is incorporated by reference into each of following application:
The U.S.Provisional Serial 61/828,667 that on May 29th, 2013 submits to;And
The U.S.Provisional Serial 61/859,764 that on July 29th, 2013 submits to.
Technical field
The present invention generally relates generally to resistive random access memory device.More particularly, some embodiments relate to And be formed with the case of not necessarily forming voltage strengthen charged species (species) mobility such as injection and/ Or the resistive random access memory of the path structure of passage of radiation.
Background technology
In the manufacture of resistive random access memory (RRAM, ReRAM or memristor) device, switching layer is (usually Transition metal oxide) it is located between top electrode and hearth electrode.Body switching layer is initially non-conductive.However, by across top electricity Pole and hearth electrode apply sufficiently large voltage (" formation voltage "), can form random conductive path in body switching layer.Logical The formation voltage of the quality of materials and thickness that are often dependant on switching layer can be equal to breakdown voltage, and can arrive several at several volts In the range of ten volts.Once formation conductive path, then can be by the suitable voltage (" switching voltage ") being applied to leading Power path is reset (disconnecting, cause high resistance) or setting (re-forming, cause relatively low resistance).Applied Plus electric field under the forming process of migration path of charged species and random nature large scale memory/meter that system is applied It is undesirable feature for calculating array.
Due to the path of charged ion/room under the applied electric field/electron institute experience be intended to random, so It is frequently observed significant change in the electric current of RRAM and voltage characteristic.This change includes change and the state of switching voltage The change of the resistivity of (high resistance state (HRS) and low resistance state (LRS)).Additionally, these changes generally show same In both the repeatability between different RRAM devices in the repeatability of RRAM device and same chip.Come from the angle of system See, these changes are very undesirable, since it is desired that developing algorithm and possible equipment to inquire each memory to be Single memory element dynamically determines its operating point.When consider billions of to several trillion memory components when, these change The performance of whole data storage and search process can be significantly reduced.
Theme required for protection is not limited to solve any concrete shortcoming or only in the environment of such as above-mentioned environment herein The embodiment of operation.More precisely, this background is being provided solely to illustrate wherein to put into practice some realities described herein Apply an exemplary technology area of mode.
Content of the invention
According to some embodiments,
Some in disclosed embodiment include a kind of resistive random access memory device, this resistor type random access Access storage arrangement includes:First electrode;Second electrode;And switch region, this switch region is in first electrode and second electrode Between, and include one or more Enhanced mobility type path structures, one or more Enhanced mobility type roads Corresponding position in switch region for the gauge structure extends, and is configured to provide the enhanced mobility of charged species and have There are the corresponding resistor changing with the switching voltage applying between the first electrode and the second electrode, wherein, described mobility Enhancement mode path structure includes the damage in switch region being caused by ion implanting, ion implanting include by switch region it It is deposited on the ion outside switch region afterwards.
In some embodiments, Enhanced mobility type path structure is formed by ion implanting, rather than by across opening Close area to apply to be formed equal to or more than the voltage of breakdown voltage.
In some embodiments, resistive memory device includes substrate, and wherein, first electrode is provided on substrate Side and the hearth electrode below switch region, and second electrode is provided in the top electrode above switch region.
In some embodiments, most of ion depositions used in ion implanting are below switch region.
In some embodiments, most of ion depositions used in ion implanting are below hearth electrode.
In some embodiments, at least some of the damage in switch region is the collision thing due to being caused by ion implanting Part causes, and most of collision accident occurs below switch region.
In some embodiments, the distribution wheel of ion (it is injected in described ion implanting) used in injection Main peak in exterior feature is below switch region.
In some embodiments, ion implanting causes substantial amounts of collision accident in the whole thickness of switch region.
In some embodiments, resistive memory device includes the barrier layer between switching layer and first electrode, This barrier layer is functionally ion implanted destruction.
In some embodiments, resistive memory device includes the barrier layer between switch region and second electrode, This barrier layer is functionally ion implanted destruction.
In some embodiments, ion implanting passes through first electrode and second electrode.
In some embodiments, second electrode is above switch region, and includes occurring the of ion implanting by it A part and the thickening subsequently forming.
In some embodiments, resistive memory device includes the underlying substrate with principal plane upper surface, wherein, The second planar interface between the first planar interface between first electrode and switch region and switch region and second electrode with underlying The principal plane upper surface of substrate is not parallel.
In some embodiments, the first planar interface and the second planar interface are approximately perpendicular to the principal plane of underlying substrate Upper surface.
In some embodiments, in ion implanting, the main edge of ion is perpendicular to the principal plane upper surface of underlying substrate Direction injection.
In some embodiments, resistive memory device includes the defect being caused by ion implanting in switch region, This defect is evenly distributed across the plane approximation perpendicular to the first planar interface and the second planar interface.
In some embodiments, the ion implanting mainly direction at an acute angle along the principal plane upper surface with underlying substrate.
In some embodiments, resistive memory device includes at least one of the following:I () is formed at switch region The barrier layer and first electrode between and functionally destroyed by described ion implanting, and (ii) be formed at switch region and The barrier layer between two electrodes and functionally destroyed by described ion implanting.
In some embodiments, switch region is formed by transition metal oxide material.
In some embodiments, the ion being injected is selected from:Ag、Ti、Ta、Hf、O、N、Au、Fe、Ni、Ti、Ta、V、 Pb, Bi, W, H, Ar, C, Si, B, P, Ga, As, Te, Al, Zn, In and Sn.
In some embodiments, switch region is formed in situ by described ion implanting.
In some embodiments, injection includes by O +ion implanted in switch region, and wherein, switch region is initially by one kind Or more kinds of transition metal material is formed.
In some embodiments, switch region has built-in stress, and ion implanting increases the stress in switch region, and And promote the establishment of described Enhanced mobility type path structure.
In some embodiments, switch region includes thick atom mass atoms and the mismatched material causing described built-in stress At least one of layer.
In some embodiments, the Enhanced mobility type path structure in switch region is noted by described ion at least in part Collision accident in entering is formed, and this collision accident is distributed substantially uniformly through in whole switch region.
Some embodiments include a kind of method manufacturing resistive random access memory device, and the method includes:Shape Become first electrode;Form switching layer;Formed second electrode so that switching layer between the first electrode and the second electrode;And enter Row ion implanting, being partly into and leaving switching layer in ion implanting intermediate ion, thus promote to be formed one or more Individual Enhanced mobility type path structure, one or more Enhanced mobility type path structures provide the enhancing of charged species Mobility so that between described first electrode and second electrode by the resistance of switching layer can by first electrode and Apply switching voltage between second electrode to increase and to reduce.
In some embodiments of the method, forming one or more Enhanced mobility type path structures is by ion Injection causes, rather than caused from the voltage applying the breakdown voltage equal to or more than switching layer to switching layer.
In some embodiments of the method, first electrode is in surface and the bottom below switching layer is electric Pole, and described second electrode is the top electrode above switching layer.
In some embodiments of the method, in ion implanting, most of ions of access switch layer leave switch Layer.
In some embodiments of the method, ion implanting causes collision accident, and most of collision accident occurs At the position below switching layer.
In some embodiments of the method, ion implanting functionally destroy be formed at switching layer and first electrode it Between barrier layer and be formed at least one of barrier layer between switching layer and second electrode.,
In some embodiments of the method, the first planar interface between first electrode and switching layer and switching layer with The second planar interface between second electrode is approximately perpendicular to the principal plane upper surface of underlying substrate.
In some embodiments of the method, the injection of ion is mainly in the principal plane upper surface perpendicular to underlying substrate Direction on.
In some embodiments of the method, the injection of ion functionally destroys and is formed at switching layer and first electrode Between barrier layer and be formed at least one of barrier layer between switching layer and second electrode.
Some embodiments are related to a kind of resistive random access memory device, and this resistive random access memory fills Put including:First electrode;Second electrode;And switch region, this switch region between the first electrode and the second electrode, and includes One or more Enhanced mobility type path structures, one or more Enhanced mobility type path structures are in switch region In corresponding position extend, and be configured to provide the enhanced mobility of charged species and have with being applied to the Switching voltage between one electrode and second electrode and change across one or more path structures corresponding resistors, its In, described Enhanced mobility type path structure includes basic in the switch region being caused by the electromagnetic radiation leading into switch region Upper uniform damage.
In some embodiments of said apparatus, electromagnetic radiation is included selected from following types of radiation:X-ray, gamma Ray, UV light, visible ray and IR light.
In some embodiments of said apparatus, electromagnetic radiation includes energy in the range of about 3KeV to about 100KeV Gamma ray or X-ray.
In some embodiments of said apparatus, electromagnetic radiation includes energy in the range of about 20KeV to about 30KeV X-ray.
In some embodiments of said apparatus, electromagnetic radiation includes energy in the range of about 25KeV to about 27KeV X-ray.
In some embodiments of said apparatus, damage is to pass through in first electrode and second electrode and switching layer at it The passage of at least one after caused in situ by radiation.
In some embodiments of said apparatus, this device be additionally included in electromagnetic radiation before in described second electrode Multiple switch layer and electrode that side is formed in stacked form.
In some embodiments of said apparatus, damage shape at least three switching layers by electromagnetic radiation simultaneously Become.
In some embodiments of said apparatus, this device also includes being formed at the radiation blocking below first electrode Layer, this radiant barrier is configured to protect region below described barrier layer from exposure to electromagnetic radiation.
In some embodiments of said apparatus, radiant barrier is by the material system in W, Ta, Bi, Au and Pb Become.
In some embodiments of said apparatus, this device includes at least one of the following:I () is formed at switch region The barrier layer and first electrode between and functionally destroyed by described electromagnetic radiation, and (ii) be formed at switch region and The barrier layer between two electrodes and functionally destroyed by described electromagnetic radiation.
In some embodiments of said apparatus, this device includes the underlying substrate with major planar surface, wherein, the The second planar interface near normal between the first planar interface between one electrode and switch region and switch region and second electrode Principal plane upper surface in underlying substrate.
Some embodiments are related to a kind of method manufacturing resistive random access memory device, and the method includes:Shape Become first electrode;Form switch region;Form second electrode so that switch region is located between first electrode and second electrode;And By being directed into damaging switch region in switch region energy, thus promoting to form one or more Enhanced mobility type paths Structure, the path structures of one or more Enhanced mobility provide the enhanced mobility of charged species so that described Between first electrode and second electrode can be by applying between the first electrode and the second electrode by the resistance of switching layer Switching voltage is increasing and to reduce.
In some embodiments of said method, damage and cause collision accident, and most of collision accident occurs At position in addition to switch region.
In some embodiments of said apparatus, the energy being guided is ion, electronics, X-ray, gamma ray, bag Include one of light and ultrasonic wave of UV and IR light or more kinds of forms.
In some embodiments of said apparatus, the energy being guided passes through at least a portion and second of first electrode At least a portion of electrode.
In some embodiments of said apparatus, the energy being guided functionally destroys and is formed at switch region and first Barrier layer between electrode and be formed at least one of barrier layer between switch region and second electrode.
Some embodiments are related to a kind of resistive random access memory device, and this resistive random access memory fills Put including:First electrode;Second electrode;Switch region, this switch region between the first electrode and the second electrode, and includes multiple Enhanced mobility type path structure, corresponding position in switch region for the plurality of Enhanced mobility type path structure extends, And be configured to provide the enhanced mobility of charged species and have be applied to first electrode and second electrode it Between switching voltage and the corresponding resistor across path structure that changes, wherein, described Enhanced mobility type path structure include by It is launched into, pass through and extend beyond damage in the switch region that the energy being guided of switch region causes.
In some embodiments of said apparatus, Enhanced mobility type path structure includes being penetrated by for ion, electronics, X The energy of one of line, gamma ray, the light including UV and IR light and ultrasonic wave or more kinds of guiding of form causes Switch region in damage.
In some embodiments of said apparatus, Enhanced mobility type path structure include by access switch area from Damage in the switch region that son injection causes.
In some embodiments of said apparatus, Enhanced mobility type path structure is included by for X-ray, gamma ray Damage in the switch region causing with the energy of the guiding of at least one form in electronics.
In some embodiments of said apparatus, Enhanced mobility type path structure is included by longer than X-ray for having The switch region that causes of energy of the guiding of the form of the radiation of wavelength in damage.
Some embodiments are related to a kind of resistive random access memory device, and this resistive random access memory fills Put including:First electrode;Second electrode;And switch region, this switch region between the first electrode and the second electrode, and includes One or more Enhanced mobility type path structures, one or more Enhanced mobility type path structures are in switch region In corresponding position extend, and be configured to provide the enhanced mobility of charged species and have with being applied to the Switching voltage between one electrode and second electrode and change across one or more path structures corresponding resistors, its In, Enhanced mobility type path structure include by the energy being directed in switch region about 3KeV to about 100KeV scope Substantially uniform damage in the switch region that interior electromagnetic radiation causes.
Some embodiments are related to a kind of resistive random access memory device, and this resistive random access memory fills Put including:The stacked body of first electrode;The stacked body of second electrode;And the stacked body of switch region, each of switch region Between one of first electrode in corresponding pairs and one of second electrode, wherein, each of switch region includes one Or more Enhanced mobility type path structures, one or more Enhanced mobility type path structures are configured to supply The enhanced mobility of charged species and there is the corresponding resistor across path structure that changes with the switching voltage applying, And wherein, described Enhanced mobility type path structure includes by injecting and by the switch in the stacked body of switch region simultaneously Damage in the switch region that the energy of the guiding in area causes.
In some embodiments of said apparatus, damaged by the form for ion implanting by what the energy guiding caused The energy of guiding causes.
In some embodiments of said apparatus, damaged by for 1KeV's to 100KeV by what the energy guiding caused The energy of the guiding of the form of the radiation in energy range causes.
In some embodiments of said apparatus, the stacked body of switch region includes 2 to 20 switch regions.
Some embodiments of said apparatus include the array of spaced stacked body, and each stacked body includes first Electrode and second electrode and switch region, wherein, spaced stacked body passes through wire interconnection and forms integrated storage Device structure.
Brief description
In order to be further elucidated with the above and other advantages and features of the theme of patent specification, shown in the drawings The specific example of embodiments thereof.It should be appreciated that these accompanying drawings depict only illustrated embodiment, and therefore should not be recognized For being the restriction to patent specification or scope of the following claims.Illustrate that the accompanying drawing of device is not drawn to, and Illustrated with straight line surfaces and interface, it is not linear or plane in actual device.By by using accompanying drawing with additional Characteristic and details describing and explaining the theme of patent specification, in the accompanying drawings:
Fig. 1 be illustrate the resistive random access memory RRAM device according to some embodiments essential part cut Face figure;
Fig. 2 is the sectional view illustrating the path according to the injection ion in the RRAM device of some embodiments;
Fig. 3 is to illustrate how can be used for the selective area in RRAM device according to the focused ion bundle of some embodiments The figure of domain ion implanting (SAII);
Fig. 4 is to illustrate to be noted for the blanket type ion that RRAM device is combined with injecting mask according to some embodiments The figure entering;
Fig. 5 is to illustrate do not having any mask to limit the feelings of the selection area for injection according to some embodiments The figure of the essential part of RRAM device under blanket type ion implanting under condition;
Fig. 6 is to illustrate the storage arrangement carrying out multiple ion implanting by injecting mask according to some embodiments Figure;
Fig. 7 is to illustrate having of the injecting mask having for selective area ion implanting according to some embodiments The figure of the resistive memory device of crystal and/or almost crystal and/or polycrystalline switching layer;
Fig. 8 is the figure illustrating the cross bar resistive memory structure according to some embodiments;
Fig. 9 is the figure of the RRAM device illustrating the stacking with ion implanting path according to some embodiments;
Figure 10 is the figure of the establishment of the mesh network in the expression damage path according to some embodiments;
Figure 11 is the figure of the conductive channel illustrating to be formed in the mesh network damaging according to some embodiments;
Figure 12 is the figure illustrating the switching layer including multiple layers according to some embodiments;
Figure 13 is the figure illustrating the diode layer being formed at after injection it on switching layer according to some embodiments;
Figure 14 be illustrate according to some embodiments occur on the RRAM device completing have a mind to damaging injection or The figure of radiation;
Figure 15 A and Figure 15 B is the ion implanting of the device of the stacking illustrating the greater number according to some embodiments Figure;
Figure 16 is the switching layer being incorporated to the thick atom mass atoms creating material stress illustrating according to some embodiments Figure;
Figure 17 is the figure of the stress defect illustrating to be caused by mismatched material layer according to some embodiments;
Figure 18 A and Figure 18 B is to illustrate to stand ion note according to the switching layer with built-in stress that makes of some embodiments The figure entering and/or radiating.
Figure 19 is to illustrate the flow chart for the basic process frame of basic RRAM according to some embodiments;
Figure 20 A and Figure 20 B be illustrate according to some embodiments for RRAM device ion implantation doping to depth The schematic diagram of distribution;
Figure 21 A and Figure 21 B is the figure illustrating to be formed in situ by ion implanting switching layer according to some embodiments;
Figure 22 A and Figure 22 B is the figure of another example being formed in situ illustrating the switching layer according to some embodiments;
Figure 23 A and Figure 23 B is to illustrate being formed in situ of the switching layer combining according to some embodiments with non-switch layer Figure;
Figure 24 is the figure of the ion implanting illustrating the phase-changing storage device according to some embodiments;
Figure 25 A and Figure 25 B is to illustrate according to some embodiments for producing the intense ultrasonic wave of defect in switching layer And/or the figure of heat;
Figure 26 is to illustrate to be created in switch Rotating fields using ion implanting or other radiation according to some embodiments The path of defect or passage figure;
Figure 27 is the figure illustrating forming process well known in the prior art;
Figure 28 is the variable figure illustrating the switch parameter according to known RRAM forming process;
Figure 29 A and Figure 29 B is the figure of the aspect illustrating that the RRAM according to some embodiments is processed;
Figure 30 A and Figure 30 B is to illustrate that the formation according to some embodiments subsequently forms relatively for the thin TE of ion implanting The figure of thick TE;
Figure 31 A and Figure 31 B is to illustrate there is, according to some embodiments, the top being made up of the combination of metal and semiconductor The figure of the RRAM structure of electrode and hearth electrode;
Figure 32 is to illustrate the flow chart for the process frame of basic RRAM according to some embodiments;
Figure 33 A to Figure 33 D is the figure of the analog result illustrating the Hf ion according to known technology injection;
Figure 34 is the figure of the relative thickness of the example illustrating the simple R RAM structure according to some embodiments;
Figure 35 A to Figure 35 D is to illustrate to be injected into structure as shown in figure 34 under 600KeV according to some embodiments In the analog result of Ar ion figure;
Figure 36 A to Figure 36 D is to illustrate to be injected into structure as shown in figure 34 under 800KeV according to some embodiments In the analog result of Ar ion figure;
Figure 37 A to Figure 37 D is to illustrate to be injected into structure as shown in figure 34 under 1600KeV according to some embodiments In or under 533KeV triple ionization and accelerate the analog results of Xe ion figure;
Figure 38 A to Figure 38 D is to illustrate to be injected into example as shown in figure 34 under 3200KeV according to some embodiments The figure of the analog result of Bi ion in property structure;
Figure 39 is X-ray linear absorption coefficient in the silicon of the energy between illustrating for 1KeV and 100KeV (with cm-1For Unit) relation and x-ray photon energy (in units of KeV) between log-log plot.According to some embodiments, show Go out and promoted RRAM to manufacture using high dose electromagnetic radiation (such as X-ray);
Figure 40 is the RRAM knot with vertical with substrate or almost vertical switching layer illustrating according to some embodiments The figure in the simple section of structure;
Figure 41 is the figure in the section illustrating the RRAM structure according to some embodiments, wherein ion implanting or other radiation It is performed as vertical or be approximately perpendicular to substrate;
Figure 42 is the RRAM structure illustrating the stacking with two or more stacked bodies according to some embodiments Figure, the wherein plane of switching layer be vertical and/or surface that be approximately perpendicular to substrate;
Figure 43 is the basic simplification with vertical and/or almost vertical switching layer illustrating according to some embodiments The schematic diagram in the section of the example of RRAM structure, wherein ion implanting and/or radiation are along edge access switch layer;
Figure 44 is the figure illustrating the simple R RAM structure according to some embodiments, and wherein switching layer includes ZnO nanorod;
Figure 45 is the figure of the sandwich construction illustrating the RRAM device according to some embodiments;
Figure 46 A to Figure 46 H is to illustrate to be injected into knot as shown in figure 45 under various energy according to some embodiments The figure of the analog result of the Ar ion in structure and H ion;
Figure 47 A to Figure 47 B is to illustrate to be injected into structure as shown in figure 45 under 800KeV according to some embodiments In the analog result of Ar ion enlarged drawing;
Figure 48 A to Figure 48 C is to illustrate to be injected into structure as shown in figure 45 under 1600KeV according to some embodiments In the analog result of Ar ion enlarged drawing;
Figure 49 A to Figure 49 C be illustrate according to some embodiments under 200KeV by H ion implanting to as shown in figure 45 Structure in analog result enlarged drawing;
Figure 50 is the figure of the sandwich construction illustrating the RRAM device according to some embodiments;
Figure 51 A to Figure 51 E is to illustrate to be injected into structure as shown in figure 50 under 600KeV according to some embodiments In the analog result of Ar ion figure;
Figure 52 A to Figure 52 E is to illustrate to be injected into structure as shown in figure 50 under 800KeV according to some embodiments In the analog result of Ar ion figure;
Figure 53 is the figure of the structure of RRAM device illustrating the vertical stacking according to some embodiments;
Figure 54 is the RRAM device of the vertical stacking illustrating to be simplified for the purpose simulated according to some embodiments Structure figure;
Figure 55 A to Figure 55 B is to illustrate to be injected into structure as shown in figure 50 under 17.5MeV according to some embodiments In the analog result of Ar ion figure;
Figure 56 A to Figure 56 B is to illustrate to be injected into structure as shown in figure 50 under 540MeV according to some embodiments In the analog result of H ion figure;
Figure 57 is the RRAM illustrating the vertical stacking simplifying for the purpose simulated according to some other embodiments The figure of the structure of device;
Figure 58 A to Figure 58 D is to illustrate being injected into as Figure 57 under 17MeV and 520KeV respectively according to some embodiments The figure of the analog result of the Ar ion in shown structure and H ion;
Figure 59 is to illustrate for studying the vacancy concentration in switching layer according to the top electrode thickness causing due to foozle The figure of the structure of RRAM device of susceptibility of change;
Figure 60 A to Figure 60 C is to illustrate to be injected into tool as shown in figure 50 under 171600KeV according to some embodiments There is the figure of the analog result of Ar ion in the structure of top electrode 5940 of thickness of 80nm, 100nm and 120nm;
Figure 61 A and Figure 61 B shows the contraction in the filament of room;
Figure 62 A is the equally distributed figure illustrating the switch in the layer room according to many embodiments described herein;
Figure 62 B is the figure being shown in the room distribution being obtained before forming top electrode by known ion implantation technique;
Figure 63 A to Figure 63 D is to illustrate according to some embodiments for manufacturing the process of a part for RRAM device Simplify the figure of sequence;
Figure 64 A to Figure 64 B is to illustrate to be struck in SL layer by ion implanting by TE layer according to some embodiments The figure of ion;
Figure 65 A to Figure 65 B be illustrate according to some embodiments strike have the diode of deposition, semiconductor and/ Or the figure of the ion in the SL layer of tunnel layer;
Figure 66 A to Figure 66 B be illustrate according to some embodiments strike have the diode of deposition, semiconductor and/ Or the figure of the ion in the SL layer of tunnel layer and TE;And
Figure 67 is the simplified flowchart of the process injected by TE according to some embodiments.
Specific embodiment
The detailed description of the example of preferred embodiment is provided below.Notwithstanding some embodiments, but should Understand, the new theme described in patent specification is not limited to any one embodiment described herein or embodiment Combination, but include many replacements, modification and equivalents.Although in addition, elaborating many details in the following description To provide thorough understanding, but some embodiment party can be put into practice in the case of some or all in without these details Formula.Additionally, for the sake of clarity, it is not described in known some technologic materials in correlation technique, to avoid unnecessarily Obscure new theme as herein described.It should be understood that each of one or several specific embodiments as herein described is special Levy and can be applied in combination with feature or other described embodiments.Additionally, identical reference and mark in each accompanying drawing Know instruction identical element.
According to some embodiments, provide ion/sky for resistive random access memory, memristor and phase transition storage The passage (electronics and hole path) of position Enhanced mobility is for the conductive path of more determination, rather than forms electricity by apply Pressure obtains the more random conductive path causing.
According to some embodiments, provide one or more paths for forming filament and/or ion motion and defect Jump.According to some embodiments, ion is accelerated and is injected in switching layer and passes through switching layer.
Discuss the example of known memristor device in the following:US2008/0090337A1 (clips the top of multi-layer switcher layer Electrode and hearth electrode and cross bar array memory structure);(two-terminal resistance-type memory fills US2004/0160812A1 Put);US2008/0185572A1 (memristor or resistive random access memory (RRAM) two ends sub-device and cross bar structure); And US2008/0296550A1 (using the cross bar structure of the multiple-level stack of two-terminal RRAM).Memristor memory and RRAM are Similar.In known technology, the initiation of filament depend on using relatively high voltage (being significantly higher than operating voltage) with The forming process causing " puncturing " in switching layer and/or creating defect path.This formation voltage asymptotic breakdown voltage and taking Certainly in switching layer thickness and quality.Generally, the breakdown electric field of oxide is 5 × 106V/cm and 8 × 106Scope between V/cm Interior.After formation, in memristor/RRAM device, high resistance state (HRS) and low resistance state are then observed (LRS).In some cases, memristor/RRAM many HRS and LRS state is possible, and wherein IV (Current Voltage) characteristic is high Degree is nonlinear and/or there are multiple bistable states.The certain situation of HRS/LRS is observed in the case of there is no forming process Under, it is understood that there may be defect path, wherein such as ion, room (also referred to as grain kind (species)) can cross and be used for being formed The filament of switching characteristic;However, seldom observing these situations and can not reproducing, this is unfavorable for that high-volume manufactures.Additionally, During same process runs, some storage arrangements may need forming process, and some may not be needed.
In order to eliminate not reproducible and thus increase uniformity, according to some embodiments, introducing path is for shape Become filament and/or ion/room/point defect diffusion/drift/jump so that need not rely on using high-tension forming process.Road Footpath or passage are formed by ion implanting, wherein accelerate ion such as Au, Pt, Pb, Fe, Bi, U, Ar, O, N, Si, B, P, H, Ti, Ta, C, Zr, Zn, Ga, In, Se cause through switching layer and cause defect in crystal or noncrystal switching layer, including crystal defect Such as room, interstitial defect, point defect and lattice defect.Additionally, ion can be injected in switching layer with formed such as Au, The conductive channel of the ion of Pt, C, Bi, Zr, In, Ga etc. and/or to crystal or microcrystal (in the case of amorphous switching layer) Damage to form crystal defect, it can also contribute to forming the filament obtaining HRS and LRS storage arrangement.
The advantage of ion implanting includes as follows:It is the process that can manufacture;And it produces almost one-dimensional defect path, This path is about the beeline between top electrode and hearth electrode.(term top and bottom is to use for convenience's sake, and And it should be understood that the side in any orientation and opposite side).Approximately conllinear single or multiple paths can be generated, with Apply electric field together, can spread, drift about, jumps to form " filament " in ion and room, should " filament " present represent HRS with The bistable state of LRS and/or multiple HRS and LRS and/or multistable.Filament can be single line shape or multiple path leads to backbone Or main line is tree-shaped.Therefore, single or multiple filaments can be substantially one-dimensional and/or three-dimensional.
Known RRAM uses forming process, and it depends on will be suitable with breakdown voltage and/or than operating voltage about Ten times of the voltage that formed is applied to switching layer and/or the impurity in switching layer and the interface of electrode.Form electricity using such It is necessary that pressure assumes bistable state and/or multistable HRS and LRS state for known RRAM device.According to some embodiment party Formula, can avoid applying high formation voltage.Alternatively, can apply can be higher than the startup voltage of operating voltage, to open Dynamic bistable state and/or multistable HRS and LRS state.In some instances, starting voltage can be than the operation less than breakdown voltage Voltage is high tens volts to several volts.Silica has 6 × 106The breakdown electric field of V/cm, and hafnium oxide has about 5 × 106V/ The breakdown electric field of cm.Therefore, for the HfOx switching layer that 10nm is thick, breakdown voltage is 5V;For the HfOx switching layer that 40nm is thick, Breakdown voltage is 20V.In addition, according to some embodiment there is provided having the RRAM device of the uniformity characteristics significantly improving, This is very desired for large scale memory/calculating application.According to some embodiments, opening by using radiation injury Close in layer and equably create enhanced passage, it is possible to achieve higher uniformity performance on whole RRAM chip.According to various institutes The embodiment of description, radiation can be the form of ion, electromagnetic photons, neutral particle, electronics and ultrasonic wave.
Fig. 1 be illustrate the resistive random access memory RRAM device according to some embodiments essential part cut Face figure.RRAM device 100 includes top electrode (TE) 140, switching layer 130 and hearth electrode (BE) 120.Ion beam 150 can be used Ion implanting create crystal defect path, ion beam 150 has the total penetrating RRAM 100 and at least some stops Stay the energy of substrate 100.Ion beam 150 create defect include room, gap, point defect, line defect, planar defect, Frenkel defect, antistructure defect, impurity, amorphous, topological defect, dislocation, F- center etc..These crystal defects create permissible Contribute to the channel path that ion/electronics and/or room are easier migration under electric field bias.Used in bundle 150, ion can To include one of Au, Pb, U, Er, Yt, Zn, O, Pt, Fe, Bi, H, He, Ga, Hf, N, C, V, Ti, Ta or more kinds of.
Fig. 2 is the sectional view illustrating the path according to the injection ion in the RRAM device of some embodiments.Inject from The path 250 of son creates crystal defect in crystal and/or noncrystal switching layer 130.This defect can be room, point defect And/or interstitial defect.Depending on accelerating potential, the ion of acceleration is infused at certain depth with specific spatial distribution or note Enter to certain depth.It is to produce the crystal defect in the path for ion/room movement to produce purpose, can be by ion It is injected in switching layer 130, electrode 140 and one or more of 120 and substrate 110.In order in produced defect Minimum space extension (as being for example, one-dimensional as possible), the injection ion shown in Fig. 2 is injected into so that it rests on substrate In 110 region 252.Acceleration ion in ion implanting will scatter when with material impacts, and spatially there will be scattered Penetrate the distribution of ion.However, being based on accelerating potential, ion will be propagated generally in its trajectory path, rest on when accelerating ion There is maximum scattering when in material.Dosage is another factor that can determine scattering.Depending on injection depth, dosage can be 1.0×106/cm2To 1.0 × 1016/cm2In the range of or higher, this depends on acceleration energy, mass of ion and the material being injected into The quality of material.Therefore, dosage, accelerating potential, the quality of ion, target material are realizing suitable defect path/passage and help Formed in suitable filament and all should be considered.Acceleration energy can be in the scope less than 1Kev (kilo electron volt) to 3200KeV Interior or bigger, this depends on the depth of injection and the quality of ion and target density.In crystalline material (for example, Au ion can be Al2O3) in the ion of the acceleration energy injection of every nm (nanometer) depth of about 4.8 kilo electron volts (KeV).Referring to Kinoshita Et al., Japanese Journal of Applied Physics 50 (2011) 01BE01, Structural and Magnetic Properties of Fe and Au Ion-Implanted Al2O3Single Crystals, by quoting It is expressly incorporated herein.For example, for the typical RRAM/ memristor structure of 4nm to 20nm switching layer thickness, about 20 to 100KeV adds The ion that fast energy is used for such as Au (for example, only needs about 0.4 of the acceleration energy for Au again to realize identical for Fe Depth), to completely penetrate through the switching layer of the top electrode with several nanometers.1 × 10 is more than under 50KeV for Au14Ion/ cm2Dosage will obtain causing about 1 × 1020Au ion/cm3Au concentration.For application-specific, can be with regulating dosage to realize Optium concentration for the defect of expectation IV characteristic.For example, up to 5 × 1016Ion/cm2Or higher dosage is to create very The region of the defect of high concentration, thus obtain causing extremely low switching voltage.Using less defect density (for example Au from Under the relatively low implantation dosage of son), switching voltage can be higher.
Fig. 3 is the selectivity how being used for focused ion bundle in RRAM device illustrating according to some embodiments The figure of region ion implanting (SAII).In this example, focused ion bundle 350 is used for forming narrow defect road in switching layer 130 Footpath/passage 354.Note, for example, switching layer 130 can be crystal, or it can be non-crystal such as amorphous, but Still there is microstructure.Defect path/passage 354 promotes the movement of such as ion, room and/or point defect not make Formed in the case of forming voltage with height and can obtain causing the filament of the uniform switching characteristic of RRAM.Ion beam can penetrate TE 140 access switch layers 130 simultaneously enter BE 120 and enter substrate 110.
Fig. 4 is to illustrate to be noted for the blanket type ion that RRAM device is combined with injecting mask according to some embodiments The figure entering.Blanket type ion implanting is generally easily manufactured than using focused ion bundle.Injecting mask 410 can be such as Au, Polymer, SiOx.Generally, thickness be enough to contain that any material of great majority injection ion is all suitable.Generally, dense material (high atomic number, such as Au) will need thinner layer compared with unsound material (low atomic number) to stop great majority note The ion entering.Opening 412 in mask 410 allows ion to be passed through according to acceleration energy and is injected into the expectation of RRAM device 100 In region.Give the acceleration energy of ion or energy is given by E=ZeV, wherein E is to confer to energy or the acceleration energy of ion, Z It is ionic charge number (single, double, triple ionizes again), e is electron charge, and V is accelerating potential.The amount of the ion of injection is agent Amount.In the diagram, in substrate 110, wherein their path passes through top electrode 140 and switching layer 130 and produces scarce ion implanting Fall into 454.Defect contributes to the diffusion/jump/drift in ion and room when forming filament so that switch can equably be sent out Raw, and do not use formation voltage.The randomness of this pre-existing formation decreasing filament of defect path/passage, otherwise To need to form voltage or breakdown voltage.
Fig. 5 is to illustrate do not having the feelings of any mask limiting the selection area for injection according to some embodiments The figure of the essential part of RRAM device under blanket type ion implanting under condition.Almost parallel path/passage is created, and this draws Rise and cause more uniformly formation filament, and do not rely on for being initially formed filament and/or setting up switching current-voltage (IV) spy The formation voltage of property.As shown in figure 5, for example, ion is injected in the region 552 of substrate 110.For example, including RRAM dress Put any layer of interior part of (TE, switching layer, BE, substrate) or to be fully injected into ion also possible.Note, according to some enforcements Mode, ion beam 550 can perpendicular to the surface of top electrode 140 or its can be angled.
Fig. 6 is the storage arrangement illustrating to carry out by injecting mask multiple ion implanting according to some embodiments Figure.According to some embodiments, it is possible to use be not injected into the blanket type injection of mask 410.Ion is injected into substrate 110 Region 652 in, to create defect in the crystal of switching layer 130, noncrystal or amorphous (crystallite and/or nanocrystal) structure Path.Defect path in layer 130 contributes to assuming uniform switch spy in formation in the case of not applying to form voltage Property filament, moving iron, room under the electric field that applied of multiple filament and/or filamentary structure, oxidation and reducing.Process is still So can be used for starting memory characteristics, but difference is that in the formation voltage than known resistive memory device Under much smaller voltage.According to some embodiments, the injection process for creating defect path in switching layer can include The multiple injection of different ions.The example of different ions includes Au, Pt, Pb, H, O, N, C, Ar, Ti, Ta, Ga and In.According to one The ion implanting agent of O, N, Ti, Ta can be partly or entirely injected into (such as region 654 in switching layer 130 by a little embodiments In), to provide for the ion in TiOx switching layer resistive memory device breaker in middle/oxidation and reduction.Scarce for producing Fall into and for injecting ion to help the order of the injection of switching process can exchange.Ion implanting can pass through top electrode 140 And enter switching layer 130 and enter hearth electrode 120 and to substrate 110.
Fig. 7 is to illustrate to be realized by the injecting mask for selective area ion implanting according to some embodiments There is the figure of crystal and/or the almost resistive memory device of crystal and/or polycrystalline switching layer.The ion of energy enough passes through This structure is injected and is injected in substrate 110 and/or hearth electrode 120 with enough dosage, to produce major part perpendicular to table The defect path in face.Due to damage is caused through crystal and/or the almost switching layer 730 of crystal by the ion of injection Wound, so the defect path obtaining is considered amorphous.In some cases, this is favourable, and reason is:In layer Under the electric field applying in 730 affected area 754 rather than in intact region, ion/room/point defect/defect/oxidation-also Former and electrochemical process can more easily redox/drift/diffusion/jump, (it is crystal/polycrystalline and/or almost crystal Or region) intact region is stoichiometric and affected area is added or without the injection ion participating in filament process, O, H, Ti in e.g., less than stoichiometric TiOx switching layer.For example, crystal switch layer 730 can be TiO2It is stoichiometric, And it is non-stoichiometric TiOx with or without the implant damage region 754 of O or Ti ion.Non-stoichiometry region 754 bistable state/multistable the formation that can promote filament and HRS and LRS.
Additionally, stoichiometric region can be less prone to the dielectric breakdown at the high field area of generation at electrode edge, This improves the reliability of RRAM.Switch activity will be far from edge and mainly causes defect and crystal to damage in ion implanting ion The region of wound (for example, the fracture in lattice, room, point defect, gap etc.) occurs.
Fig. 8 is the figure illustrating the cross bar resistive memory structure according to some embodiments.Horizontally and vertically electrode Each cross bar point represent resistive memory device.According to some embodiments, manufacture cross bar memory construction 800, And ion implanting and/or radiation can be not injected into mask blanket type injection and/or its can have for selectivity Region ion implanting and/or the injecting mask of radiation.Furthermore, it is possible to only form injection switching layer at BE and TE.If BE is Ti, then O ion can partly be injected in BE to form such as TiOx switching layer.TiN can be BE, and Hf and O is permissible Partly it is injected into form HfOx in TiN, wherein top electrode can be Mo, Pt, Au, Ti etc..Additionally, BE can for example be led to Cross TiN the and Hf oxide that ald (ALD) grows, be the top electrode of Mo afterwards.Region at the edge away from device What the selective area ion implanting (because electrode edge causes High-Field to concentrate) at place can increase resistive memory device can By property.Using the selective area ion implanting with injecting mask, away from device edge region can be injected with for Path/passage and injection such as O, H, Hf, Ti ion that filament is formed.Described injection contribute under an applied electric field via The defect skip in such as room and/or drift are forming filament, and contribute to oxidation-reduction process.Room can also be non- Formed in transition metal oxide material, such as N, C, the F in SiNx, SiCx, fluoride, based on following material:Such as nitrogen Compound TiN, AlN, SiN, such as carbide SiC, WC, NbC, TiC, such as fluoride CaFx, MgFx, WFx, or other oxidations Thing or the nitride such as enumerated, fluoride, any combination of the oxide of carbide.
Fig. 9 is the figure of the RRAM device illustrating the stacking with ion implanting path according to some embodiments.Stacking Apparatus structure 900 can for example be realized using cross bar resistive memory device.Selective area ion implanting or non- Selective area ion implanting can be simply by increasing the acceleration energy of ion to be implanted being penetrated into desired depth Use, for example as illustrated, defect outlet openings 954 by be injected into substrate 110, penetrate switching layer 930 and 130 ion produce Raw.Note, by adjusting acceleration energy, the ion of injection can also penetrate more than two switching layer.Typical commercial ion note Enter equipment to accelerate under 600 kilovolts (KV), and by using higher ionization number, such as dual ionization or triple ionization Ion, the acceleration energy of ion can double or triplication.By adjusting acceleration energy, can be in RRAM#1 (by TE 940th, SL 930 and BE 920 makes) and RRAM#2 (being made up of TE 140, SL 130 and BE 120) in completely and/or partly Injection ion.Substitutional ion injection can also be carried out using radiation or be used together with ion implanting.
Because ion implanting is substantially statistical distribution, therefore ion divides in the depth and width in target material Cloth.The peak Distribution of the ion of injection can for example in a substrate, and still have for example in switching layer and in TE and BE There is the ion that some are at random.
Note, after conventional ion injecting program, generally execution high annealing is drawn due to ion implantation process with removing Rise crystal defect and damage (referring to, Ion implantation of semiconductors, J.S.Williams, Materials Science and Engineering A253(1998)8-15).However, according to some embodiments it is desirable to To promote the electrochemical migration in ion and room under the applied electric field, this can cause LRS and HRS to such defect.Should Note, as it is used herein, term " crystal " can also include " stoichiometric " so that anywhere mentioning crystal region Domain, it can refer to stoichiometric region.
During ion implanting, damage being ordered into or can not be orderly.This is for damage crystal, amorphous Any other method (such as H+implantation, electron beam, any particle beams, the x of body, stoichiometry and/or non-stoichiometry material Ray, gamma ray, light beam etc.) it is also such.For example, in Fig. 1 to Fig. 7 and Fig. 9, for simplicity, damage path to show Meaning property is shown as straight line.In practice, damaging can be the network of intersecting damage field.
Figure 10 is the figure of the establishment of the mesh network in the expression damage path according to some embodiments.Injection particle with The collision of the material that particle is injected can create the fine and close mesh network of intersecting paths as depicted.Particle or energy are permissible Be ion, proton, electronics, X-ray, gamma ray, from deep ultraviolet (UV) to the light of infrared (IR) etc..Switching layer can be by being used for Switch and for non-linear multiple layers of conductive composition, for example, diode and for optimize memory and/or logical operation its His resistive layer and semiconductor layer.Even if damaging is grid, it can be found that switch in the layer shortest path is to form the filament of filament Conductive channel or the passage of filament formation, thus eliminate the necessity of the also referred to as forming process of breakdown process.Such shape Usually more than 5 volts to 20 volts of one-tenth/breakdown process, and 30 volts or bigger can be reached depending on the thickness of switching layer. The breakdown electric field of oxide is usually 5 × 106V/cm to 6 × 106V/cm.Breakdown voltage also depends on the quality of oxide.Have The oxide of the defect of higher concentration and/or crystal grain significantly reduces thickness than high quality oxide, therefore has relatively low hitting Wear voltage.Due to always can electricity and/or electrochemically find shortest path, therefore IV characteristic has small change.
Figure 11 is the figure of the conductive channel illustrating to be formed in the mesh network damaging according to some embodiments.As figure Shown, conductive channel 1154 can be formed along the damage field that may not be complete straight line along short path.However, this is that have Meaning is damaged rather than breakdown process, such as the forming process in known RRAM design.Volume due to having a mind to damage is fine and close Mesh network, therefore can be approximated to be straight line by the shortest path of switching layer, and as shown in path 1154, path 1154 is substantially Connect the path of the shortest or approximate beeline shown in dotted line.Such as oxonium ion, room, electronics are (for transiting metal oxidation Thing switching layer, is other grain kinds, such as nitride for other kinds of switching layer, carbide is also suitable) the getting over of grain kind Time is the shortest, because the path passing through switching layer is the shortest.Therefore, the RRAM ratio damaging intentionally depends on to cause and is formed Faster, forming process causes conductive path that may be short unlike the path having a mind to damage and/or damage to the known RRAM device of process Hinder path.
Figure 12 is the figure illustrating the switching layer including multiple layers according to some embodiments.Switching layer 130 can include Can be multiple layers of stoichiometric and/or non-stoichiometric, crystal, noncrystal and/or microcrystal.Switching layer 130 is also The layer being not involved in switching can be included.For example, for transition metal oxide switching layer, non-switch layer can include nitride Layer, semiconductor layer (such as non-crystalline silicon), carbide lamella, chloride layer and fluoride layer etc..These layers can be injected into first with Create the damage having a mind to so that conductive channel can be formed along shortest path in the case of there is no breakdown voltage.Such as oxygen Ion, nitrogen, H, Ar, C, Cl, F, Ne, He, Xe ion, electronics, such as Au, Pt, Ag, Fe, Ni, In, Ga, Zr, Ta, Ti, Zn, Sn, The grain kind of the metal ion of Sb, Hf, Er, Yb, Gd, Pb, Bi, W, Zr, Os can be injected in switching layer and/or electrode and substrate In.Ion could be for adulterate purpose, for example create in the case of transition metal oxide switching layer oxygen-enriched reservoir and/or For the room of electrochemical reaction, and ion can be used for intentionally attacking material to create the path for forming filament. Ion can be used for changing material, such as in transition metal electrode as in the case of Ti, Ta, Mo, W, V, Zr, Ni, Fe, oxygen from Son can partially and/or fully be injected in electrode so that transition metal electrode to be converted to the oxo transition metal for switching layer Compound.Switching layer this be formed in situ to avoid independently form in switching layer and forming top electrode or subsequent electrode with complete Become RRAM device before be exposed to air in the case of it may happen that pollution.Heat treatment is probably or may not be to optimize in situ Switching layer is desired or necessary.
Figure 13 is the figure illustrating the diode layer being formed at after injection it on switching layer according to some embodiments.Open Close layer 130 and be injected into ion, particle, proton, electronics, ray (as x-ray, gamma ray), light wave (as ultraviolet wavelength, blueness Wavelength, green wavelength, red wavelength, infrared wavelength) to cause by stress, heat, differential thermal expansion or radiation-induced damage. According to some embodiments, thick atom mass atoms can be inserted in the material by cosputtering or codeposition and cause damage.? After this damage is formed, can be in the one or more diode layer of grown on top 1310 of the layer having a mind to damage and control electricity Any non-switch layer (for example, resistive layer) of stream is to have good diode and/or resistance characteristic.Top electrode completes this letter The RRAM changing.Can using further ion implanting and/or radiation treatment mitigate top electrode 140 and diode layer 1310 it Between and/or diode layer 1310 and switching layer 130 between any barrier layer unintentionally.
Figure 14 be illustrate according to some embodiments occur on the RRAM device completing have a mind to damaging injection or The figure of radiation.In this case, all necessary diodes and resistive layer 1310, switching layer 130 and top electrode 140 are formed. Then device is exposed to ion, proton, electron injection, the radiation from UV to IR, with enough energy (from less than KeV to MeV) come along depth with a kind of or any multiple kinds of energy and to be determined with a kind of ion of one or more dosage, particle, radiation System is damaged.For example, diode layer 1310 can be non-crystalline silicon, and is not involved in transition metal oxide switching process, wherein open Close layer to be made up of transition metal oxide.Which greatly simplifies manufacture, this is because can manufacture first cross bar and By after any combinations that are individually exposed to ion, particle, proton and/or radiation or grain kind, energy, dosage and method Introduce the damage having a mind to.
Figure 15 A and Figure 15 B is the ion implanting of the device of the stacking illustrating the greater number according to some embodiments Figure.In order to increase memory density, cross bar structure as shown in fig. 15 can be by two on the top of each to more than two Ten cross bar are stacking.Figure 15 B shows the stacked body of the device with single ion implanting path 1554.Each cross bar Average thickness between about 0.1 micron to 2 microns.Stack 20 or more cross bar will cause about 2 microns micro- to 40 The thickness of rice.Ion and electronics can accelerate from about KeV (kilo electron volt) to MeV (million-electron-volt), to penetrate RRAM dress The stacked body put.Depending on material, about 1MeV to 10MeV proton can penetrate beyond the material of some tens of pm.For silicon, example As respectively using 1MeV and 10MeV, penetrated and can be about 25 microns to 250 microns.For gold, penetrate little about 5 to 7 times.
According to some other embodiments, it is deposited and patterned with layer, successively execute ion implanting.In this situation Under, for ions/particles injection and/or be exposed to such as x-ray, gamma ray, UV to IR radiation it is only necessary to offer 0.1KeV Acceleration energy to 1200KeV.
Figure 16 is the switching layer being incorporated to the thick atom mass atoms creating material stress illustrating according to some embodiments Figure.Switch can be designed by including having the atom (for example, atom 1610) of thick atom quality in switching layer 1630 Layer 1630, it causes local train in the material, thus causing defect.Thick atom can be drawn by any one in several method Enter.In one approach, when depositing switching layer, while the other materials of sedimentary 1630, codeposition thick atom quality is former Son, such as Au, Pb, Bi, Ga.Thick atom mass atoms can be atomic form or cluster form (for example, when by sputtering sedimentation When).One example is cosputtering TiOx and Pt or Au so that Au or Pt atom and/or cluster are embedded in TiOx switching layer.This can Can cause in switch in the layer defect, thus causing the path network of the conductive channel for oxonium ion, room and electron-propagation. Passage forms filament, and including by aoxidizing and reducing, its Vacancy and ion may cause to cause transition metal oxide or relatively Conductive or more non-conductive, this depends on the amount in oxonium ion and room.For example, there is the TiOx electric conductivity of high oxonium ion and low latitude position Than having, the TiOx in less oxonium ion and more room is low.Can be by ALD and/or PECVD codeposition or sequential aggradation Other switching layers, such as HfOx, VOx, TaOx, WOx and GaOx or PbOx.
Ion implanting can be also used for introducing ions in switching material, thus cause produce defect network stress and Strain.Charged ion and room are passed through produced passage and propagate to form filament, and its resistivity can be by ion and room Concentration and change.The ion of injection can include O, H, He, Ar, Ne, Xe, Au, Pt, Mn, W, Mo, Zn, Pb, Bi, Ti, Ta.This Outward, the ionic portions ground of injection is located in switching layer, and they can also be predominantly located at outside switching layer, wherein passes through switching layer Ion can cause the defect of material in other layers that switching layer and ion pass through.
Figure 17 is the figure of the stress defect illustrating to be caused by mismatched material layer according to some embodiments.Material layer 1730 Can be formed so that they are in lattice, thermal expansion or deposition parameter (such as temperature, pressure, change by extension or non epitaxial growth Learn metering or material component) aspect mismatch.For example, layer 1730 can be the layer thickness having scope from 0.1nm to 3nm Superlattices, wherein materials A and material B are formed using different deposition process.Different methods includes causing materials A and material B Between stress different deposition parameters, such as temperature, speed, pressure and/or material component.In some cases, permissible Exist with repeat or non-repeating pattern interlock more than bi-material.For example, switching layer can be materials A B, ABABABAB or ABCDBDAC or ABCDEFG etc., wherein each letter representation is due to the group of different deposition parameters, deposition process and/or material Grade cause in nature be different from other materials letter material layer.Gained stress can cause can be formed for ion, Room, the defect network to form filament necessary to the storage effect in RRAM for the conductive channel 1750 of electronics.
Figure 18 A and Figure 18 B is to illustrate to stand ion note according to the switching layer with built-in stress that makes of some embodiments The figure entering and/or radiating.In Figure 18 A, switching layer 1630 is embedded with thick atom, and in Figure 18 B, switching layer 1730 has Superlattices or layer structure, it has layers different in nature, and this causes such as due to different material components and/or deposition The stress that method and/or the other specification of stress that causes cause.In both cases, structure can be carried out ion implanting, By the radiation from UV to IR, to be further exacerbated by stress, and help produce defect in the material so that the network in defect path The passage being formed for filament can be formed without using breakdown voltage in the operation of RRAM.
Figure 19 is to illustrate the flow chart for the basic process frame of basic RRAM according to some embodiments.In frame 1910 In, process is from the beginning of substrate.According to some embodiments, substrate includes a layer of such as silica or multiple layer with will RRAM is electrically insulated with substrate.Substrate can also comprise to may be electrically connected to the cmos circuit of RRAM.In frame 1912, limit and heavy Amass hearth electrode.This can be related to metal deposit, the evaporation of such as metal or the sputtering of metal, photoetching, wet and/or dry ecthing, Such as reactive ion etching, ion milling.According to some embodiments, limit electrode using nano impression.Can use all As the metal of Ti, Mo, W, Ni, Pt, Al, Zr, Ta, V and/or the metal nitride of such as TiN, TaN, GaN, AlN, InN, WN and The silicide of such as NiSi, PtSi, WSi.In frame 1914, switching layer with for current control any other layer (such as two Pole pipe layer and/or resistive layer) deposit together.As it was previously stated, ion implanting and/or radiation can also be carried out in this process frame. The switching layer of TiOx, TaOx, VOx, HfOx, ZnOx, GaOx, InOx, PbOx, FeOx, CrOx, NexO etc. can be chemistry Metering and/or non-stoichiometric.Switching layer can be deposited with several method, for example ald (ALD), plasma Strengthen chemical vapor deposition (PECVD), sputtering, evaporation, molecular beam epitaxy (MBE).Frame 1916 is similar to frame 1912.In this feelings Under condition, top electrode is deposited by photoetching and/or by nano impression and limits.Electrode can evaporate, sputter, PECVD, ALD etc.. The metal of such as Ti, Mo, W, Ni, Pt, Al, Zr, Ta, V and/or the gold of such as TiN, TaN, GaN, AlN, InN, WN can be used Belong to nitride and/or silicide NiSi, PtSi, WSi.In frame 1918, using ion implanting and/or radiation (such as X-ray, gal Horse ray, the light from UV to IR) in switching layer, intentionally produce defect.When switching layer is stoichiometric, can note The dopant ion entering such as oxygen is to provide excessive oxonium ion to affect the resistivity of filament.H ion can also be injected to produce Life can affect the room of the resistivity of filament.According to some embodiments, using the heavy ion being injected by switching layer and/or The ion producing defect is producing defect.Heavy ion passes through switching layer, and many or great majority are embedded in outside switching layer.Note The particle entering can include electronics, the ion of such as H (proton), O, Ti, Ta, N, F, Cl, C, Li, Na, K, He, Ne, Xe, Ar, Au、Be、Mg、Mn、Si、B、Ge、Ga、Ni、V、Au、Pt、Fe、Pb、Bi、In、W、Mo、Hf、Ag、Cr.Implantation Energy can be from little In about 1KeV to more than 10s MeV, and in some cases to GeV.Dosage can be 1 × 104/cm2To 1 × 1017/cm2Or In bigger scope.According to some embodiments, using multiple ionic species, energy and dosage.According to some embodiments, frame 1918 include the radiation by X-ray, gamma ray and/or the light from UV to IR.According to some embodiments, electron beam is used Defect in modification and establishment material.
In the case of the RRAM cross bar of stacking, ion implanting/radiative process frame 1918 can finally execute and/or it Can execute after a number of stacking (for example every 5 stackings).In some cases, in each RRAM layer and/or son Layer (wherein depositing switching layer) place's execution frame 1918.Note, frame 1918 can also include having in sub- KeV to hundreds of KeV and MeV In energy electronics, and variable dose can be 1 × 104/cm2To 1 × 1017/cm2Or in bigger scope.
Figure 20 A and Figure 20 B is to illustrate the ion implantation doping pair for two RRAM devices according to some embodiments The schematic diagram of depth profile.In Figure 20 A, curve 2010 is the ion implanting distribution of the O ion in switching layer, and curve 2012 is the ion implanting distribution of B in the hearth electrode be mainly embedded in Ti/TiOx/Pt structure or P ion.In Figure 20 B, bent Line 2020 is the ion implanting distribution of the O ion in switching layer, and curve 2022 is mainly to be embedded in TiN/HfOx/Ti structure Hearth electrode in Ar or In ion ion implanting distribution.These are only two of tool possible injection ion and distribution The example of RRAM structure.
Figure 21 A and Figure 21 B is the figure illustrating to be formed in situ by ion implanting switching layer according to some embodiments.Figure 21A illustrate only BE 2120 and TE 2140.One of 2120 and 2140 or two be transition metal.In Figure 21 B, ion Injection process 2150 is substantially mainly injected into one of electrode 2120 and 2140 in interface injection oxonium ion and/or by oxonium ion, To form original position transition metal oxide layer 2130, it is switching layer.According to some embodiments, can be by making in the electrodes Form multiple switch layer with the layer of different metal.In one embodiment, BE 2120 is made up of the layer of Pt/Ti/V, and TE 2140 is Mo.By injecting oxonium ion, obtained switching layer 2130 is TiOx/VOx/MoOx.Note, in this situation Under, a part of only TE 2140 is converted into MoOx.According to other embodiment, it is possible to use have the ion of other ions Injection, such as Au, Pt, Xe, H, N, Cl, F, Si etc., to be partially embedded in switching layer and/or to be mainly embedded in outside switching layer Portion has a mind to defect to create for what filament was formed.N ion implanting can be similarly used in the electrode of such as Ti, Al or In To manufacture other home switch layers, such as TiN, AlN, InN, GaN.
Figure 22 A and Figure 22 B is the figure of another example being formed in situ illustrating the switching layer according to some embodiments.? In this example, BE 2220 and TE 2240 need not to be transition metal, because one or more transition metal layer 2200 and 2202 Folder is between them.According to some embodiments, hearth electrode 2220 and top electrode 2240 be such as Pt, Au, Al, Cu, Ag, TiN, The material of GaN, InN, silicide, nitride, carbide, carbon and/or semiconductor.Intermediate layer 2200 and 2202 can be such as The transition metal of Ti, Ta, V, Ni, Hf, Zr, Cr, Zn, Mn, W, Mo, Ir, Os, Al.O +ion implanted 2250 is with enough to form so Can be used for the pre-formed layer of dosage 2200 and 2202 of the transition metal oxide layer 2230 and 2232 of switch afterwards.In several KeV To the energy of 800KeV or bigger, O +ion implanted dosage range is from about 1 × 1010/cm2To 5 × 1020/cm2Or it is bigger.Root According to some embodiments, the ion implanting of other ions can be used for helping create the defect being formed for filament.Can also Manufacture the switching layer based on nitride, for example, layer 2202 can inject Ti, In or Al and N ion.Furthermore, it is possible to O and N from Son injection manufactures multiple different types of switching layers, such as transition metal oxide and transition metal nitride in situ.
As used herein, " filament is formed " refers to the formation of one or more passages that electric current flows along fault in material, Wherein, the resistivity of passage can be changed by charged ion and room.Note, the width of each passage can be from the horizontal stroke of RRAM Actual lateral dimension to sub-fraction to the RRAM of the size of size changes.
Figure 23 A and Figure 23 B is to illustrate being formed in situ of the switching layer combining according to some embodiments with non-switch layer Figure.Except transition metal oxide switching layer is formed in situ from transition metal layer 2300 and 2302 by O +ion implanted 2350 Outside 2330 and 2332, other layers can also be formed.For example, it is possible to by add Si layer 2304 (its may then pass through oxygen from Son injection 2350 is oxidized to silica and/or SiOx) the tunnel silicon dioxide layer 2334 thick to form several nm.Real according to some Apply mode, it is possible to use other layers replace forming oxide to change the electrical characteristics of layer (such as GaAs, GaN, InN etc.).? In this case, the oxonium ion of injection can increase the resistivity of the layer for current control, and also can have non-linear IV characteristic, it can minimize the sneak-out current in cross bar RRAM structure.
It should be noted that although the RRAM device being discussed herein is mainly based upon transition metal oxide, but according to some Embodiment, described technology is applied to be not based on other resistance-type memories of the transition metal oxide for switch Device, such as transition metal nitride, transition metal carbide, metal sulfide, metal chloride, metal fluoride, sulfuration Thing, chloride, fluoride, diamond-like-carbon, carbon, polymer and phase change nonvolatile memory device.
It should be noted that the resistive random access memory (RRAM) of also referred to as memristor can be used for logic behaviour Make.According to some embodiments, techniques described herein is not limited to storage arrangement, and applies also for logical operation.Ginseng See, and for example " NATURE NANOTECHNOLOGY | VOL8 | in January, 2013 | www.nature.com/ naturenanotechnology,Memristive devices for computing”.
According to some embodiments, in phase transition storage (PCM), Ge is clipped between top electrode and hearth electrode, using from Sub- injecting mask is used for selective area ion implanting, as shown in such as Fig. 4.Sb and Te can be injected into so that phase transformation material Material Ge-Sb-Te can be formed in situ.Oxonium ion can also be injected in the region wherein not needing phase-change material;For example, may be used To reduce the size of phase change region in selective area ion implanted regions using ion implanting mask, to improve electrically Can, such as low current operation.Other PCM material, such as CuS, AgS, Sb-Te, Sb-Te-TiN etc., wherein Cu can also be used Electrode can be partly converted into CuS by S ion implanting.
Figure 24 is the figure of the ion implanting illustrating the phase-changing storage device according to some embodiments.In this example, Ge-Sb-Te phase transition storage region 2452 is formed in the Ge layer 2430 being clipped between hearth electrode 140 and top electrode 120.In order to Make Ge 2430 have higher resistive, can be firstly used in the Ge region in addition to by injection Sb and Te Anywhere Injecting mask (not shown) injection O ion.Using autoregistration process, it is possible to use the second injecting mask 2410.Mask 2410 With the first injecting mask autoregistration, wherein remove the first injecting mask and portalled with exposing.Injection process 2450 is then by Sb and Te It is injected in Ge to ion selectivity, thus being formed in situ the Ge-Sb-Te phase-change material 2452 for storage completely.Referring to example As MRS BULLETIN VOLUME in August, 39 2014 www.mrs.org/bulletin, " Phase change materials and phase change memory”.Heat treatment is probably or may not be that to optimize device performance required or must Want.
According to some embodiments, by ion beam, electron beam, electromagnetic wave, ultrasonic wave, internal stress and/or built-in should Power creates defect path or passage in switching material, and switching material can be crystal, non-crystal, crystallite and/or amorphous Material.In transition metal oxide switching layer, the chemical bond between metal and oxygen disconnects so that forming room on microcosmic. Room can be such as Lacking oxygen and/or metallic voids.These defects can form path or passage so that room and ion can To drift about under the influence of electric field and/or potential.
In known technology, the big voltage applying about 5V to 50V wherein between top electrode and hearth electrode is (depending on switch Layer thickness) forming process during create wherein bond fission crystallography defect path/passage.According to some embodiment party Formula, creates the path of the defect of wherein bond fission using ion implanting, electron beam, electromagnetic wave, heat, ultrasonic wave, built-in stress. Defect can take room, calking, point defect, line defect, planar defect, Frenkel defect, antistructure defect, impurity, amorphous area Domain, the form of topological defect, dislocation and/or F center.Amorphous and polycrystalline material have microcosmic crystal structure, and crystalline material tool There is macroscopical crystal structure.For example, the defect of such as bond fission can be across the top of resistive random access memory (RRAM) electricity Path/passage for room, ion, electrons spread and drift is provided under the electric field of pole and hearth electrode applying and/or potential.
As noted it is known that forming process can be used for causing bond fission when applying high voltage at TE and BE two ends, from And cause switch in the layer high electric field and high current density.Known in the switching layer thick across about 2nm to 60nm 1 volt to 30 volts Special voltage, has 5 × 106The breakdown electric field of V/cm and the electric current from several microamperes to tens milliamperes.Filament diameter can be from receiving Rice is in the range of hundreds of nanometer.Filament can be diametrically uneven according to length, and can have multiple branches.This Outward, forming process can form multiple filaments.In polycrystalline switching layer, defect can be formed along crystal boundary.By intentional Introduce defective passage described herein and/or path, filament is mainly along the defective path/passage shape being intentionally introduced Become.By using defective path/passage of being deliberately formed it is known that the forming process under high electric field will be unnecessary 's.In some cases, alternatively can start the drift motion formation filament of room, ion, electronics using applied voltage.So And, start voltage by near several volts and less than the bond fission voltage needed for forming process.
Figure 25 A and Figure 25 B is to illustrate according to some embodiments for producing the intense ultrasonic wave of defect in switching layer And/or the figure of heat.Figure 25 A is shown in which to be combined with the switching layer 1630 of thick atom mass atoms, and it causes the office in material Portion strains.Ultrasonic wave 2550 provides outside stimulus to cause local defect to propagate.Similarly, in Figure 25 B, layer 1730 includes drawing Play the mismatched material layer of the stress between adjacent layer.Ultrasonic wave 2552 provides outside stimulus to cause local defect 1750 to propagate. According to some embodiments, outside stimulus are provided to propagate defect using heat in the case of being with or without ultrasonic wave.According to Some embodiments, switching layer does not have built-in internal stress, but ultrasonic wave sufficiently strong so that still causing and spread out Close the defect in layer.
Figure 26 is to illustrate to be created in switch Rotating fields using ion implanting or other radiation according to some embodiments The path of defect or passage figure.Bundle 150 can be such as Au, Pb, U, Er, Yt, Zn, O, Pt, Fe, Bi, H, He, Ga, Hf, The ion of N, C, V, Ti, Ta, Ar, Xe, positive electron and electronics.Top electrode 140 is in place or at other in some embodiments In the case of not forming top electrode in embodiment, injection can occur in switching layer 130 and/or pass through switching layer 130. The chemical bond that injection destroys and/or ruptures between metal and oxygen, to form defective metal-oxygen key and/or room.Transition gold The example belonging to oxide switching material includes TiOx, HfOx, TaOx, VOx, WOx and ZnOx.Other switch layer materials are also possible , such as C, S, F and N.According to some embodiments, energy can be from sub- KeV to thousand of KeV, even to the scope of MeV Interior.Dosage can be from less than 1 × 103/cm2To more than 1 × 1020/cm2In the range of.Injection can be blanket type ion implanting or Selective area ion implanting.
Figure 27 is the figure illustrating forming process well known in the prior art.Figure 27 reorganization " Progress on RRAM as certainly A future non volatile memory " (NVM), P.D.Kirsh, on October 28th, 2011, Sematech.Figure 27 illustrates ?:The storage effect of such as high resistance state and low resistance state in known RRAM manufacturing technology, can be presented in RRAM Forming process should be used before.Forming process includes applying big voltage across top electrode and hearth electrode, cause in metal ion and Puncture in the case of bond fission between oxonium ion.This process causes room, ion and/or electronics to drift about under applied field Random walk.This mobile generation of the ion in this defective path of breaking bonds, room and/or electronics is high and low Resistance states.There is the defective path of room, ion and/or electrons spread, drift and/or jump usual quilt in the literature Referred to as filament.This forming process in RRAM using known for many years.However, not yet produce known business so far producing Product.This is considered to be partly due to apply can not manufacturing of the formation voltage of each memory component in large memories chip Property, and also partially due to during forming process bond fission random nature.Obtained device has poor repeatability The reliability of uniformity and difference and between the device of difference.According to some embodiments as herein described, using ion implanting or its He carrys out breaking bonds at radiation.This causes defect path/passage evenly, and this causes reproducible and more can manufacture and reliably RRAM.
According to some embodiments, we are using by ion implanting, the particle beams, electron beam, electromagnetic radiation, heat, ultrasonic wave Etc. the damage causing.In the example of ion implanting, ion causes the defect of such as bond fission.Defect become room, ion and/ Or the path of electron transfer or passage, a combination thereof is referred to as " filament ".According to some embodiments, it is possible to use activation some from The heat treatment of son.Then subsequent ion implanting can cause the defective road for ion, room and/or electron transfer Footpath/passage.Heat treatment at certain temperatures can be used for the partial activation in some embodiments.In some cases, may be used To remove some but to be not all of defect to be annealed using part and/or to be heat-treated.Heat treatment can be used for optimizing the electricity of RRAM Resistance rate, activation diode characteristic and optimize current-voltage characteristic non-linear.Although in order to there is filament in RRAM, should This reservation is a certain amount of to be damaged or defect, but can optimize the characteristic of filament using heat treatment.
Annealing and/or heat treatment temperature can from less than 200 DEG C in the range of more than 1800 DEG C continue several milliseconds to Many hours.Annealing can be carried out in inert environments such as Ar or in the reaction environment of such as O or H.Annealing process is permissible There is the combination of the gas of such as N and H, Ar and H, Ar and N.Annealing process can also be in plasma environment, wherein such as The gas discharge of N, O, H or combination of gases can be used for glow discharge.
Figure 28 is the variable figure illustrating the switch parameter according to known RRAM forming process.Figure 28 reorganization " A certainly Two-Step Set Operation for Highly Uniform Resistive Switching ReRAM by Controllable Filament ", Sangheon Lee et al., on September 18th, 2013, ESSDERC 2013, Romania. Due to the randomness being formed using the filament of the known forming process applying breakdown voltage wherein between top electrode and hearth electrode Matter, the switch parameter of RRAM is generally in VsetChangeability, the RRAM voltage from HRS to LRS, the value of LRS 2820 is assumed in 2810 Changeability, the slope as resistance, the changeability of HRS slope 2822 and be voltage from LRS to HRS Vreset2812 Changeability.Compared with according to many embodiments as herein described, using by ion implanting, electron beam, electromagnetic radiation, super Defective path/the passage being deliberately introduced that sound wave, heat and/or built-in stress create, the changeability of switch parameter can be big Big minimizing.
Figure 29 A and Figure 29 B is the figure of the aspect illustrating that the RRAM according to some embodiments is processed.At RRAM experience Reason, the interface of BE 120 and switching layer 130 is exposed to processing environment, and such as photoresist stripping, dry/wet etching, process set Chip between standby is processed and/or vacuum breaker.Some or all in these steps can cause BE 120 and SL 130 it Between interface form barrier layer (UBL) 2910 unintentionally and form UBL 2920 between SL 130 and TE 140.This A little UBL 2910 and 2920 can be oxide, the organic layer of residue being such as derived from photoresist process, pump oil remnants Thing, the pollutant being caused due to redeposited in a vacuum chamber material during plasma etching etc., and can be can To hinder the obstacle of electric current flowing.According to some embodiments, these UBL 2910 and 2920 are ion implanted 2950 and pass through TE 140 simultaneously enters RRAM device and destroys.According to some embodiments, injection can be directed to BE 120 and/or substrate 110.Quilt The UBL destroying is illustrated by the empty concealed wire 2912 and 2922 in Figure 29 B.The destruction of UBL allows electric current flowing and is formed for RRAM The filament of operation, its Vacancy, ion and/or electronics can be along the defect Path Migration being formed by ion implanting, diffusion, drifts Move, jump.Circle represents defect, such as defect 2900.Note, before ion implanting as shown in figure 29 a, there are some originally Ground defect.After ion implantation, defect density increases, as shown in fig. 29b.These circles can also represent the ion of injection, Such as metal and nonmetallic ion.
Figure 30 A and Figure 30 B is to illustrate that the formation according to some embodiments subsequently forms relatively for the thin TE of ion implanting The figure of thick TE.In Figure 30 A, thin TE 3040 can be used for the ion implanting by RRAM structure, with reduce ion need through TE 3040, the energy of SL 130, BE 120 and/or substrate 110.Thin TE 3040 can have scope from less than 10nm to exceeding The thickness of 100nm.Can formed as discussed above between BE 120 and SL 130 (UBL 2910 in Figure 29 A) and in SL The UBL that between 130 and TE 3040, (UBL 2920 in Figure 29 A) is formed.Then, UBL passes through thin TE by ion implanting 2950 3040 and enter SL 130, BE 120 and/or substrate 110 and be destroyed.Show destroyed UBL 2922 and 2912.Serve as The UBL of current barrier layer is corrupted such that their chemical bond enters those regions by ion implanting and/or ion passes through those Region is destroyed.Metal, oxygen, nonmetallic ion can be injected into or pass through interface.Additionally, in thin TE 3040 and SL 130 Ion can clash into the UBL into pollution.Destroyed UBL 2912 and 2922 can more easily allow electric current flowing.In ion After the radiative process of injection process and/or such as X-ray, TE 140 can be thickened by added material 3042, to reduce Series resistance.
Figure 31 A and Figure 31 B is to illustrate there is, according to some embodiments, the top being made up of the combination of metal and semiconductor The figure of the RRAM structure of electrode and hearth electrode.TE (TE 140 that thin section 3040 and rear injection thicken) and BE 120 can be by gold Belong to and the combination of semiconductor made, for example silicide (NiSi, PtSi), nitride (TiN), polysilicon, highly doped non-crystalline silicon and The metal level of such as Ti/Pt, Ta/Pt/Au, Ni/Ti and Pt/Ni/Pt.After by thin TE 3040 ion implanting, TE 140 Can be thickened with metal 3142 (such as Al), to reduce series resistance, as shown in figure 31b.
According to some embodiments, ion implanting and/or radiation create destroy interface UBL and allow electric current more easily by Defect.Ion implanting can also by metal and nonmetallic ion introduce unintentionally interface UBL and/or by ion from TE and SL impinges onto UBL, simultaneously allows electric current to be easier to flow thus destroying them.According to some embodiments, there is no existing skill Art has manufactured RRAM in the case of forming voltage and adjoint high current (it may damage RRAM and reduce its reliability).
Some bibliography, such as U.S. Patent number 8,062,918,8,420,478,8,465,996,8,872,151 beg for Discuss and injected in SL ionic portions to increase defect density.However, these bibliography propose to inject before forming TE Ion, this makes the interface between SL and TE form UBL.UBL thickness can be the major part of switching layer.For example, switch Layer can have the as little as thickness of 2nm, and UBL can have the thickness in the range of 1nm to 20nm.Therefore, UBL can use it Thickness significantly changes the characteristic of switching layer with composition.UBL is considered pollution.This needs further forming process, its fall The reliability of low RRAM simultaneously increases its changeability.Additionally, bibliography teaches injection ion/defect so that they are mainly protected Stay in a part of SL.Because the ion/defect significant portion of injection will not reach the interface of SL and BE, therefore these technology It is invalid in terms of destroying the UBL being likely to be present between SL and BE.By non-effective the UBL destroying the every side of SL, can High formation voltage can be needed to penetrate block piece.
U.S. Patent number 8,809,159 discusses the thin TE to the radioparent 20nm that can be formed before irradiation. Need transparent TE, this is because low-down energy is used for radiating and need to radiate by TE and enter SL.This main Adjust the low-yield uneven distribution causing defect of radiation in SL, and may not destroy in the formation of SL and BE interface UBL.
According to some embodiments, execute ion implanting/be radiated and/or logical using the ion with multiple Implantation Energies Cross unintentionally barrier layer (UBL), each Implantation Energy is directed to TE, UBL, SL, BE and/or passes through UBL and enter BE and/or substrate Adjust.After ion implantation process and radiative process, do not formed and can unintentionally stop the other critical of electric current flowing Interface.
According to some embodiments, inject ion multiple energy scope from Kev to more than MeV.For example, proton is permissible Be injected into 2 microns under 200KeV, its for individual layer RRAM cross bar structure, in substantial amounts of H+implantation substrate.Proton leads to Cross TE, SL and BE and enter substrate transport be room, ion and/or electron transfer and form filament and create and be uniformly distributed Defect passage/path.Can be using other ions beyond proton free, including metal and/or nonmetallic ion.By using Radiation and/or ion implantation damage equably create enhanced passage in switching layer, it is possible to achieve including greater number The performance of the relatively high uniformity on the whole chip of RRAM unit.
Figure 32 is to illustrate the flow chart for the process frame of basic RRAM according to some embodiments.Show that RRAM fills Put/the process step of cross bar, from the beginning of frame 3210, wherein substrate can comprise active and possible passive device CMOS integrated Circuit, to be connected to the other information processing unit of such as CPU with RRAM.In frame 3212, form hearth electrode, then in frame Form switching layer in 3214.According to some embodiments, switching layer can also include resistor, tunnel layer and/or diode layer. In frame 3216, form top electrode.In frame 3218, ion implanting and/or radiation are executed by whole RRAM structure.In stacking RRAM structure in the case of, the injection of frame 3218 or radiation can be the RRAM knots passing through whole stacking using enough energy Structure, to penetrate RRAM and/or whole RRAM stacked body.According to some other embodiments, middle injection/irradiation step can be Carry out after forming one or more stacked body layers.In frame 3220, if it is desired, top electrode is thickened.Frame 3218 from Son injection and/or radiation can be made up of multiple energy, dosage and different ions, electronics and proton.According to some embodiment party Formula, equally distributed defect passage extends through switching layer from top electrode and enters hearth electrode and/or entrance substrate.By right It is exposed to suitably the sheltering of region (selective area radiation and/or ion implanting) of radiation and/or ion implanting, whole silicon wafer Piece is radiated and/or ion implanting, and this contributes to high-volume silicon wafer and processes.
According to some other embodiments, described device radiates in situ.That is, after the deposition of BE, SL and TE Radiated, for example as shown in figure 32.According to some embodiments, using high dose (from 100rad to 10,000,000 in silicon Rad) electromagnetic radiation, the such as X-ray in the range of about 3KeV to about 100KeV, to be led to by the defect that SL creates evenly Road.1rad or 1rad (Si) in silicon is normally defined the energy that every gram of silicon absorbs 100erg.Generally, either penetrated with ion, X The form of line, gamma ray or electronics, the higher radiation with the higher Kev energy that larger depth penetrates can be such as SL's Defect evenly is provided, particularly when there is thicker top layer TE in thin layer.This high uniformity of the defect in SL (it provides the low change to operating characteristics) is important for the manufacture with the very device of big figure element.As institute after a while This original position radiation of the utilization high energy electromagnetic radiation shown or ion can be in simple one layer of RRAM structure, multiple-level stack Carry out in cross bar RRAM structure or vertical RRAM structure.For multiple-level stack with vertical RRAM structure it might even be possible to use Higher emittance as described elsewhere herein.
Following partly in, we describe the feelings using electromagnetic radiation in thick top electrode TE (for example, more than 100nm) The utility unit of the uniform defect producing in SL situ under condition.More specifically, according to some embodiments, using having scope The X-ray radiation of the photon energy from 3KeV to 100KeV.Previously unreal land used trial electromagnetic radiation produces in SL Defect.For example, a prior art (United States Patent (USP) 8,809,159) discusses using low-down radiated photons energy (wavelength of 200nm to 600nm or 6.2 to 2.1ev), causes the scope of the depth that defect produces in SL very narrow.This low energy Amount method also needs to be radiated before deposition top electrode or using very thin top electrode layer (thickness is 10nm to 20nm). This is unpractical method, and this may cause from big in the SL of the relatively small thickness change in SL and/or TE of chip Defect change.This prior art nor the original position radiation that multilayer cross bar structure or vertical structure are provided.According to Some embodiments, are with ratio United States Patent (USP) 8, energy height used in 809,159 after the thick TE of about 100nm or thicker magnitude 100 times to 1000 times of energy radiation.
Figure 33 A to Figure 33 D is the figure of the analog result illustrating the Hf ion according to known technology injection.U.S. Patent number 8, 872,151 discuss Hf ion implanting under 50KeV and 22.5KeV in the 30nm HfOx switching layer not having top electrode.Bent Line 3310,3312,3314 and 3316 is the Monte Carlo simulation of these conditions.As can be seen that the room producing in switching layer Very uneven.This inhomogeneities with the region lacking room may cause inconsistent and not reproducible RRAM switch Characteristic, and need to be formed with activate switch further, because not having the volume in room will need to be formed to produce Room.It may also be desirable to be formed with destroy between HfOx and hearth electrode and top electrode and after ion implantation process heavy UBL between long-pending HfOx.In switching layer, the inhomogeneities of vacancy concentration is more than 95%.This inhomogeneities can cause room The reduction of concentration, thus causing mobil-ity degradation, it may be between HRS (high resistance state) and LRS (low resistance state) Finally cause RRAM fault after multiple cycles.Relatively low vacancy concentration also can cause low vacancy mobility and relatively low conduction Rate.
Figure 34 is the figure of the relative thickness illustrating the electrode of the simple R RAM structure according to some embodiments and switching layer. TE 140 is the Pt of 50nm;SL 130 is the TiOx of 10nm;BE 120 is the Ti (or being Pt in some cases) of 100nm;With And substrate 110 is the SiO of 5000nm2.Injection can be executed using various ionic species, various Implantation Energy and multiple dosage Process 3450.Simulate the scheme of several structures being injected into shown in Figure 34, and result is shown in Figure 35 A-D, Figure 36 A-D, figure In 37A-D and Figure 38 A-D.It has been found that providing relatively deep injection process so that most of ion is injected into base well In plate 110, the uniformity of defect profile is caused to greatly increase.This uniform defect profile and associated uniform vacancy concentration profile Substantially increase RRAM repeatability, reduce RRAM changeability and improve RRAM reliability.In this case, switching layer Interior vacancy concentration uniformity is better than 10%.According to some embodiments, outside most of ion implanting to switching layer, this can carry For acceptable vacancy concentration uniformity.According to some embodiments, 90% or more ion is injected into the outer of switching layer Portion.According to some embodiments, 70% or more ion is injected into the outside of switching layer.According to some embodiments, 50% or more ion is injected into the outside of switching layer.According to some embodiments, 30% or more ion is injected into Outside to switching layer.In some cases, 10% or more ion is injected into the outside of switching layer.Change in mean value In change, switch in the layer vacancy concentration uniformity can from better than 5% in the range of better than 80%.In certain situation Under, the change of vacancy concentration uniformity can be better than 5%.In some cases, it may be better than 10%.In some cases, It may be better than 20%.In some cases, vacancy concentration uniformity can be better than 30%.In some cases, it can be excellent In 40%-50%.In some cases, in terms of the change of mean value, room uniformity can be better than 60-80%.According to some Embodiment, multiple ion implantings with different ions species, energy and/or dosage are used for improving RRAM repeatability, subtract Few changeability simultaneously improves reliability.According to some embodiments, using shallow and deep ion injection combination.For example, first is shallower Ion implanting effectively destroy the UBL between TE and SL and/or SL and BE layer.It is the second relatively deep injection after this, it is effective Ground produces uniform defect profile on whole SL layer.Other combinations of ion implanting also may be incorporated in RRAM manufacture process, example As transition metal converted in-situ is injectant (nitride, carbide, fluoride, chloride, the oxidation of transition metal oxide Thing and its any combinations are other examples).
Figure 35 A to Figure 35 D is the simulation knot being shown in the Ar ion being injected under 600KeV in structure as shown in figure 34 The figure of fruit.Ar ion can be accelerated with single ionization and under 600KeV or double ioinization acceleration under 300KeV.As curve 3510 institute Show, Ar quasi-molecular ions is just less than 500nm and enters SiO2Layer.Curve 3512 is putting of the top of TE 140, SL 130 and BE 120 Big figure.Curve 3514 and 3516 is the collision accident figure showing the room being produced by injection.The enlarged drawing in produced room 3516 show good uniformity in the thick TiOx switching layer 130 of 10nm, and do not have any of room in switching layer 130 Space.In addition, it could be seen that there is no room in TE 140 to SL 130 interface and in SL 130 to BE 120 interface Space, this is the place that UBL is easily formed.Room is directly proportional to collision accident;Approx by r × collision accident × dosage × 106/cm3Be given, wherein " r " can have the value from 1 to 0.01.Following all vacancy concentrations are calculated and selects " r "=1 Value.If " r " is less than 1, correspondingly vacancy concentration can be corrected with higher dosage.Select " r "=1 approximate just for heavy ion Really, the ion collision event of wherein each injection will produce room.
Figure 36 A to Figure 36 D is the simulation knot being shown in the Ar ion being injected under 800KeV in structure as shown in figure 34 The figure of fruit.In curve 3610, Ar quasi-molecular ions enters into SiO2It is deeper than 500nm in layer.Curve 3612 is TE 140, SL 130 and The enlarged drawing on the top of BE 120.Curve 3614 and 3616 is the collision accident figure showing the room being produced by injection.Enlarged drawing 3616 are shown in switching layer 130 approximately uniformly generation has the room better than 50% uniformity.Do not consider decline and There is the room peak of the possibly illusion of simulation of the TiOx boundary of Pt and Ti, the uniformity of the vacancy concentration in switching layer is excellent In 3%.In addition, it could be seen that there is no room in TE 140 to SL 130 interface and in SL130 to BE 120 interface Space, this is the position that UBL is easily formed.Ar is primarily used for producing room and defect and electrode ion being knocked in interface with broken The inert ion of the bad UBL (this causes RRAM device to need to puncture rank forming process) being likely to form during processing.
Figure 37 A to Figure 37 D is to be shown in be injected under 1600KeV in structure as shown in figure 34 or three under 533KeV The figure of the analog result of Xe ion ionizing again and accelerating.Can be seen that ion distribution peak from curve 3710 far from surface about 500nm.Curve 3712 is the enlarged drawing on the top of TE 140, SL 130 and BE 120.Can be seen that from curve 3714 and 3716 Room/defect the approaches uniformity producing in switching layer 130 and in TE/SL and SL/BE interface, and the change of vacancy concentration Less than 10%.Do not consider decline and the peak value (this artefact in being likely due to simulate causes) in the room in switching layer, all Even property is better than 2%.Interface in switching layer and/or in switch in the layer room/defect and interface do not have any sky A kind of approaches uniformity distribution of gap and/or the distribution of multiple approaches uniformity can cause low changeability RRAM switching characteristic and improve Repeatability and reliability.Although in this example using the acceleration energy of 1600KeV, can also use and be less than or greater than Other energy of 1600KeV.According to some embodiments, the ion of Multiple ionization can use accordingly relatively low accelerating potential, And realize similar injection depth.Relation E (energy)=ZeV can be used, wherein Z is ionic charge number, V is to accelerate electricity Press, and e is electron charge.For example, the Ar ion with triple ionization of 600KV accelerating potential will have the energy of 1800KeV Amount.The energy can also being located in hearth electrode using quasi-molecular ions;Consideration can any cmos circuit below RRAM and/or dress Put, and energy can be adjusted to minimize the ion implanting in CMOS.
Figure 38 A to Figure 38 D is to be shown in the Bi ion being injected under 3200KeV in example arrangement as shown in figure 34 The figure of analog result.From curve 3810 as can be seen that Bi ion is injected into the depth of about 500nm.Curve 3812 be TE 140, The enlarged drawing on the top of SL 130 and BE 120.As seen in curve 3814 and 3816, in switching layer 130 and interface The room approaches uniformity at place.Bi ion can be by Multiple ionization to reduce accelerating potential.In addition it is possible to use except 3200KeV Outside energy.For example, it is possible in Bi ion implanting to hearth electrode and/or top electrode interface, in switching layer and/or bottom is electric Pole interface, and be the Bi of higher energy and/or other ion implantings afterwards to be produced without the room in space and/or to open Close the room of the approaches uniformity in layer and interface.The uniformity of vacancy concentration is approximately less than 5%.Do not consider the vacation because of simulation The part of elephant is it is achieved that be better than 2% vacancy concentration uniformity.Higher energy ion implanting can also have to due to for example may be used The room of the thickness change of RRAM device to be caused by process, defect, the small change of the uniformity of ion distribution.
Figure 39 is X-ray linear absorption coefficient in the silicon of the energy between illustrating for 1KeV and 100KeV (with cm-1For Unit) relation and x-ray photon energy (in units of KeV) between log-log plot.In following example, illustrate RRAM is promoted to manufacture using high dose electromagnetic radiation (such as X-ray).In 100rad (in Si) to 10000000rad For example desired damage can also be caused in switching layer with the electromagnetic radiation in the form of X-ray in the range of (in Si). In Figure 39, for the sake of clarity, the linear absorption coefficient in silicon is illustrated to be fractured into two curves 3910 and 3912.For detailed Thin bibliography, see, for example, NIST X-ray mass attenuation coefficient for Silicon (silicon NIST X-ray mass attentuation coefficient).For the X-ray in the range of 3keV to 100KeV, linear absorption coefficient | μ is 1000/ Cm to 0.4/cm (or cm-1) in the range of.Then absorbing (ABS) is:ABS=1-e-μτ, wherein τ is the silicon thickness in units of cm. For example, thickness is 200nm or 0.2 × 10-4Cm, and the original position RRAM device in 26KeV (wherein μ be 5cm), then μ τ=1 × 10-4And ABS=0.0001.Therefore, ABS is actually with RRAM device thickness linearly.Several hundred in RRAM thickness The change dividing ratio makes ABS only change several percentage points.Therefore, this radiation in the range of 26KeV or 20-30KeV is to thickness Degree change is very insensitive, and is particularly suitable for the original position spoke to change with the stacking cross bar RRAM device of little tolerance limit Penetrate.The example of the stacked structure of three RRAM devices is shown, it is possible to use above range easily radiates in situ in Figure 45.Root According to some embodiments, the original position radiation with the RRAM structure of the stack device of greater number uses the energy model of 20-30KeV It is also practical for enclosing.In some instances, using energy range in situ radiation 5 to 15 or more stackings of 20-30KeV The stacked body of RAMM device.Vertically RRAM structure (its example figure 53 illustrates) is also admirably suitable for using electromagnetic energy (spy Not in the range of 20-30KeV) original position radiation.According to some embodiments, x-ray can be provided with bremsstrahlung (Bremsstrahlung) device (device for example for medical purpose) or electron synchrotron device.Further, since Form two electrodes, so this radiation can destroy passes through pollution unintentionally shape during processing before the original position radiation of switching layer Any UBL becoming.
According to some embodiments, CMOS can in RRAM cross bar below and/or around in the case of, can take Precautionary measures to shelter this that be exposed to radiation by the thin layer (for example, several microns of thickness) of heavy metal such as W, Ta, Bi, Au and Pb A little sensitizing ranges.For example, before starting the construction process of cross bar, as shown in Figure 32, in step 3212, deposit first W, Ta, Bi, Au, Pb and/or the layer of other metals, with block below this position or around miscellaneous part.This show for The x-ray photon energy exceeding well over 60KeV will need unpractical thick blocking.In prior art solutions, the such as U.S. The patent No. 8,809,159 (wherein seeming suggestion cobalt -60 gamma ray radiation), do not understand this effect.This height penetrates Radiation by all parts in breaking plant.According to some embodiments, stack and relatively thin RRAM structure for less, It is probably useful less than the radiation of the relatively low-energy X-ray in the range of 10KeV.The benefit of this embodiment is to use Thinner heavy metal blocks.
Figure 40 is the RRAM knot with vertical with substrate or almost vertical switching layer illustrating according to some embodiments The figure in the simple section of structure.Generally, RRAM switching layer can be level (parallel to substrate and/or nearly horizontal) and/or perpendicular Directly (perpendicular to substrate and/or nearly vertical) and from perpendicular to substrate to any angle parallel to substrate.With regard to switching Layer is arranged perpendicularly to the further detail below of substrate, see, for example, U.S. Patent Publication No. 2015/0090948.Ion implanting and/ Or with X-ray/gamma ray radiation can with from the angle in the range of substrate to out of plumb (for example from respect to substrate Right angle to acute angle or obtuse angle) clash into RRAM structure.In example shown in Figure 40, radiation 4050 (for example ion implanting and/or Radiation) top electrode 140 passed through with (e.g., from about 45 degree) of non-perpendicular angle and enters switching layer 4030,4032 and 4034, entrance bottom Electrode 120 and/or enter substrate 110 guiding RRAM structure.Ion implanting and/or radiation 4050 can also be vertical or almost Perpendicular to substrate 110, and cause room/defect in switching layer and interface.According to some embodiments, ion implanting or its His angle of radiation can be in less than 5 degree to 80 degree or more non-perpendicular greatly scope.
Figure 41 is the figure in the section illustrating the RRAM structure according to some embodiments, wherein ion implanting or other radiation It is performed as major planar surface that is vertical or being approximately perpendicular to substrate.RRAM structure is as shown in figure 40.Ion implanting and/or X penetrate The radiation of line/gamma ray 4150 can be clashed into vertical with the major planar surface of substrate and/or almost vertical angle.Select Energy makes ion and/or radiation by electrode and enters switching layer and interface, enters hearth electrode and/or enter generation in substrate Room/defect.In this example, the boundary between ion and/or radiation any other layer in switching layer with for current control Interface between face and the such as electrode of hearth electrode 120 and top electrode 140 penetrates switching layer with edge-wise after being manufactured 4030th, 4032 and 4034.By this way, ion and/or radiation 4450 can destroy and pass through pollution unintentionally during processing Any UBL being formed.This destruction improves RRAM switching characteristic, and does not rely on and apply nearly breakdown voltage electric current to device Forming process.Room and defect is produced in switching layer 4030,4032 and 4034.According to some embodiments, ion such as O, Transition metal ions, other nontransition metal ion, inert ions such as Ar, Xe, non-inert ion such as H, Cl, N, F and its His ion such as Li, Na, K, C etc. can also be injected in switching layer with edge-wise and/or almost with edge-wise.Ion And/or the distribution of room/defect is along the direction of knock-on ion.In most of the cases, the width of switching layer is more than switching layer Thickness, in the range from about 2nm to about 40nm.Therefore, the distribution of room and/or ion can along the width of switching layer not It is the depth arrangement of switching layer.This technology can advantageously room/ion be positioned in the width of switching layer, and it can enter one Step limit switch in the layer switch region, to improve repeatability and reliability.
Figure 42 is the figure illustrating the stacking RRAM structure with two or more stacked bodies according to some embodiments, The plane of wherein switching layer is vertical and/or surface that be approximately perpendicular to substrate.For ion implanting and/or radiation (for example X penetrates Line/gamma ray) energy be selected so that ion and/or radiation penetrated entirely by electrode 4240,4220,140 and 150 Stacked body 4200 access switch layer such as 4230 and 4232, and enter substrate 110.Ion and/or radiation also penetrate through and may deposit Interface between the electrode and switching layer of UBL, thus destroys UBL.The angle of knock-on ion and/or radiation can be vertical And/or it is approximately perpendicular to substrate, such as so that switching layer is penetrated with edge-wise in exemplary injectant 4252.According to Some other embodiments, such as in exemplary injectant 4250, knock-on ion and/or radiation can be non-perpendicular.
Figure 43 is the basic simplification with vertical and/or nearly vertical switching layer illustrating according to some embodiments The figure in the section of RRAM structure, wherein ion implanting and/or radiation are along edge impact access switch layer.Situation in ion implanting Under, along edge direction allow ion/room in the region of the width along switching layer rather than the depth along switching layer or thickness/ The positioning of defect.Note, vacancy concentration is generally uniform along the direction of electric current flowing.Show exemplary ion in illustration 4360 And/or defect profile.The ion with sufficiently high energy can also penetrate along the whole width of switching layer, to be injected into In hearth electrode 120 and/or substrate 110.According to some embodiments, it is possible to use different kinds of ions species, energy and/or dosage come Optimize RRAM switching characteristic, repeatability and reliability, and reduce RRAM changeability.According to some embodiments, such as X-ray Radiation with gamma ray can also be used together with ion implanting and/or be used alone, and produced with the whole width along switching layer Raw defect.According to some embodiments, electrode and/or non-switch layer (such as current control layer, nonlinear diode and/or Tunnel layer) contact with switching layer after execution ion implanting and/or be radiated switching layer edge in.This is for example for as boundary The destruction of any UBL that face is formed is probably beneficial.According to other embodiment, in hearth electrode before depositing in top electrode During upper deposition switching layer, ion implanting and/or radiation can be started.
Due to the switching layer typically ratio material of electrode less dense, therefore ion implanting and/or radiation access switch layer Edge can need less total energy, simultaneously still realize local or non local uniformity, this depend on ion and/or The Energy distribution in room.According to some embodiments, multiple ionic species, energy and/or dosage can be used for optimizing RRAM spy Property.For ion implanting and/or radiation more low-yield also make may below RRAM cross bar and/or around cmos circuit Unintentionally impact minimize, and decrease and block requirement in ion implanting and/or any of during radiation.
According to some embodiments, edge ion implanting and/or radiation are additionally operable to destroy because of by with other side Formula negatively affects the process of RRAM characteristic and the UBL that formed.The destruction of UBL can allow electrode and switching layer and/or non-open Close the more preferable contact between layer.
Figure 44 is the figure illustrating the simple R RAM structure according to some embodiments, and wherein switching layer includes ZnO nanorod. ZnO nanorod can be nucleocapsid, have other switching layers, such as HfOx and/or other current control layers, for example resistive layer, two Pole pipe layer and/or tunnel layer.For brevity, only show in the switching layer 4430 between hearth electrode 4420 and top electrode 4440 Go out ZnO nanorod.In this example, BE 4420 is the ZnO (AZO) of aluminium doping, and TE 4440 is Au.Injection process 4450 Can include being injected in ZnO nanorod through top electrode 4440, be injected into hearth electrode 4420 and/or be injected in substrate 110 Hydrogen ion.H ion can be used for producing O room in ZnO nanorod.(had or do not have with H ion doping ZnO nanorod Have thermal annealing/heat treatment, equably and/or anisotropically) switching characteristic of RRAM can be adjusted.Additionally, by top electrode Injection, any unintentionally barrier layer (UBL) of interface will be destroyed, thus providing good electrical characteristics.According to some enforcements Mode, higher-energy ion implanting can be used for destroying any UBL of the interface between nanometer rods and hearth electrode.According to one A little embodiments, can also use other ions in ion implanting, such as Zn, O, Ar, Xe, Al, Au, Ti, Hf, with its In the nanometer rods interface of his nanometer rods and along the doping of described nanometer rods interface and/or create defect and/or room.Real according to some Apply mode, multiple kinds of energy, dosage and/or grain kind can be used for optimizing the switching characteristic of RRAM.
According to some embodiments, several specific illustrative structures and process will be described.In some instances, TE 140 is There is the Pt of 50nm thickness, SL 130 is the hafnium oxide with 20nm thickness, BE 120 is Ti or W with 100nm thickness, and And substrate 110 is the silica on Si chip with 2000nm to 4000nm thickness.Alternative example is included for SL's 130 The titanium oxide of replacement, zirconium oxide, tungsten oxide, the combination of tantalum oxide, vanadium oxide or these oxides.The thickness of electrode TE and BE can To change, and can be made up of TiN, AlN, silicide, W, Ni, Au, Pt, Cr, V, Ta, Nb, Al, Cu or these combination. The following is the specific injection detail list being used together with said structure:
1. with 1 × 10 under 600KeV12/cm2To 5 × 1014/cm2Dosage argon;
2. with 1 × 10 under 600KeV12/cm2To 5 × 1014/cm2Dosage argon, then under 100KeV with 1 × 1014/cm2To 5 × 1016/cm2Dose oxygen implantation;
3. with 1 × 10 under 600KeV12/cm2To 5 × 1014/cm2Dosage argon, subsequently under 100KeV with 1 × 1014/cm2To 5 × 1016/cm2Dose oxygen implantation, and with 1 × 10 under 10KeV14/cm2To 5 × 1016/cm2Dosage note Enter hydrogen;
4. with 1 × 10 under 600KeV14/cm2To 5 × 1016/cm2Dosage argon;
5. with 1 × 10 under 150KeV12/cm2To 5 × 1014/cm2Dosage argon;
6. with 1 × 10 under 150KeV14/cm2To 5 × 1016/cm2Dosage argon;
7. with 1 × 10 under 1600KeV12/cm2To 5 × 1014/cm2Dosage xenon;
8. with 1 × 10 under 300KeV12/cm2To 5 × 1014/cm2Dosage xenon;
9. with 1 × 10 under 300KeV12/cm2To 5 × 1014/cm2Dosage xenon, subsequently under 100KeV with 1 × 1014/cm2To 5 × 1016/cm2Dose oxygen implantation;
10. with 1 × 10 under 1600KeV12/cm2To 5 × 1014/cm2Dosage xenon, subsequently under 100KeV with 1 × 1014/cm2To 5 × 1016/cm2Dose oxygen implantation;
11. under 1600KeV with 1 × 1010/cm2To 5 × 1013/cm2Dosage xenon;
12. under 650KeV with 1 × 1014/cm2To 5 × 1016/cm2Dosage Au;
13. under 650KeV with 1 × 1015/cm2To 5 × 1017/cm2Dosage Au, subsequently under 100KeV with 1 × 1014/cm2To 5 × 1016/cm2Dose oxygen implantation;And
14. under 400KeV with 1 × 1015/cm2To 5 × 1017/cm2Dosage Au, subsequently under 100KeV with 1 × 1014/cm2To 5 × 1016/cm2Dose oxygen implantation.
According to some embodiments, can by hydrogen injectant be added to above-mentioned example injectant detail list 1 to 3 and 5 to In any one of 14.In addition, the energy of any of above injectant detail list and dosage can change +/- 50%.
Figure 45 is the figure of the structure illustrating the multilayer RRAM device according to some embodiments.Structure 4500 shown in Figure 45 It is the example of the RRAM device of three vertical stackings.According to some embodiments, TE 4540,4542 and 4544 is by the Pt of 100nm Make;Switching layer (SL) 4530,4532 and 4534 is made up of the TiOx of 20nm;And Bes 4520,4522 and 4524 is by 100nm Ti make.Therefore, sandwich construction 4500 is by the SiO that for example can be formed on Si23 RRAM device compositions on 4510. Execution ion implanting 4550.According to some embodiments, inject Ar ion under 800KeV and/or 1600KeV.According to some its His embodiment, in H ion injecting structure 4500 under 100KeV and/or 200KeV.Ar ion be inert and not with appoint What material reaction.More properly, their presence in the material are used for creating defect and room.H can be reactive, and Substantial amounts of H ion deposits to SiO under 200KeV2In layer 4510.However, under 800KeV and 1600KeV most of Ar ion It is reside respectively in the 2nd RRAM device and the 3rd RRAM device.
Figure 46 A to Figure 46 H is to illustrate to be injected into knot as shown in figure 45 under various energy according to some embodiments The figure of the analog result of the Ar ion in structure and H ion.Show the scope of ion and the figure of collision accident.In ion range figure In (Figure 46 B, Figure 46 D, Figure 46 F and Figure 46 H), can pass through dosage (ion/cm2) with (atom/cm of vertical axes3)/(is former Son/cm2) being multiplied obtains the doping content ion/cm of ion3.At collision accident figure (Figure 46 A, Figure 46 C, Figure 46 E and Figure 46 G) In, vacancy concentration can pass through (dosage) (r) (108) with the number of vertical axes/(angstrom-ion) be multiplied approximate, wherein " r " It is the number of ions producing a room.In some cases it can be assumed that " r " is equal to 1, and in other cases, " r " is permissible It is assumed to 0.01 and depend on injection condition.We all of approximate in it is assumed that " r "=1.For " r " in addition to 1, Our dosage can correspondingly be adjusted.For example, if r=0.01, dosage can increase by 100 to realize supposing the phase of r=1 The vacancy concentration of same level.It can be seen that the Ar under 800KeV is only capable of penetrating 2 RRAM devices in Figure 46 A and Figure 46 B. It can be seen that the Ar under 1600KeV penetrates all 3 RRAM devices in Figure 46 C and Figure 46 D.In Figure 46 E to Figure 46 H In it can be seen that the H under 100KeV and 200KeV can penetrate all 3 RRAM devices.
Figure 47 A to Figure 47 B is to illustrate to be injected into structure as shown in figure 45 under 800KeV according to some embodiments In the analog result of Ar ion enlarged drawing.As can be seen that at Ar 800KeV, producing in the switching layer of the first two RRAM Raw room.First RRAM switching layer 4534 has the uniformity better than 20% in terms of vacancy concentration, and the 2nd RRAM switch Layer 4532 has the vacancy concentration uniformity better than 10%.Between device, vacancy concentration change is better than 10%.
Figure 48 A to Figure 48 C is to illustrate to be injected into structure as shown in figure 45 under 1600KeV according to some embodiments In the analog result of Ar ion enlarged drawing.As can be seen that the respective switching layer of RRAM1, RRAM2 and RRAM3 4534,4532 All there is the vacancy concentration change better than 20% with 4530.Ignore possible simulation illusion near switching layer border, at each In the switching layer of RRAM, the uniformity of vacancy concentration is better than 5%.The vacancy concentration change of device to device is better than 15%.
Figure 49 A to Figure 49 C be illustrate according to some embodiments under 200KeV by H ion implanting to as shown in figure 45 Structure in analog result enlarged drawing.The vacancy concentration uniformity of all 3 RRAM SL (4534,4532 and 4530) is better than 60%, and the uniformity of device to device is about 60% or more preferable.
Figure 50 is the figure of the sandwich construction illustrating the RRAM device according to some embodiments.Structure 5000 shown in Figure 50 It is the example of the RRAM device of three vertical stackings.According to some embodiments, TE 5044,5042 and 5040 is by the Al of 100nm Make;SL 5034,5032 and 5030 is made up of the TiOx 20nm of 20nm;And BE 5042,5040 and 5020 is by 100nm's Al makes.Note, in the configuration, electrode layer 5040 and 5042 is with acting on TE the and BE function of different RRAM devices. 3000nm SiO2Below RRAM device.Energy this structure of Ar ion implanting using 600KeV and 800KeV.Can also make Energy injection H ion with 100KeV and 200KeV.For simplicity, the RRAM structure of the stacking of Figure 50 illustrate only base This structure.Other layers can be included, and the Implantation Energy of ion (such as Ar, H, Xe, Ti, Hf) can be correspondingly adjusted, To increase the uniformity of the distribution of ion and room.
Figure 51 A to Figure 51 E is to illustrate to be injected into structure as shown in figure 50 under 600KeV according to some embodiments In the analog result of Ar ion figure.It can be seen that can be implemented in being better than in each device in Figure 51 A to Figure 51 E 10% vacancy concentration change.Ignore possible modeling interface illusion, vacancy concentration is better than 5%.Ar ion under 600KeV During injection, the change of device to device is better than 20%.
Figure 52 A to Figure 52 E is to illustrate to be injected into structure as shown in figure 50 under 800KeV according to some embodiments In the analog result of Ar ion figure.It can be seen that using 800KeV Ar ion implanting to tool in Figure 51 A to Figure 51 E By in the as shown in figure 50 3RRAM stacked body forming, it is possible to achieve the device and device room better than 20% in device Change in concentration.In some cases, it is possible to achieve the vacancy concentration better than 15% changes, and removes possible simulation illusion.
Figure 53 is the figure of the structure of RRAM device illustrating the vertical stacking according to some embodiments.Knot shown in Figure 53 Structure 5300 is the example of the vertical RRAM stacked body (VRRAM) with following 5 RRAM device:Vertically electrode 5320;Level Electrode 5340,5342,5344,5346 and 5448;And it is arranged on the switching layer 5330 between horizontally and vertically electrode.As Figure 53 Shown, switching layer 5330 is approximately perpendicular to substrate 5310.Horizontal electrode 5340,5340,5342,5344,5346 and 5348 it Between be electric insulation partition layer 5362,5364,5366 and 5368.In addition, being provided with insulating barrier below horizontal electrode 5348 5314, and it is provided with insulating barrier 5360 above horizontal electrode 5340.In some cases, CMOS electronic installation there may be In VRRAM substrate below 5310, and by such as W (tungsten), Mo (molybdenum), layer 5312 that the material of Hf and/or Ta is made can To be deposited between CMOS electronic installation and VVRAM, to stop ion and/or radiation from being penetrated in cmos layer.Electrode 5340, 5340th, 5342,5344,5346 and 5348 thickness can be in the range of 50nm to 200nm, and it is permissible to be dielectrically separated from nitride layer In the range of 50nm to 200nm.Heavy metal barrier layer 5312 can be in the range of 100nm to 2000nm.Total heap of VRRAM Stack can be in the range of about 550nm to 2200nm.In some cases, it can be about 4500nm.Approximately perpendicular to table The ion implanting 5350 in face can penetrate the edge of switching layer with vertical and/or non-perpendicular angle, with whole along switching layer Individual length produces uniform defect.When vertical electrode and horizontal electrode are in place, but before adding vertical connecting line, Ke Yishi Apply ion implanting and/or radiation.In some cases, ion note can be implemented after the connecting line for vertical electrode is in place Enter and/or radiate.In some other cases, ion implanting and/or spoke can be implemented after forming whole VRRAM structure Penetrate.In some other cases, it is possible to implement some for selective area ion implanting and/or radiation are sheltered.For selecting The mask material of selecting property region ion implanting and/or radiation can be the metal of such as Hf, Ta, W, Pb or Au.Real according to some Apply mode, selective area ion implanting and/or radiation can executes in some regions of switching layer, for example directly vertically with Region between horizontal electrode.In some cases, there may be with the VRRAM that can block ion implanting and/or radiation or The adjacent CMOS electronic installation of RRAM stacked body.Heavy metal can be used for hiding in selective area ion implanting and/or radiation Gear CMOS.According to some embodiments, it is possible to use other thick materials, such as polyimides.
Connection metal for vertically and horizontally electrode in VRRAM and 3D cross bar RRAM (also referred to as horizontal RRAM) Further detail below, see, for example, Park et al.,A Non-Linear ReRAM Cell with sub-1μA Ultralow Operating Current for High Density Vertical Resistive Memory(VRRAM), IEDM12- 501, (2012);Baek et al., Realization of Vertical Resistive Memory (VRRAM) using cost Effective 3D Process, IEDM 11-737 (2011), U.S. Patent Publication No. 2013/0009122;And the U.S. is special Profit number 8,525,247, each of which is both incorporated herein by reference.
Figure 54 is the RRAM device of the vertical stacking illustrating to be simplified for the purpose simulated according to some embodiments Structure figure.In this case, VRRAM structure 5400 includes the switching layer 5330 of the thick HfOx of 2500nm, be followed by by The SiO of 2000nm2The thick Si layer 5310 of the insulating barrier 5314 made, the layer 5312 being made up of the W of 2000nm and 10000nm.Will Ion implanting to the depth of about 4500nm, to maximize the uniformity of the vacancy concentration in HfOx switching layer 5330.W layer 5312 are used for stoping ion penetration in Si layer 5310, and Si layer 5310 could be included for controlling VRRAM and other store functions CMOS electronic installation.
Figure 55 A to Figure 55 B is to illustrate to be injected into structure as shown in figure 50 under 17.5MeV according to some embodiments In the analog result of Ar ion figure.Curve shows Ar ion penetration to the depth of about 4500nm.Along HfOx switching layer The vacancy concentration of 5330 2500nm length is better than 60% for Ar ion, and is better than at any zonule of local 2% change, wherein eliminates possible simulation illusion.W layer 5312 stops ion penetration electric to comprising CMOS effectively In the Si floor of road and electronic installation.
Figure 56 A to Figure 56 B is to illustrate to be injected into structure as shown in figure 50 under 540KeV according to some embodiments In the analog result of H ion figure.Curve shows Ar ion penetration to the depth of about 4500nm.Along HfOx switching layer 5330 The vacancy concentration of 2500nm length 20% is better than for H ion, and be better than 2% at any zonule of local Change, wherein eliminates possible simulation illusion.W layer 5312 stops ion penetration effectively to may comprise cmos circuit and electricity In the Si layer of sub-device.
Figure 57 is the RRAM illustrating the vertical stacking simplifying for the purpose simulated according to some other embodiments The figure of the structure of device.In this case, VRRAM structure 5700 includes the switching layer 5730 being made up of the TiOx of 2500nm. Insulating barrier 5314 is the SiO of 2000nm2, layer 5312 is the W of 2000nm;And layer 5710 is the Si of 10000nm.W layer 5312 or Similar heavy metal layer is used for the Si layer 5710 stoping ion penetration from entering to comprise cmos circuit and electronic installation.W layer 5312 Thickness can be according to ion energy in the range of about 500nm to 2000nm.Simulated conditions include the Ar ion under 17MeV With the H ion under 520KeV, it causes the ion range of about 4500nm.Ion range peak is located at the outside of switching layer 5730, So that the uniformity along the vacancy concentration of the length of switching layer maximizes so that VRRAM structure is in varying level There is between RRAM relatively low changeability.
Figure 58 A to Figure 58 D is to illustrate being injected into as Figure 57 under 17MeV and 520KeV respectively according to some embodiments The figure of the analog result of the Ar ion in shown structure and H ion.Room along the length gained of TiOx switching layer 5730 Concentration distribution is better than 40% for the change of Ar implantation homogeneity, and is better than about for the change of H Implantation Energy uniformity 30%, wherein eliminate possible simulation illusion.W layer 5312 stops ion penetration effectively in Si layer 5710, Si layer 5710 Could be included for controlling cmos circuit and the electronic installation of VRRAM memory stacking body and other store functions.
Figure 59 is to illustrate for studying the vacancy concentration in switching layer according to due to manufacturing the top electrode thickness change causing The structure of RRAM device of susceptibility figure.Structure 5900 includes the top electrode 9540 with variable thickness being made up of Pt. For this research, thickness changes 20% from 80nm, 100nm, 120nm.Switching layer 5930 is made up of the TiOx of 20nm, hearth electrode 5920 are made up of the Ti of 100nm, SiO2The thickness of layer 5910 is 2000nm.Ar ion be accelerated to 1600KeV energy so that Ar ion range or peak are in the outside of switching layer 5930.
Figure 60 A to Figure 60 C is to illustrate to be injected into tool as shown in figure 50 under 171600KeV according to some embodiments There is the figure of the analog result of Ar ion in the structure of top electrode 5940 of thickness of 80nm, 100nm and 120nm.Especially, scheme It is the analog result of 80nm, 100nm and 120nm that 60A, Figure 60 B and Figure 60 C respectively illustrates for TE (Pt) layer 5940 thickness. Find that the change of the vacancy concentration in the switching layer (5030) causing due to Pt top electrode (5940) thickness change is better than 5%.? In each switching layer, find that vacancy concentration change is better than 3%, wherein eliminate possible simulation illusion.
Figure 61 A and Figure 61 B shows the figure of the example shunk in the filament of room.They adapt from Chen et al., “Understanding of the Endurance Failure in Scaled HfO2-based 1T1R RRAM Through Vacancy Mobility Degradation " IEDM12-482,2012, it is incorporated herein by.In mistake In the case of crossing metal oxide switching layer, the uneven distribution of Lacking oxygen can cause the contraction of room filament.Contraction flow region 6134 and 6138 deteriorations that can cause vacancy mobility, thus cause the deterioration of RRAM.The deterioration of vacancy mobility causes more High resistivity and therefore higher Joule heat, it can make annealing of defects further, thus reduce causing LRS to become more electricity Resistive room number.Have Lacking oxygen, metal defect, oxonium ion, the conductive filament of neutral Lacking oxygen be formed at Syu et al. “Redox Reaction Switching Mechanism in RRAM Device With Pt/CoSiOTiN Structure ", IEEE ELECTRON DEVICE LETTERS, VOL.32, NO.4,2011 year April (hereinafter referred to as " Syu 2011 " discuss in), it is incorporated herein by.
Non-uniform Distribution in the direction of current flow of the switching layer between the electrode in horizontally and vertically RRAM may Cause the contraction of filament, this causes the deterioration of vacancy mobility.Then this deterioration of vacancy mobility causes the deterioration of LRS, This causes the deterioration of the reliability of RRAM.Further, since the vacancy concentration in the non-uniform Distribution in room that causes of forming process Change cause all switch parameters (such as HRS, LRS, V of RRAMsetAnd VresetAnd Vforming) changeability.With Vread(deposit Reservoir is asked whether to the voltage in HRS or LRS) associated electric current can also can comprise millions of to many trillion Change in single RRAM on the memory cell of RRAM unit and/or other RRAM devices.This changeability is not wish very much Hope.Random by the filament that forming process is formed, and follow connect local defect (as crystal boundary) and switching layer sink The path of long-pending defect.See, e.g., Raghavan et al., " Variability model for forming process in Oxygen vacancy modulated high-j based resistive switching memory devices ", Micro electronics Reliability 54 (2014) 2266-2271, it is incorporated herein by.Filament random The concentration in length and room can affect room mobility and increase RRAM voltage and current changeability, it is in turn Impact HRS, LRS, Vset、Vreset、Vread、Vforming.Additionally, the change of the length in room and mobility can also affect device Speed, such as the switch time between the storage state of HRS and LRS.In the filament that there may be contraction in vacancy concentration Kink can cause the relatively low mobility in room, and therefore cause longer switch time.Switching layer for 2nm to 20nm Thickness, about 10 under the electric field of the 1V/cm applying2cm2The mobility of/V-s causes the switch time of 2nS to 20nS (nanosecond).Carefully Silk can be partly nonconducting, thus causing HRS.In this case, non-conductive section can be in the switching layer thickness of 20nm Interior for 2nm to 4nm.Mobility can be 10cm2/ V-s, and switch time be tens nanoseconds.The mobility in room can also It is about 10-2cm2/ V-s or lower, this causes the switch time of microsecond.
Figure 62 A is the equally distributed figure illustrating the switch in the layer room according to many embodiments described herein. The uniform room distribution 6232 of Figure 62 A can be using for example with regard to Figure 34, Figure 35 A to Figure 35 D, Figure 36 A to Figure 36 D, Figure 37 A extremely The technology that Figure 37 D and Figure 38 A to Figure 38 D simulates and discusses is realizing.
Figure 62 B is the figure being shown in the room distribution being obtained before forming top electrode by known ion implantation technique.Figure The distribution in the room 6234 in 62B can be produced by known ion implantation technique, such as shown in Figure 33 A to Figure 33 D.Room 6234 is uneven in switching layer on the direction of current path with contraction, and this may cause the bad of vacancy mobility Change, and finally cause the deterioration of the reliability of RRAM.The contraction of room number can also cause relatively low vacancy mobility, and And therefore may negatively affect the switch time of RRAM.In addition, in known ion implanting scheme there is a case in which, Wherein the room being caused due to ion implanting and/or defect do not extend to hearth electrode.In this case, forming process is Formed necessary to filament.Can be seen that in one case from the analog result shown in Figure 33 A to Figure 33 D, room scope For 0 to 2.4.In order to be room/cm from vertical scales transforming3, (0-2.4) × dosage/angstrom, such as 1 × 1012Ion/cm2Agent Amount provides 0 to 2.4 × 1020/cm3Vacancy concentration, wherein it is assumed that each ion collision produce a room.Normal conditions are not So, but every 100 secondary ions collision cause a room.
Using the techniques described herein, the change of room distribution can remain less than 80%, and little in some cases In 20%.Vacancy concentration can be 2 × 1017/cm3To 5 × 1022/cm3In the range of.In some cases, it is possible to achieve 5 × 1021/cm3To 5 × 1022/cm3Scope.In the case of the another kind for reduced-current, it is possible to achieve 5 × 1020/cm3To 5 ×1021/cm3.For low-down current practice, micromicroampere and/or sub-micro ampere in the range of, it is possible to obtain 5 × 1019/cm3 To 5 × 1020/cm3.In the Gao Naanpei scope for ultra-low calorie RRAM, vacancy concentration can be 1 × 1017/cm3To 5 × 1019/cm3In the range of.
The room number of per unit volume is lower, and voltage is higher.Room can with " hole " in semiconductor substantially compared with, make The electrical conductivity obtaining filament is determined by the quantity in room and mobility.Therefore, higher defect density causes higher mobility.Note Meaning, this is contrary with conventional semiconductor fabrication techniques, in conventional semiconductor manufacturing technology, remains for high mobility defect Low.When defect density is big, ion and/or electronics are easier from defect skip to defect.As discussed in Syu 2011, deposit In Lacking oxygen, oxonium ion, electronics.Also there is non conductive metal defect and neutral room.Can be real as can be seen that in Figure 62 A There is in switching layer the continuous distributed of the vacancy concentration 6232 of change in concentration less than 80% now.RRAM parameter (such as HRS, LRS、Vset、VresetAnd Vread) changeability reduce, this is because vacancy concentration and mobility are uniform and not do not shrink. In some cases, vacancy concentration can be better than 60% in switch in the layer change, is better than 40% in some cases, at some In the case of be better than 20%, and in some cases be better than 10%.Referring to figure Figure 35 A to Figure 35 D, Figure 36 A to Figure 36 D, Figure 37 A It is used for single switch layer ion implanting to Figure 37 D and Figure 38 A to Figure 38 D.Very grave ion implanting produces the most uniform in switching layer Vacancy concentration.The uniform concentration in the room in switching layer can cause uniform vacancy mobility, and it not only reduces RRAM and opens Related parameter (such as HRS, LRS, Vset、VresetAnd Vread) changeability, but also between the storage state of HRS and LRS circulate Period reduces switch time and improves reliability.When vacancy concentration is 20% or higher, VsetAnd Vreset, HRS and LRS, Vread It is expected the changeability in single assembly with less than about 10% with the uniformity of switch time.Noted by uniform ion Enter and there is in the injection change of energy and dosage the change less than 10%, the change of RRAM unit to unit also should be about Better than 10%.In some cases, RRAM parameter variability can be better than 5% in single RRAM and unit in unit R RAM. In some cases, it is possible to achieve the RRAM parameter variability better than 2%.
Figure 63 A to Figure 63 D is to illustrate according to some embodiments for manufacturing the process of a part for RRAM device Simplify the figure of sequence.In Figure 63 A, ion passes through top electrode (TE) 6340 and injects.Implantation Energy is gone forward side by side enough to penetrate TE 6340 Enter switching layer (SL) or layer 6330 and enter hearth electrode (BE) 6320.Ion can be inert, such as Ar, He, Xe.For mistake Cross metal switch layer (such as TiOx, HfOx, TaOx, ZrOx, WOx), it is possible to use O ion or transition metal ions, also may be used To produce defect, room or ion using such as Ti, Ni, Hf, W, Zr, Ta, H and N, to provide for the conduction along filament Path.Spectrametry of Electron Exchange, tunnelling, space charge provide low resistance state (LRS) along defect/room, and when room has The high resistance state (HRS) of RRAM, during gap, is provided.When injecting ion by top electrode, some top electrode ionic bombardments arrive In switching layer, form more conductive layer in TE-SL interface.In Figure 63 B, generally removed by etching or part removes TE. In Figure 63 C, deposition non-linear layer or layer 6360 on SL 6330, with provide RRAM current-voltage characteristic non-linear, its Can be used for any array minimizing cross bar RRAM structure or the RRAM (for example, vertical RRAM (VRRAM)) for memory In sneak-out current.Non-linear layer 6360 can be for example in amorphous Si p and n doping diode layer or can lead to Cross the semiconductor material layer contacting and producing schottky barrier junction with metal or almost metal surface.Non-linear layer 6330 can be Tunnel layer, can by multiple layers with schottky junction, metal-oxide-semiconductor and/or tunnel knot and/or diode and The group of tunnel layer is combined into.In Figure 63 D, TE 6342 by redeposited on diode layer 6360 to complete RRAM unit.
Metal ion is struck effect in SL interface for allowing the contact of metalloid or adjacent diodes layer more The layer of high conductivity is important.For example, between the semiconductor junction of SL and such as schottky barrier junction and/or work as diode layer Doped with creating during p and n dopant in metalloid interface, this is probably important.Metalloid interface at SL can provide for example Low resistance contact.TE can be the TE of the 100nm to 200nm of thin (for example, the magnitude of 2nm to 50nm) or thicker.In TE- Metalloid interface that SL interface is formed and then can provide and subsequent non-linear layer (such as diode layer) good half Conductor contacts.In some cases, TE 6340 can be the thick magnitude of 1nm, in this case, after ion implantation, TE Do not need to be removed in the region contacting with SL.Depending on the doping of diode layer or semiconductor layer, diode layer and/or its His non-linear layer can be deposited on SL to form schottky barrier junction and/or almost ohm or ohm knot.Note, diode layer is There is the semiconductor layer of p and n doping, and semiconductor layer can only adulterate p or n).
Figure 64 A to Figure 64 B is to illustrate to be struck in SL layer by ion implanting by TE layer according to some embodiments The figure of ion.Figure 64 A show in the interface of SL layer 6430 after TE is removed be knocked into ion 6442.Figure 64 B The remaining TE 6444 being removed by part before injection and/or being retained by having very thin TE is shown.For example, TE Layer can be about one nanometer, and the TE above SL is not removed after ion implantation.Due to by the ion implanting of TE, The ion 6442 being knocked is derived from TE.For example, if TE is made up of W, clash into into ion by be W in TE-SL interface from Son, and some W ion are in SL layer.This can also be considered as similar in semiconductor Ohmic contact in a straightforward manner Alloying (wherein being driven in metal ion in semiconductor by heat and other chemical reactions), and in this case, pass through The Ar ion that for example injected by W TE of ion of TE injection with trajectory mode by W ion physical shock in SL.It is injected into SL Ar ion in 6430 and BE 6420 produces the defect contributing to filament formation and room, contributes to such as oxygen, room and electronics Ionic species spread in the electric field, drift about or jump.Diffusion, drift and/or jump can be due to the Joule heats of electric current flowing And occur, this is because power dissipation and electric current are multiplied by the square proportional of resistance.
Figure 65 A to Figure 65 B be illustrate according to some embodiments strike have the diode of deposition, semiconductor and/ Or the figure of the ion in the SL layer of tunnel layer.Figure 65 A illustrates the most of TE removing, and diode layer 6460 and SL 6430 Contact.In Figure 65 B, leave residual TE6444 of about 1nm, and DL 6460 be deposited on the TE of residual and by metal from Son 6442 strikes in SL 6430.In some cases, can be by surplus before deposition diode or semiconductor layer 6460 The other metal ion of remaining TE6444 injection and/or oxonium ion.
Figure 66 A to Figure 66 B be illustrate according to some embodiments strike have the diode of deposition, semiconductor and/ Or the figure of the ion in the SL layer of tunnel layer and TE.As the situation of Figure 64 A to Figure 64 B and Figure 65 A to Figure 65 B, Figure 66 A illustrates In the interface of SL layer 6430 after TE has been removed by be knocked into ion 6442, and Figure 66 B illustrates remaining residual TE 6444.In each case, top electrode 6462 is deposited on diode and/or semiconductor layer 6460.Diode and/or Semiconductor layer 6460 can provide the non-linear current-voltage characteristic for RRAM, and this advantageously reduces high density arrays structure The sneak-out current between adjacent R ram cell in (the such as cross bar of RRAM unit and 3D VRRAM stacked body).Metal TE 6462 can form schottky junction with diode/semiconductor layer 6460.Metalloid interface between SL 6430 and DL 6460 can There is metal ion to clash into, and the TE metal remaining can also form Schottky contacts, MOS contact and/or Ohmic contact, this Doped level depending on diode/semiconductor layer.
Figure 67 is the simplified flowchart of the process injected by TE according to some embodiments.In frame 6710, BE sinks Amass on substrate.In frame 6712, deposit SL.In frame 6714, deposit a TE.In frame 6716, ion is implanted through TE.In frame 6718, according to TE thickness, TE can be left in place, or can completely or partially remove TE.In frame 6720 In, deposit diode/semiconductor layer.In frame 6722, RRAM unit is completed with the deposition (or redeposited) of TE.Between SL and DL Two functions of metalloid interfacial separation, SL provides the establishment in room and buries in oblivion to produce HRS and LRS, and diode/half Conductor layer is used for providing the non-linear current-voltage characteristic of RRAM unit.
According to some embodiments, described shock enters ion technology and can apply to vertical RRAM.In such as Figure 53 institute In the VRRAM showing, vertical electrode 5320 can be initially thin conforma layer, such as W, TiN, Mo, Al, Ni etc., and it can pass through For example sputtering, ald are depositing.Then with the non-perpendicular angle execution ion implanting for example with regard to afer rotates, its Metal ion can be clashed into the interface into SL 5330.In the case of very thin initial vertical electrode 5320, for example about 1nm, electrode can be left in place, and diode/semiconductor layer is deposited as conformal with SL 5330, and is followed by full release Electrode 5320.
Present patent application is related to property and the operation that some theories carry out interpreting means, but should understand that such theoretical being based on is worked as Front understanding, and do not affect the practical operation of disclosed device, though the development certification theory in future incorrect be also as This.Patent specification further relates to the number range of parameter, and it is to be understood that still existing with the unsubstantiality deviation of these scopes In the spirit of disclosed progress.
Although for the sake of clarity describe in detail foregoing teachings, it will be obvious that without departing from its principle In the case of can carry out some change and change.It should be noted that process described herein is realized in presence and the many of equipment is replaced Select mode.Therefore, present embodiment is considered as illustrative and not restrictive, and operative body described herein is not It is limited to details given herein, it can be modified in scope of the following claims and equivalency range.

Claims (62)

1. a kind of resistive random access memory device, including:
First electrode;
Second electrode;And
Switch region, described switch region and includes one or more migrations between described first electrode and described second electrode Rate enhancement mode path structure, one or more Enhanced mobility type path structure relevant positions in described switch region Place extend and be configured to provide the enhanced mobility of charged species and have be applied to described first electrode and Switching voltage between described second electrode and the corresponding resistor that changes,
Wherein, described Enhanced mobility type path structure includes the damage in described switch region being caused by ion implanting, institute State ion implanting to include being deposited on the ion outside described switch region through after described switch region.
2. resistive memory device according to claim 1, wherein, described Enhanced mobility type path structure passes through institute State ion implanting to be formed, rather than formed by applying to be equal to or more than the voltage of breakdown voltage across described switch region.
3. resistive memory device according to claim 1, including substrate, wherein, described first electrode is provided in Described surface and the hearth electrode below described switch region, and described second electrode is provided on described switch region The top electrode of side.
4. resistive memory device according to claim 3, wherein, used in described ion implanting great majority from Son is deposited on below described switch region.
5. resistive memory device according to claim 4, wherein, used in described ion implanting great majority from Son is deposited on below described hearth electrode.
6. resistive memory device according to claim 3, wherein, at least some of described damage is by by institute State what the collision accident that ion implanting causes caused, and most of which collision accident occurs below described switch region.
7. resistive memory device according to claim 3, wherein, used in described ion implanting injection from Main peak in the distribution profile of son is below described switch region.
8. resistive memory device according to claim 3, wherein, described ion implanting is whole described switch region Substantial amounts of collision accident is caused on thickness.
9. resistive memory device according to claim 1, including between described switching layer and described first electrode Barrier layer, described barrier layer is functionally destroyed by described ion implanting.
10. resistive memory device according to claim 1, including between described switch region and described second electrode Barrier layer, described barrier layer is functionally destroyed by described ion implanting.
11. resistive memory device according to claim 1, wherein, described ion implanting passes through described first electrode With described second electrode.
12. resistive memory device according to claim 11, wherein, described second electrode is on described switch region Side, and include, through it, Part I of described ion implanting and the thickening subsequently forming occur.
13. resistive memory device according to claim 1, including the underlying substrate with principal plane upper surface, its In, between the first planar interface between described first electrode and described switch region and described switch region and described second electrode Second planar interface is not parallel with the described principal plane upper surface of described underlying substrate.
14. resistive memory device according to claim 13, wherein, described first planar interface and described second flat Face interface is approximately perpendicular to the described principal plane upper surface of described underlying substrate.
15. resistive memory device according to claim 14, wherein, in described ion implanting, described ion master Will be along the direction injection of the described principal plane upper surface perpendicular to described underlying substrate.
16. resistive memory device according to claim 15, including in described switch region by described ion implanting The defect causing, described defect is across the plane approximation perpendicular to described first planar interface and described second planar interface equably Distribution.
17. resistive memory device according to claim 14, wherein, the main edge of described ion implanting is underlying with described The described principal plane upper surface of substrate direction at an acute angle.
18. resistive memory device according to claim 13, including at least one of the following:I () is formed at institute The barrier layer stated between switch region and described first electrode and functionally destroyed by described ion implanting, and (ii) formed The barrier layer between described switch region and described second electrode and functionally destroyed by described ion implanting.
19. resistive memory device according to claim 1, wherein, described switch region is by transition metal oxide material Material is formed.
20. resistive memory device according to claim 1, wherein, the ion being injected is selected from:Ag、Ti、Ta、Hf、 O, N, Au, Fe, Ni, Ti, Ta, V, Pb, Bi, W, H, Ar, C, Si, B, P, Ga, As, Te, Al, Zn, In and Sn.
21. resistive memory device according to claim 1, wherein, described switch region is former by described ion implanting Position is formed.
22. resistive memory device according to claim 21, wherein, described injection is included O +ion implanted to institute State in switch region, wherein, described switch region is initially formed by one or more of transition metal materials.
23. resistive memory device according to claim 1, wherein, described switch region has built-in stress, and institute State the described stress that ion implanting increases in described switch region, and promote the establishment of described Enhanced mobility type path structure.
24. resistive memory device according to claim 23, wherein, described switch region include causing described built-in should At least one of the thick atom mass atoms of power and mismatched material layer.
25. resistive memory device according to claim 1, wherein, described Enhanced mobility type path structure is at least Partly formed by the collision accident in described ion implanting, described collision accident is substantially uniform in entirely described switch region Ground distribution.
A kind of 26. methods manufacturing resistive random access memory device, including:
Form first electrode;
Form switching layer;
Form second electrode so that described switching layer is between described first electrode and described second electrode;And
Carry out ion implanting, being partly into and leave described switching layer, thus of ion described in described ion implanting Promote to form one or more Enhanced mobility type path structures, one or more Enhanced mobility type path structures There is provided charged species enhanced mobility so that between described first electrode and described second electrode by described switching layer Resistance can increase and reduce by applying switching voltage between described first electrode and described second electrode.
27. methods according to claim 26, wherein, the one or more Enhanced mobility type path structures of described formation Caused by described ion implanting, rather than apply to be equal to or more than the breakdown voltage of described switching layer to described switching layer Voltage cause.
28. methods according to claim 26, wherein, described first electrode is in surface and in described switching layer The hearth electrode of lower section, and described second electrode is the top electrode above described switching layer.
29. methods according to claim 28, wherein, enter in described ion implanting the great majority of described switching layer from Son leaves described switching layer.
30. methods according to claim 28, wherein, described ion implanting causes collision accident, and most of which Collision accident occurs at the position below described switching layer.
31. methods according to claim 26, wherein, described ion implanting is functionally destroyed and is formed at described switching layer In barrier layer and described first electrode between and the barrier layer that is formed between described switching layer and described second electrode extremely Few one.
32. methods according to claim 26, wherein, the first plane circle between described first electrode and described switching layer The second planar interface between face and described switching layer and described second electrode is approximately perpendicular to the principal plane upper table of underlying substrate Face.
33. methods according to claim 32, wherein, the injection of described ion is mainly perpendicular to described underlying substrate On the direction of described principal plane upper surface.
34. methods according to claim 32, wherein, the injection of described ion functionally destroys and is formed at described switch In barrier layer between layer and described first electrode and the barrier layer that is formed between described switching layer and described second electrode At least one.
A kind of 35. resistive random access memory devices, including:
First electrode;
Second electrode;And
Switch region, described switch region and includes one or more migrations between described first electrode and described second electrode Rate enhancement mode path structure, one or more Enhanced mobility type path structure relevant positions in described switch region Place extend and be configured to provide the enhanced mobility of charged species and have be applied to described first electrode and Switching voltage between described second electrode and change across one or more path structures corresponding resistors;
Wherein, described Enhanced mobility type path structure include in described switch region by guiding to the electricity in described switch region The substantially uniform damage that magnetic radiation causes.
36. resistive memory device according to claim 35, wherein, described electromagnetic radiation is included selected from as Types Below Radiation:X-ray, gamma ray, UV light, visible ray and IR light.
37. resistive memory device according to claim 35, wherein, described electromagnetic radiation includes energy in about 3KeV Gamma ray to about 100KeV or X-ray.
38. resistive memory device according to claim 37, wherein, described electromagnetic radiation includes energy about X-ray in the range of 20KeV to about 30KeV.
39. resistive memory device according to claim 38, wherein, described electromagnetic radiation includes energy about X-ray in the range of 25KeV to about 27KeV.
40. resistive memory device according to claim 35, wherein, described damage is through described in described radiation Pass through what described radiation caused in situ after first electrode and at least one of second electrode and described switching layer.
41. resistive memory device according to claim 40, described before being additionally included in described electromagnetic radiation The multiple switch layer being formed in stacked form above two electrodes and electrode.
42. resistive memory device according to claim 41, wherein, described damage is by electromagnetic radiation simultaneously extremely Formed in few three switching layers.
43. resistive memory device according to claim 35, also include being formed at the spoke below described first electrode Penetrate barrier layer, described radiant barrier is configured to protect region below described barrier layer from exposure to described electromagnetism spoke Penetrate.
44. resistive memory device according to claim 43, wherein, described radiant barrier by selected from W, Ta, Bi, Material in Au and Pb is made.
45. resistive memory device according to claim 35, including at least one of the following:I () is formed at institute The barrier layer stated between switch region and described first electrode and functionally destroyed by described electromagnetic radiation, and (ii) formed The barrier layer between described switch region and described second electrode and functionally destroyed by described electromagnetic radiation.
46. resistive memory device according to claim 35, including the underlying substrate with major planar surface, its In, between the first planar interface between described first electrode and described switch region and described switch region and described second electrode Second planar interface is approximately perpendicular to the described principal plane upper surface of described underlying substrate.
A kind of 47. methods manufacturing resistive random access memory device, including:
Form first electrode;
Form switch region;
Form second electrode so that described switch region is located between described first electrode and described second electrode;And
By guiding to damage described switch region to described switch region energy, thus promote to form one or more migrations Rate enhancement mode path structure, one or more Enhanced mobility type path structures provide the enhanced migration of charged species Rate is so that the resistance by described switching layer between described first electrode and described second electrode can pass through described first Apply switching voltage between electrode and described second electrode to increase and to reduce.
48. methods according to claim 48, wherein, described damage causes collision accident, and most of which collision Event occurs at the position in addition to described switch region.
49. methods according to claim 47, wherein, the energy that guided is ion, electronics, X-ray, gamma ray, One of light including UV and IR light and ultrasonic wave or more kinds of forms.
50. methods according to claim 47, wherein, the energy being guided passes through at least a portion of described first electrode At least a portion with described second electrode.
51. methods according to claim 50, wherein, the energy of described guiding functionally destroys and is formed at described switch In barrier layer between area and described first electrode and the barrier layer that is formed between described switch region and described second electrode At least one.
A kind of 52. resistive random access memory devices, including:
First electrode;
Second electrode;
Switch region, described switch region and includes multiple Enhanced mobility types between described first electrode and described second electrode Path structure, corresponding position in described switch region for the plurality of Enhanced mobility type path structure extends and is configured Become to provide the enhanced mobility of charged species and have with being applied between described first electrode and described second electrode Switching voltage and the corresponding resistor across described path structure that changes;
Wherein, described Enhanced mobility type path structure includes by being launched into, passes through and extend beyond being drawn of described switch region Damage in the described switch region that the energy led causes.
53. resistive memory device according to claim 52, wherein, described Enhanced mobility type path structure includes By for ion, electronics, X-ray, gamma ray, include one of the light of UV and IR light and ultrasonic wave or more kinds of forms The described switch region that causes of energy of guiding in damage.
54. resistive memory device according to claim 52, wherein, described Enhanced mobility type path structure includes Damage in the described switch region being caused by the ion implanting entering in described switch region.
55. resistive memory device according to claim 52, wherein, described Enhanced mobility type path structure includes Damage in the described switch region being caused by the energy of the guiding at least one form in X-ray, gamma ray and electronics Wound.
56. resistive memory device according to claim 52, wherein, described Enhanced mobility type path structure includes Damage in the described switch region being caused by the energy of the guiding of the form of the radiation for having the wavelength longer than X-ray.
A kind of 57. resistive random access memory devices, including:
First electrode;
Second electrode;And
Switch region, described switch region and includes one or more migrations between described first electrode and described second electrode Rate enhancement mode path structure, one or more Enhanced mobility type path structure relevant positions in described switch region Place extend and be configured to provide the enhanced mobility of charged species and have be applied to described first electrode and Switching voltage between described second electrode and change across one or more path structures corresponding resistors;
Wherein, described Enhanced mobility type path structure is included by the energy being directed in described switch region in about 3KeV extremely Substantially uniform damage in the described switch region that electromagnetic radiation in the range of about 100KeV causes.
A kind of 58. resistive random access memory devices, including:
The stacked body of first electrode;
The stacked body of second electrode;
And the stacked body of switch region, each of described switch region is in one of the described first electrode of corresponding pairs and institute State between one of second electrode;
Wherein, each of described switch region include one or more Enhanced mobility type path structures, one or More Enhanced mobility type path structures are configured to supply the enhanced mobility of charged species and have with applying Switching voltage and the corresponding resistor across described path structure that changes;And
Wherein, described Enhanced mobility type path structure includes by injecting and by the stacked body of described switch region simultaneously Damage in the described switch region that the energy of the guiding of described switch region causes.
59. resistive memory device according to claim 58, wherein, the described damage that caused by the energy of described guiding Wound is caused by the energy of the guiding of the form for ion implanting.
60. resistive memory device according to claim 58, wherein, the described damage that caused by the energy of described guiding Wound is caused by the energy of the guiding of the form for the radiation in the energy range of 1KeV to 100KeV.
61. resistive memory device according to claim 58, wherein, the stacked body of described switch region includes 2 extremely 20 switch regions.
62. resistive memory device according to claim 58, including the array of spaced stacked body, each Described stacked body includes first electrode and second electrode and switch region, and wherein, described spaced stacked body passes through electricity Line interconnects and forms integrated memory structure.
CN201580027848.6A 2015-01-05 2015-08-18 Resistive random-access memory with implanted and radiated channels Pending CN106463340A (en)

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