CN106449737A - Low-contact resistor type GaN-based device and manufacturing method thereof - Google Patents
Low-contact resistor type GaN-based device and manufacturing method thereof Download PDFInfo
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- CN106449737A CN106449737A CN201611087793.0A CN201611087793A CN106449737A CN 106449737 A CN106449737 A CN 106449737A CN 201611087793 A CN201611087793 A CN 201611087793A CN 106449737 A CN106449737 A CN 106449737A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 5
- 230000004888 barrier function Effects 0.000 claims abstract description 46
- 229910002704 AlGaN Inorganic materials 0.000 claims abstract description 30
- 238000002161 passivation Methods 0.000 claims abstract description 23
- 238000005530 etching Methods 0.000 claims abstract description 22
- 239000000758 substrate Substances 0.000 claims abstract description 20
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 claims description 62
- 238000000034 method Methods 0.000 claims description 41
- 229910021529 ammonia Inorganic materials 0.000 claims description 31
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 30
- 239000001257 hydrogen Substances 0.000 claims description 30
- 229910052739 hydrogen Inorganic materials 0.000 claims description 30
- 229920002120 photoresistant polymer Polymers 0.000 claims description 27
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 20
- 229910052751 metal Inorganic materials 0.000 claims description 20
- 239000002184 metal Substances 0.000 claims description 20
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 18
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 18
- 229910052733 gallium Inorganic materials 0.000 claims description 18
- 229910052710 silicon Inorganic materials 0.000 claims description 18
- 239000010703 silicon Substances 0.000 claims description 18
- 238000005036 potential barrier Methods 0.000 claims description 11
- 238000005566 electron beam evaporation Methods 0.000 claims description 10
- 229910052757 nitrogen Inorganic materials 0.000 claims description 10
- 230000008569 process Effects 0.000 claims description 10
- 229910015844 BCl3 Inorganic materials 0.000 claims description 8
- 239000007789 gas Substances 0.000 claims description 8
- FAQYAMRNWDIXMY-UHFFFAOYSA-N trichloroborane Chemical compound ClB(Cl)Cl FAQYAMRNWDIXMY-UHFFFAOYSA-N 0.000 claims description 8
- 238000001459 lithography Methods 0.000 claims description 7
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- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 7
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 claims description 6
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 6
- 229910052593 corundum Inorganic materials 0.000 claims description 6
- 239000012535 impurity Substances 0.000 claims description 6
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 6
- 238000010348 incorporation Methods 0.000 claims description 5
- 230000003628 erosive effect Effects 0.000 claims description 4
- 229910052759 nickel Inorganic materials 0.000 claims description 4
- 238000012360 testing method Methods 0.000 claims description 4
- 229910052737 gold Inorganic materials 0.000 claims description 3
- 229910052742 iron Inorganic materials 0.000 claims description 3
- 239000002243 precursor Substances 0.000 claims description 3
- 229910052738 indium Inorganic materials 0.000 claims description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 2
- 230000004907 flux Effects 0.000 claims 7
- 239000007769 metal material Substances 0.000 claims 2
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- 238000010899 nucleation Methods 0.000 claims 2
- 230000003139 buffering effect Effects 0.000 claims 1
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- 238000000151 deposition Methods 0.000 claims 1
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- 230000037431 insertion Effects 0.000 abstract 1
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 16
- 238000001259 photo etching Methods 0.000 description 15
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 8
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- 238000001312 dry etching Methods 0.000 description 6
- 229910052594 sapphire Inorganic materials 0.000 description 6
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- 239000004065 semiconductor Substances 0.000 description 6
- 229910021642 ultra pure water Inorganic materials 0.000 description 6
- 239000012498 ultrapure water Substances 0.000 description 6
- 238000001704 evaporation Methods 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 238000000137 annealing Methods 0.000 description 4
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- 229910052782 aluminium Inorganic materials 0.000 description 3
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- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
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- 238000012937 correction Methods 0.000 description 2
- 239000008367 deionised water Substances 0.000 description 2
- 229910021641 deionized water Inorganic materials 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000004050 hot filament vapor deposition Methods 0.000 description 2
- JEIPFZHSYJVQDO-UHFFFAOYSA-N iron(III) oxide Inorganic materials O=[Fe]O[Fe]=O JEIPFZHSYJVQDO-UHFFFAOYSA-N 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000004223 radioprotective effect Effects 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/452—Ohmic electrodes on AIII-BV compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
The invention discloses a low-contact resistor type GaN-based device and a manufacturing method thereof, which mainly solve the problem that a source-drain contact resistance and a grid leak stray capacitance of an existing device are excessive. The device comprises a substrate layer (1), a nucleating layer (2), a buffer layer (3), a second channel region (4), a back barrier layer (5), a first channel region (6), an insertion layer (7), an AlGaN/ InAlN barrier layer (8), and a GaN cap layer (9) from bottom to top, wherein a source electrode (10), a leakage electrode (11) and a groove with the etching depth deepened to the back barrier layer are arranged on/in the GaN cap layer; passivation layers (12) are arranged on an inner wall of the groove and a region of the GaN cap layer except for the leakage and source electrodes; a gate electrode (13) is arranged on the passivation layer in the groove. According to the low-contact resistor type GaN-based device provided by the invention, the ohmic contact resistance is reduced, the grid leak gap is increased, the grid leak feedback capacitance is reduced, the working frequency of the device is improved, and the low-contact resistor type GaN-based device can be applied in a communication, satellite navigation and radar system and a base station system.
Description
Technical field
The invention belongs to microelectronics technology, more particularly to a kind of low contact resistance type GaN base device, can be used to lead to
News, satellite navigation, in radar system and base station system.
Background technology
With the raising of scientific and technological level, existing first and second generation semi-conducting material cannot meet higher frequency, higher
The demand of power electronic device, and the electronic device based on nitride semi-conductor material can then meet this requirement, greatly improve
Device performance so that third generation semi-conducting material with GaN as representative has extensive in the manufacture of microwave and millimeter wave device
Application.GaN is a kind of new wide bandgap compound semiconductor material, with excellent not available for many silicon-based semiconductor material
Characteristic, such as broad stopband width, high breakdown electric field, and higher thermal conductivity, and corrosion-resistant, radioprotective etc..Enter twentieth century
After the nineties, due to the breakthrough of p-type doping techniques and the introducing of nucleating layer technology so that GaN material is rapidly progressed.
GaN material can form AlGaN/GaN heterojunction structure, and this heterojunction structure not only can obtain very high electron transfer at room temperature
Rate, and high peak electron speed and saturated electrons speed, and can obtain more heterogeneous than second filial generation compound semiconductor
The higher two-dimensional electron gas of knot.These advantages cause AlGaN/GaN HEMT in microwave and millimeter wave frequency
Significantly beyond GaAs based hemts and InP-base HEMT in terms of the high-power, high efficiency of section, wide bandwidth, low-noise performance.
However, with the increase of operating frequency, impact of the feedback capacity between grid leak to device frequency characteristic is increasingly bright
Aobvious；Traditional heterojunction structure be difficult to by source and drain Ohmic contact to lower break through be current urgent problem.
At present, at home and in the world, grid width is mainly reduced, using T-shaped grid, so that source and drain spacing is reduced, improves device
Frequency characteristic, these methods include：
Masataka Higashiwaki in 2008 et al. is using high Al contents AlGaN potential barrier and Cat-CVD growth SiN
The measures such as passivation layer, the AlGaN/GaN HEMT device of a length of 60nm of grid in 4H-SiC Grown, wherein 2DEG face is close
Spend for 2 × 1013cm-2, the 2DEG mobility of device is 1900cm2/ (V s), and saturation current is 1.6A/mm, fTAnd fmaxRespectively
190GHz and 241GHz is reached.List of references Masataka Higashiwaki, Takashi Mimura, Toshiake
Matsui Ga N-based FETs using Cat-CVD Si N passivation for millimeter-wave
applications Thin Solid Film 516(2008)548-552.
2010, Jinwook W.Chung et al. reported the AlGaN/GaN HEMT that maximum oscillation frequency reaches 300GHz
Device.The device is using T-shaped slot grid structure, a length of 60nm of grid, and drain-source distance is 1.1 μm.List of references Chung J W, Hoke
W E,Chumbes E M,et al.AlGaN/GaN HEMT with 300-GHz[J].Electron Device Letters,
IEEE,2010,31(3):195-197.
In sum, currently, the making of millimeter wave GaN base device is all the method using grid width is reduced in the world, to subtract
Little source and drain spacing, improves the frequency characteristic of device, but has the following disadvantages：
One is that reducing grid width can cause the supportive of grid to be deteriorated after device gate length is less than 100nm；
Two is that impact of the parasitic capacitance to device frequency characteristic can strengthen with the reduction of grid leak spacing.
Content of the invention
Present invention aims to the shortcoming of above-mentioned prior art, proposes a kind of low contact resistance type GaN base device
And preparation method thereof, to reduce source-drain contact resistance, gate-drain parasitic capacitances, device frequency characteristic in high frequency is improved, obtain
High performance millimetric wave device.
The technical scheme is that and be achieved in that：
Low contact resistance type GaN base device, includes substrate layer, nucleating layer, cushion, the second channel region, the back of the body from bottom to top
Barrier layer, the first channel region, interposed layer, AlGaN/InAlN barrier layer and GaN cap, GaN cap is provided with source electrode and electric leakage
Pole, it is characterised in that：There is etching depth in GaN cap to the groove for carrying on the back barrier layer, the inwall of groove and GaN cap remove source electrode
Passivation layer is provided with region outside drain electrode, the passivation layer in groove is provided with gate electrode, forms test formula grid structure.
Preferably, the width of the groove is 0.2 μm -1 μm.
Preferably, the etching depth of the groove is 25nm-100nm.
Preferably, described barrier layer is made up of AlGaN/InAlN layer, wherein, the thickness of AlGaN layer is 3nm-
50nm, Al group is divided into 5%-100%；The thickness of InAIN layer is 5%-25% for the content of 3nm-20nm, In component.
For achieving the above object, the method that the present invention makes low contact resistance type GaN base device, comprises the steps：
1) on substrate base, using MOCVD technique, nucleating layer, cushion, the second channel region, back of the body potential barrier are grown successively
Layer, the first channel region, AlN interposed layer, AlGaN/InAlN barrier layer and GaN cap；
2) ICP equipment is adopted in GaN cap, etching table top is to carrying on the back barrier layer；
3) source electrode and drain electrode patterns are made by lithography in GaN cap, using electron beam evaporation process, in source electrode and leakage
Metal ohmic contact is evaporated in electrode pattern area；
4) photoresist being smeared in GaN cap and make grooved area by lithography, then using ICP equipment, litho pattern region is entered
Row dry etching, forms smooth chamfered region；
5) using ALD equipment, atomic layer is carried out in the region in addition to source electrode and drain electrode of inwall and GaN cap of groove
Al2O3The deposit of medium, forms Al2O3Passivation layer；
6) electron beam evaporation process is adopted, on passivation layer in groove, gate electrode metal layer is evaporated, photoresist is removed, is completed
The making of device.
The present invention is had the advantage that compared with prior art：
1. the present invention is designed by the epitaxial structure of many raceway grooves, is effectively reduced sheet resistance and the contact electricity of epitaxial structure
Resistance, improves the frequency characteristic of device.
2. the present invention is designed by the groove structure of test formula, is effectively shortened source and drain spacing, is solved source and drain spacing
The critical technological point for reducing, greatly improves the frequency characteristic of device.
3. the present invention is increased the distance between grid leak, is substantially reduced traditional device using the grid-type device architecture of test formula
The gate-drain parasitic capacitances of part, greatly advance the practicalization of millimetric wave device.
Description of the drawings
Fig. 1 is the cross-sectional view of low contact resistance type GaN base device of the present invention；
Fig. 2 is the fabrication processing figure of low contact resistance type GaN base device.
Specific embodiment
With reference to Fig. 1, the structure of device of the present invention includes substrate layer 1, nucleating layer 2, cushion 3, the second channel region 4, back of the body gesture
Barrier layer 5, the first channel region 6, interposed layer 7, AlGaN/InAlN barrier layer 8, GaN cap 9, source electrode 10, drain electrode 11, passivation
Layer 12 and gate electrode 13.Wherein substrate layer 1, nucleating layer 2, cushion 3, the second channel region 4, the back of the body barrier layer 5, the first channel region 6,
Interposed layer 7, AlGaN/InAlN barrier layer 8 and GaN cap 9 are arranged from bottom to top；The middle part of GaN cap 9 is to down to back of the body barrier layer
5 are carved with groove；Source electrode 10 and drain electrode 11 are located at the surface of GaN cap 9, and are distributed in groove both sides；Passivation layer 12 is located at
On the region of the inwall of groove and GaN cap in addition to source electrode and drain electrode；Gate electrode 13 be located at groove in passivation layer 12 it
On.The width of groove is 0.2 μm -1 μm, and recess etch depth is 25nm-100nm；Barrier layer from the thickness of AlGaN layer is
3nm-50nm, barrier layer is 3nm-20nm from the thickness of InAIN layer.
With reference to Fig. 2, the technique for making device of the present invention provides following four respectively according to distinct device, different steps of realizing
Plant embodiment.
Embodiment one, makes recess width on a sapphire substrate and is 0.2 μm, and recess etch depth is 25nm, barrier layer
The low contact resistance type GaN base device being made up of AlGaN layer and GaN cap.
Step 1, on sapphire substrate, using MOCVD technique, growing AIN nucleating layer.
Sapphire substrate temperature is reduced to 500 DEG C, it is 1000sccm that holding growth pressure is 40Torr, hydrogen flowing quantity,
Ammonia flow is 600sccm, is passed through silicon source of the flow for 4sccm to reative cell, and growth thickness is for 5nm's on a sapphire substrate
Low temperature AI N shell；
Again growth temperature is increased to 940 DEG C, it is 1000sccm that holding growth pressure is 40Torr, hydrogen flowing quantity, ammonia
Flow is 1000sccm, is passed through silicon source of the flow for 4sccm to reative cell, and on low temperature AI N nucleating layer, regrowth thickness is
The high-temperature AlN layer of 60nm；
The low temperature AI N shell is collectively forming AlN nucleating layer with high-temperature AlN layer.
Step 2, on AlN nucleating layer, grows GaN cushion.
Growth temperature is increased to 940 DEG C, it is 1000sccm that holding growth pressure is 40Torr, hydrogen flowing quantity, ammonia flow
Measure as 1000sccm, to reative cell and meanwhile be passed through flow for the gallium source of 60sccm and flow for 10sccm source of iron, in nucleating layer
Upper growth thickness is 1 μm of Fe2O3 doping GaN cushion.
Step 3, on the buffer layer, grows the second channel region.
Growth temperature is increased to 940 DEG C, it is 1000sccm that holding growth pressure is 40Torr, hydrogen flowing quantity, ammonia flow
Measuring as 1000sccm, gallium source of the flow for 60sccm being passed through to reative cell, growth thickness is second channel region of GaN of 10nm.
Step 4, on the second channel region, growth back of the body barrier layer.
Growth temperature is increased to 960 DEG C, it is 1000sccm that holding growth pressure is 40Torr, hydrogen flowing quantity, ammonia flow
Measuring as 1000sccm, gallium source of the flow for 60sccm is passed through to reative cell, is passed through silicon source of the flow for 4sccm to reative cell, mixes
Enter concentration for 5 × 1018/cm3Si impurity, growth thickness for 20nm back of the body barrier layer.
Step 5, on back of the body barrier layer, grows the first channel region.
Growth temperature is increased to 960 DEG C, it is 1000sccm that holding growth pressure is 40Torr, hydrogen flowing quantity, ammonia flow
Measuring as 1000sccm, gallium source of the flow for 60sccm being passed through to reative cell, growth thickness is first channel region of GaN of 20nm.
Step 6, on the first channel region, growing AIN interposed layer.
Growth temperature is increased to 960 DEG C, it is 1000sccm that holding growth pressure is 40Torr, hydrogen flowing quantity, ammonia flow
Measuring as 1000sccm, silicon source of the flow for 4sccm being passed through to reative cell, growth thickness is the AlN interposed layer of 0.2nm.
Step 7, on AlN interposed layer, grows AlGaN potential barrier.
Growth temperature is increased to 960 DEG C, it is 1000sccm that holding growth pressure is 40Torr, hydrogen flowing quantity, ammonia flow
Measuring as 1000sccm, gallium source of the flow for 60sccm is passed through to reative cell, is passed through silicon source of the flow for 4sccm to reative cell, raw
The AlGaN potential barrier that long thickness changes from 5%-100% for 3nm, Al component.
Step 8, in AlGaN potential barrier, grows GaN cap.
Growth temperature is increased to 960 DEG C, it is 1000sccm that holding growth pressure is 40Torr, hydrogen flowing quantity, ammonia flow
Measure as 1000sccm, be passed through gallium source of the flow for 60sccm to reative cell, incorporation of concentration be18/cm3Si impurity, growth
Thickness is the GaN cap of 1nm.
Step 9, is carved with the electrically isolated area of source region in GaN cap glazing, using the electricity of ICP technique making devices active area
Isolation.
(9a) photoetching electrically isolated area in GaN cap：
First, the print for growth being had GaN cap is placed on 200 DEG C of hot plate and toasts 5min；
Then, get rid of photoresist to print, rotating speed is 3500rpm, on 90 DEG C of hot plate, after completing whirl coating, dry 1min；
Then, print is put in litho machine and the photoresist in electrically isolated area is exposed；
Finally, the print after completing to expose is put in developer solution to remove the photoresist in electrically isolated area, and to which
Carry out ultrapure water and nitrogen is dried up；
(9b) electrically isolated area is etched in GaN cap：
To the print of photoetching is completed, using ICP technique dry etching GaN cap, the mesa-isolated of active area is realized, etching
Using gas Cl2/BCl3, it is 20W that pressure is 2mT, power, biases as 10V, etch period be；
(9c) mask after etching is removed：
The print for completing active area isolation is sequentially placed in acetone soln, stripper, acetone soln and ethanol solution
Row cleaning, the photoresist overseas to remove electricity isolated region, then deionized water clean and dried up with nitrogen.
Step 10, makes source electrode and drain electrode in GaN cap.
(10a) photoetching source electrode region and drain regions in GaN cap：
First, the print for completing mesa etch is placed on baking 5min on 200 DEG C of hot plate；
Then, stripping glue is got rid of on print, its whirl coating thickness is 0.35 μm, and by print in the hot plate that temperature is 200 DEG C
Upper baking 5min；
Then, on the print, photoresist is got rid of, its whirl coating thickness is 0.77 μm, and print is dried on 90 DEG C of hot plates
1min；
Afterwards, print is put in litho machine and the photoresist in source electrode region and drain regions is exposed；
Finally, by complete expose print be put in developer solution remove source electrode region and drain regions photoresist and
Glue is peeled off, and ultrapure water is carried out to which and nitrogen is dried up；
(10b) bottoming film：
The print for completing source electrode region and drain regions photoetching is removed graph area using plasma degumming machine do not show
The clean photoresist thin layer of shadow, the time which is processed is that 5min, the step substantially increases the yield rate of stripping；
(10c) evaporating drain and source electrode metal：
The sample for completing the removing of photoresist by plasma is put in electron beam evaporation platform, treats the reaction chamber vacuum of electron beam evaporation platform
Degree reaches 2 × 10-6After Torr, then in the GaN cap in source electrode region and drain regions and source electrode region and
Evaporate ohmic metal on the overseas photoresist in drain regions, the ohmic metal be from bottom to top successively by tetra- layers of Ti, Al, Ni and Au
The metal stack structure of metal composition；
(10d) stripping metal and annealing：
First, the print for completing source and drain evaporation of metal being soaked after more than 40 minutes in acetone carries out supersound process；
Then, print is put into heating in water bath 5min in the stripper that temperature is 60 DEG C；
Afterwards, print is sequentially placed into ultrasonic cleaning 3min in acetone soln and ethanol solution；
Then, dry up with ultrapure water print and with nitrogen.
Finally, print is put in quick anneal oven, 10min nitrogen is passed through in annealing furnace, then will in nitrogen atmosphere
Annealing furnace temperature is set to 830 DEG C of high annealings for carrying out 30s, forms source electrode and drain electrode.
Step 11, smears photoresist in GaN cap and makes groove pattern by lithography, carries out dry method quarter to litho pattern region
Erosion, forms smooth chamfered region.
(11a) in GaN cap glazing fluting figure：
5min is toasted on the hot plate that the print for completing Ohmic electrode evaporation is placed on 200 DEG C；Then to print with 3500rpm
Rotating speed get rid of photoresist, complete to dry 1min after whirl coating on 90 DEG C of hot plate；Then, print is put in litho machine to groove figure
Photoresist in shape region is exposed；Finally, the print after completing to expose is put in developer solution to remove groove pattern area
Photoresist in domain, and ultrapure water is carried out to which and nitrogen is dried up；
(11b) etched recesses region in GaN cap：
To the print of groove pattern photoetching is completed, using ICP technique dry etching GaN cap to barrier layer is carried on the back, light is formed
Sliding chamfered region, its etching gas is Cl2/BCl3, it is 20W that pressure is 10mT, power, biases as 5V, and etch period is 20s, shape
Become smooth chamfered region；
(11c) mask after etching is removed：
The print for completing recess etch is sequentially placed in acetone soln, stripper, acetone soln and ethanol solution to be carried out
Cleaning, the photoresist overseas to remove electricity isolated region, then deionized water clean and dried up with nitrogen.
Step 12, on the region in addition to source electrode and drain electrode of inwall and GaN cap of groove, atomic layer deposition Al2O3
Passivation layer.
Atomic layer Al is carried out to the print for completing recess etch2O3The deposit of medium, is passed through precursor in atomic layer deposition stove
TMA and water, in 250 DEG C of temperature, under conditions of chamber pressure 0.1mT, deposit forms passivation layer.
Step 13, evaporates gate electrode metal layer.
(13a) photoetching gate electrode area domain on passivation layer in groove：
First, the print for completing recess etch is placed on baking 5min on 200 DEG C of hot plate；
Then, stripping glue is got rid of on print, its whirl coating thickness is 0.35 μm, and by print in the hot plate that temperature is 200 DEG C
Upper baking 5min；
Then, on the print, photoresist is got rid of, its whirl coating thickness is 0.77 μm, and print is dried on 90 DEG C of hot plates
1min；
Afterwards, print is put in litho machine and the photoresist in gate electrode region is exposed；
Finally, the print for completing to expose is put in developer solution and removes the photoresist in gate electrode region and glue is peeled off, and right
Which carries out ultrapure water and nitrogen is dried up；
(13b) bottoming film：
The print of gate electrode photoetching will be completed, and to remove the graph area clean photoresist that do not develop using plasma degumming machine thin
Layer, the time which is processed is 5min；
(13c) evaporating drain and source electrode metal：
The sample for completing the removing of photoresist by plasma is put in electron beam evaporation platform, treats the reaction chamber vacuum of electron beam evaporation platform
Degree reaches 2 × 10-6After Torr, then on the photoresist on the passivation layer in gate electrode region and beyond gate electrode region, evaporate Europe
Nurse metal, the ohmic metal is the metal stack structure being made up of Ni, Au and Ni three-layer metal successively from bottom to top；
(13d) stripping metal：
The print for completing gate electrode evaporation is soaked after more than 40 minutes in acetone carries out supersound process；Then by print
It is put into heating in water bath 5min in the stripper that temperature is 60 DEG C；Then, print is sequentially placed in acetone soln and ethanol solution
It is cleaned by ultrasonic 3min；Finally, dry up with ultrapure water print and with nitrogen, complete the making of device.
Embodiment two, on sic substrates make recess width be 1 μm, recess etch depth be 100nm, barrier layer by
AlGaN layer and the low contact resistance type GaN base device of GaN cap composition.
Step one, on SiC substrate, using MOCVD technique, growing AIN nucleating layer.
SiC substrate temperature is reduced to 650 DEG C, it is 5000sccm that holding growth pressure is 100Torr, hydrogen flowing quantity, ammonia
Throughput is 3000sccm, is passed through silicon source of the flow for 20sccm to reative cell, and growth thickness is the low of 10nm on sic substrates
Warm AlN layer；
Again growth temperature is increased to 1050 DEG C, it is 5000sccm that holding growth pressure is 100Torr, hydrogen flowing quantity, ammonia
Throughput is 3000sccm, is passed through silicon source of the flow for 20sccm to reative cell, and on low temperature AI N nucleating layer, regrowth thickness is
The high-temperature AlN layer of 200nm；
The low temperature AI N shell is collectively forming AlN nucleating layer with high-temperature AlN layer.
Step 2, on AlN nucleating layer, grows GaN cushion.
Growth temperature is increased to 1050 DEG C, it is 5000sccm that holding growth pressure is 100Torr, hydrogen flowing quantity, ammonia
Flow is 3000sccm, to reative cell while being passed through that flow is the gallium source of 200sccm and flow is the source of iron of 200sccm, is becoming
On stratum nucleare, growth thickness is 2 μm of Fe2O3 doping GaN cushion.
Step 3, on the buffer layer, grows the second channel region.
Growth temperature is increased to 1050 DEG C, it is 5000sccm that holding growth pressure is 100Torr, hydrogen flowing quantity, ammonia
Flow is 3000sccm, is passed through gallium source of the flow for 200sccm to reative cell, and growth thickness is second channel region of GaN of 20nm.
Step 4, on the second channel region, growth back of the body barrier layer.
Growth temperature is increased to 1050 DEG C, it is 5000sccm that holding growth pressure is 100Torr, hydrogen flowing quantity, ammonia
Flow is 3000sccm, is passed through gallium source of the flow for 200sccm to reative cell, is passed through aluminum of the flow for 50sccm to reative cell
Source, incorporation of concentration is 3 × 1019/cm3Si impurity, growth thickness for 25nm back of the body barrier layer.
Step 5, on back of the body barrier layer, grows the first channel region.
Growth temperature is increased to 1050 DEG C, it is 5000sccm that holding growth pressure is 100Torr, hydrogen flowing quantity, ammonia
Flow is 3000sccm, is passed through gallium source of the flow for 200sccm to reative cell, and growth thickness is first channel region of GaN of 30nm.
Step 6, on the first channel region, growing AIN interposed layer.
Growth temperature is increased to 1050 DEG C, it is 5000sccm that holding growth pressure is 100Torr, hydrogen flowing quantity, ammonia
Flow is 3000sccm, is passed through silicon source of the flow for 50sccm to reative cell, and growth thickness is the AlN interposed layer of 2nm.
Step 7, on AlN interposed layer, grows AlGaN potential barrier.
Growth temperature is increased to 1050 DEG C, it is 5000sccm that holding growth pressure is 100Torr, hydrogen flowing quantity, ammonia
Flow is 3000sccm, is passed through gallium source of the flow for 200sccm to reative cell, is passed through aluminum of the flow for 50sccm to reative cell
Source, the AlGaN potential barrier that growth thickness changes from 5%-100% for 50nm, Al component.
Step 8, in AlGaN potential barrier, grows GaN cap.
Growth temperature is increased to 1050 DEG C, it is 5000sccm that holding growth pressure is 100Torr, hydrogen flowing quantity, ammonia
Flow is 3000sccm, is passed through gallium source of the flow for 200sccm to reative cell, and incorporation of concentration is 3 × 1019/cm3Si impurity,
Growth thickness is the GaN cap of 10nm.
Step 9, is carved with the electrically isolated area of source region in GaN cap glazing, using ICP technique making devices active area
Electric isolution.
(9.1) photoetching electrically isolated area in GaN cap：
The implementing and step 9a in embodiment one of this step) identical；
(9.2) electrically isolated area is etched in GaN cap：
To the print of photoetching is completed, using ICP technique dry etching GaN cap, the mesa-isolated of active area is realized, etching
Using gas Cl2/BCl3, it is 150W that pressure is 20mT, power, biases as 100V, etch period be；
(9.3) mask after etching is removed：
The implementing and step 9c in embodiment one of this step) identical；
Step 10, makes source electrode and drain electrode in GaN cap.
Implementing for this step is identical with step 10 in embodiment one.
Step 11, smears photoresist in GaN cap and makes groove pattern by lithography, carry out dry method to litho pattern region
Etching, forms smooth chamfered region.
(11.1) in GaN cap glazing fluting figure：
The implementing and step 11a in embodiment one of this step) identical；
(11.2) etched recesses region in GaN cap：
To the print of groove pattern photoetching is completed, using ICP technique dry etching GaN cap to barrier layer is carried on the back, light is formed
Sliding chamfered region, its etching gas is Cl2/BCl3, it is 100W that pressure is 50mT, power, biases as 100V, and etch period is
80s, forms smooth chamfered region；
(11.3) mask after etching is removed：
The implementing and step 11c in embodiment one of this step) identical；
Step 12, on the region in addition to source electrode and drain electrode of inwall and GaN cap of groove, atomic layer deposition
Al2O3Passivation layer.
Atomic layer Al is carried out to the print for completing recess etch2O3The deposit of medium, is passed through precursor in atomic layer deposition stove
TMA and water, in 320 DEG C of temperature, under conditions of chamber pressure 1.5mT, deposit forms passivation layer.
Step 13, evaporates gate electrode metal layer.
Implementing for this step is identical with step 13 in embodiment one.
Embodiment three, makes recess width on a sapphire substrate and is 0.2 μm, and recess etch depth is 25nm, barrier layer
The low contact resistance type GaN base device being made up of InAIN layer and GaN cap.
Step A, on sapphire substrate, using MOCVD technique, growing AIN nucleating layer.
Implementing for this step is identical with step 1 in embodiment one.
Step B, on AlN nucleating layer, grows GaN cushion.
Implementing for this step is identical with step 2 in embodiment one.
Step C, on the buffer layer, grows the second channel region.
Implementing for this step is identical with step 3 in embodiment one.
Step D, on the second channel region, growth back of the body barrier layer.
Implementing for this step is identical with step 4 in embodiment one.
Step E, on back of the body barrier layer, grows the first channel region.
Implementing for this step is identical with step 5 in embodiment one.
Step F, on the first channel region, growing AIN interposed layer.
Implementing for this step is identical with step 6 in embodiment one.
Step G, on AlN interposed layer, grows InAlN barrier layer.
Growth temperature is increased to 500 DEG C, it is 1000sccm that holding growth pressure is 40Torr, hydrogen flowing quantity, ammonia flow
Measuring as 1000sccm, indium source of the flow for 60sccm is passed through to reative cell, is passed through silicon source of the flow for 4sccm to reative cell, raw
The InAlN barrier layer that long thickness changes from 5%-25% for 3nm, In component.
Step H, on InAlN barrier layer, grows GaN cap.
Implementing for this step is identical with step 8 in embodiment one.
Step I, is carved with the electrically isolated area of source region in GaN cap glazing, using the electricity of ICP technique making devices active area
Isolation.
Implementing for this step is identical with step 9 in embodiment one.
Step J, makes source electrode and drain electrode in GaN cap.
Implementing for this step is identical with step 10 in embodiment one.
Step K, smears photoresist in GaN cap and makes groove pattern by lithography, carries out dry etching to litho pattern region,
Form smooth chamfered region.
Implementing for this step is identical with step 11 in embodiment one.
Step L, on the region in addition to source electrode and drain electrode of inwall and GaN cap of groove, atomic layer deposition Al2O3
Passivation layer.
Implementing for this step is identical with step 12 in embodiment one.
Step M, evaporates gate electrode metal layer.
Implementing for this step is identical with step 13 in embodiment one.
Example IV, makes recess width on a si substrate and is 1 μm, and recess etch depth is that 70nm, barrier layer is by InAlN
Layer and the low contact resistance type GaN base device of GaN cap composition.
The first step, on si substrates, using MOCVD technique, growing AIN nucleating layer.
Si underlayer temperature is reduced to 650 DEG C, it is 5000sccm that holding growth pressure is 100Torr, hydrogen flowing quantity, ammonia
Flow is 3000sccm, is passed through silicon source of the flow for 20sccm to reative cell, and growth thickness is the low temperature of 10nm on sic substrates
AlN layer；
Again growth temperature is increased to 1050 DEG C, it is 5000sccm that holding growth pressure is 100Torr, hydrogen flowing quantity, ammonia
Throughput is 3000sccm, is passed through silicon source of the flow for 20sccm to reative cell, and on low temperature AI N nucleating layer, regrowth thickness is
The high-temperature AlN layer of 200nm；
The low temperature AI N shell is collectively forming AlN nucleating layer with high-temperature AlN layer.
Second step, on AlN nucleating layer, grows GaN cushion.
Implementing for this step is identical with step two in embodiment two.
3rd step, on the buffer layer, grows the second channel region.
Implementing for this step is identical with step three in embodiment two.
4th step, on the second channel region, growth back of the body barrier layer.
Implementing for this step is identical with step four in embodiment two.
5th step, on back of the body barrier layer, grows the first channel region.
Implementing for this step is identical with step five in embodiment two.
6th step, on the first channel region, growing AIN interposed layer.
Implementing for this step is identical with step six in embodiment two.
7th step, on AlN interposed layer, grows InAlN barrier layer.
Growth temperature is increased to 90 DEG C, it is 5000sccm that holding growth pressure is 400Torr, hydrogen flowing quantity, ammonia flow
Measuring as 3000sccm, indium source of the flow for 200sccm be passed through to reative cell, is passed through silicon source of the flow for 50sccm to reative cell,
The AlGaN potential barrier that growth thickness changes from 5%-25% for 20nm, Al component.
8th step, on InAlN barrier layer, grows GaN cap.
This step implement with embodiment two step eight with.
9th step, is carved with the electrically isolated area of source region in GaN cap glazing, using ICP technique making devices active area
Electric isolution.
First, photoetching electrically isolated area in GaN cap, step 9a in its photoetching process and embodiment one) identical；
Then, in GaN cap, electrically isolated area is etched, to completing the print of photoetching, using ICP technique dry etching
AlGaN potential barrier, realizes the mesa-isolated of active area, etches the gas Cl for adopting2/BCl3, it is 150W that pressure is 20mT, power,
Bias as 100V, etch period be；
Finally, the mask after etching is removed, and which removes step 9c in mask process and embodiment one) identical.
Tenth step, makes source electrode and drain electrode in GaN cap.
Implementing for this step is identical with step 10 in embodiment one.
11st step, smears photoresist in GaN cap and makes groove pattern by lithography, carries out dry method quarter to litho pattern region
Erosion, forms smooth chamfered region.
First, in GaN cap glazing fluting figure, step 11a in its photoetching process and embodiment one) identical；
Then, etched recesses region in GaN cap：To completing the print of groove pattern photoetching, using ICP technique dry method
Etching GaN cap forms smooth chamfered region to barrier layer is carried on the back, and its etching gas is Cl2/BCl3, pressure is that 50mT, power is
100W, biases as 100V, etch period be 60s, formed smooth chamfered region；
Finally, the mask after etching is removed, and which removes step 11c in mask process and embodiment one) identical.
12nd step, on the region in addition to source electrode and drain electrode of inwall and GaN cap of groove, atomic layer deposition
Al2O3Passivation layer.
Implementing for this step is identical with step ten two in embodiment two.
13rd step, evaporates gate electrode metal layer.
Implementing for this step is identical with step 13 in embodiment one.
Above description is only several instantiations of the present invention, does not constitute any limitation of the invention, it is clear that for this
For the professional in field, after present disclosure and principle has been understood, all may be without departing substantially from the principle of the invention, structure
In the case of, carry out various corrections and the change in form and details, but these corrections based on inventive concept and change
Still within the claims of the present invention.
Claims (10)
1. low contact resistance type GaN base device, includes substrate layer (1), nucleating layer (2), cushion (3), the second ditch from bottom to top
Road area (4), back of the body barrier layer (5), the first channel region (6), interposed layer (7), AlGaN/InAlN barrier layer (8) and GaN cap (9),
GaN cap (9) is provided with source electrode (10) and drain electrode (11), it is characterised in that：Depth is etched with GaN cap (9) to the back of the body
The groove of barrier layer (5), the region of the inwall of groove and GaN cap in addition to source electrode and drain electrode is provided with passivation layer (12), recessed
Passivation layer in groove is provided with gate electrode (13), forms test formula grid structure.
2. low contact resistance type GaN base device according to claim 1, it is characterised in that the width of groove be
M, the etching depth of groove is 25nm-100nm.
3. low contact resistance type GaN base device according to claim 1, it is characterised in that barrier layer is by AlGaN layer and GaN
Cap layers constitute, and wherein, the thickness of AlGaN layer is 5%-100% for the content of 3nm-50nm, Al component.
4. low contact resistance type GaN base device according to claim 1, it is characterised in that barrier layer is by InAIN layer and GaN
Cap layers constitute, and wherein, the thickness of InAIN layer is 5%-25% for the content of 3nm-20nm, In component.
5. low contact resistance type GaN base device according to claim 1, it is characterised in that back of the body barrier layer (5) is mixed using Si
Miscellaneous, the concentration of doping is 5 × 1018cm-3-3×1019cm-3.
6. a kind of manufacture method of low contact resistance type GaN base device, comprises the steps：
1) on substrate base, using MOCVD technique, successively growth nucleating layer, cushion, the second channel region, back of the body barrier layer, the
One channel region, AlN interposed layer, AlGaN/InAlN barrier layer and GaN cap；
2) ICP equipment is adopted in GaN cap, etching table top is to carrying on the back barrier layer；
3) source electrode and drain electrode patterns are made by lithography in GaN cap, using electron beam evaporation process, in source electrode and drain electrode
Metal ohmic contact is evaporated in graph area；
4) photoresist being smeared in GaN cap and make grooved area by lithography, then using ICP equipment, litho pattern region is done
Method is etched, and forms smooth chamfered region；
5) using ALD equipment, atomic layer Al is carried out in the region in addition to source electrode and drain electrode of inwall and GaN cap of groove2O3
The deposit of medium, forms Al2O3Passivation layer；
6) electron beam evaporation process is adopted, on passivation layer in groove, gate electrode metal layer is evaporated, photoresist is removed, completes device
Making.
7. method according to claim 6, the MOCVD device for wherein utilizing in step 1 grows nucleating layer, buffering successively
Layer, the second channel region, back of the body barrier layer, the first channel region, AlN interposed layer, AlGaN/InAlN barrier layer and GaN cap, its technique
Parameter is as follows：
Nucleating layer：Low temperature nucleation temperature is 500-650 DEG C, and it is 1000- that growth pressure is 40-100Torr, hydrogen flowing quantity
5000sccm, it is 4-20sccm that ammonia flow is 600-3000sccm, silicon source flow；High temperature nucleation temperature is 940-1050 DEG C,
Growth pressure is 40-100Torr, and it is 1000-3000sccm that hydrogen flowing quantity is 1000-5000sccm, ammonia flow, silicon source flow
For 4-20sccm；
Cushion：Growth temperature is 940-1050 DEG C, and it is 1000-5000sccm that growth pressure is 40-100Torr, hydrogen flowing quantity,
Ammonia flow is 1000-3000sccm, and it is 10-200sccm that gallium source flux is 60-200sccm, source of iron flow；
Second channel region：Growth temperature is 940-1050 DEG C, growth pressure 40-100Torr, and hydrogen flowing quantity is 1000-
5000sccm, it is 60-200sccm that ammonia flow is 1000-3000sccm, gallium source flux.
Back of the body barrier layer：Temperature is 960-1050 DEG C, and it is 1000-5000sccm that growth pressure is 40-100Torr, hydrogen flowing quantity, ammonia
Throughput is 1000-3000sccm, and it is 4-50sccm, Si impurity incorporation of concentration that gallium source flux is 60-200sccm, silicon source flow
For 5 × 1018-3×1019/cm3.
First channel region：Growth temperature is 960-1050 DEG C, and it is 1000- that growth pressure is 40-100Torr, hydrogen flowing quantity
5000sccm, it is 60-200sccm that ammonia flow is 1000-3000sccm, gallium source flux.
AlN interposed layer：Growth temperature is 960-1050 DEG C, and it is 1000- that growth pressure is 40-100Torr, hydrogen flowing quantity
5000sccm, it is 4-50sccm that ammonia flow is 1000-3000sccm, silicon source flow.
AlGaN potential barrier：Growth temperature is 960-1050 DEG C, and it is 1000- that growth pressure is 40-100Torr, hydrogen flowing quantity
5000sccm, it is 60-200sccm that ammonia flow is 1000-3000sccm, gallium source flux, and silicon source flow is 4-50sccm, to grow
Thickness is that 3-50nm, Al component changes from 5%-100%.
InAlN barrier layer：Growth temperature is 500-900 DEG C, and it is 1000- that growth pressure is 40-400Torr, nitrogen flow
5000sccm, it is 60-200sccm that ammonia flow is 1000-3000sccm, indium source flux, and silicon source flow is 4-50sccm, to grow
Thickness is that 3-20nm, In component changes from 0%-30%.
GaN cap：Growth temperature is 960-1050 DEG C, and it is 1000- that growth pressure is 40-100Torr, hydrogen flowing quantity
5000sccm, it is 1 × 10 for 60-200sccm, Si impurity incorporation of concentration that ammonia flow is 1000-3000sccm, gallium source flux18-
1×1019/cm3.
8. the ICP equipment etching table top for utilizing in method according to claim 6, wherein step 2 and step 4 and groove
Area, its technological parameter is as follows：
Mesa etch：Etching gas are Cl2/BCl3, it is 20W-150W that pressure is 2-20mT, power, biases as 10V-100V, quarter
The erosion time is 40s-100s；
Recess etch：Etching gas are Cl2/BCl3, it is 20W-100W that pressure is 10-50mT, power, biases as 5V-100V, quarter
The erosion time is 20s-80s.
9. method according to claim 6, the ALD equipment that wherein step 5 is utilized deposits to form passivation layer, its technological parameter
As follows：
Precursor is TMA and water,
Deposition temperature is 250-320 DEG C,
Chamber pressure is 0.1mT-1.5mT.
10. method according to claim 6, wherein in step 3 metal material of electron beam evaporation source and drain Ohmic contact and
The metal material of electron beam evaporation grid Schottky contacts, respectively Ti/Al/Ni/Au, and Ni/Au/Ni in step 6.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107248528A (en) * | 2017-06-09 | 2017-10-13 | 西安电子科技大学 | Low frequency loss GaN base microwave power device and preparation method thereof |
| CN108281352A (en) * | 2018-01-26 | 2018-07-13 | 成都海威华芯科技有限公司 | A kind of device isolation method applied to gallium nitride transistor |
| CN108931566A (en) * | 2017-05-26 | 2018-12-04 | 中国科学院苏州纳米技术与纳米仿生研究所 | A kind of method of senser element and preparation method thereof and the test senser element |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102130159A (en) * | 2011-01-06 | 2011-07-20 | 西安电子科技大学 | High electron mobility transistor |
| CN102130158A (en) * | 2011-01-05 | 2011-07-20 | 西安电子科技大学 | Step-like groove-grid high electron mobility transistor |
| WO2016025043A1 (en) * | 2014-08-12 | 2016-02-18 | Raytheon Company | Double heterojunction iii-nitride structures |
-
2016
- 2016-12-01 CN CN201611087793.0A patent/CN106449737B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102130158A (en) * | 2011-01-05 | 2011-07-20 | 西安电子科技大学 | Step-like groove-grid high electron mobility transistor |
| CN102130159A (en) * | 2011-01-06 | 2011-07-20 | 西安电子科技大学 | High electron mobility transistor |
| WO2016025043A1 (en) * | 2014-08-12 | 2016-02-18 | Raytheon Company | Double heterojunction iii-nitride structures |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108931566A (en) * | 2017-05-26 | 2018-12-04 | 中国科学院苏州纳米技术与纳米仿生研究所 | A kind of method of senser element and preparation method thereof and the test senser element |
| CN107248528A (en) * | 2017-06-09 | 2017-10-13 | 西安电子科技大学 | Low frequency loss GaN base microwave power device and preparation method thereof |
| CN107248528B (en) * | 2017-06-09 | 2019-10-11 | 西安电子科技大学 | GaN base microwave power device and preparation method thereof is lost in low frequency |
| CN108281352A (en) * | 2018-01-26 | 2018-07-13 | 成都海威华芯科技有限公司 | A kind of device isolation method applied to gallium nitride transistor |
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