CN106445857A - Master-slave system, configuration method of bus address in master-slave system, and slaves - Google Patents
Master-slave system, configuration method of bus address in master-slave system, and slaves Download PDFInfo
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- CN106445857A CN106445857A CN201510494488.2A CN201510494488A CN106445857A CN 106445857 A CN106445857 A CN 106445857A CN 201510494488 A CN201510494488 A CN 201510494488A CN 106445857 A CN106445857 A CN 106445857A
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- slave station
- address
- level
- enable signal
- bus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4027—Coupling between buses using bus bridges
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
Abstract
The invention relates to a master-slave system, a configuration method of a bus address in the master-slave system, and slaves. The master-slave system comprises a master (10), N pieces of slaves (2-1,2-2,...,2-N) and a communication bus (30), wherein the master (10) can independently communicate with the N pieces of slaves (2-1,2-2,...,2-N) through the communication bus (30); the N pieces of slaves (2-1,2-2,...,2-N) are in cascade connection one by one, and can be activated step by step; and the activated slaves obtain a target address from the master (10) through the communication bus (30), and the own bus addresses of the activated slaves are configured into the target address, wherein N is a positive integer greater than or equal to 2. Therefore, the bus addresses of the slaves in the master-slave system can be automatically configured, system debugging time is shortened, and system debugging efficiency is improved.
Description
Technical field
The present invention relates in master-slave system bus address configuring technical field, more particularly, to bus address in master-slave system
Collocation method, the slave station in master-slave system and master-slave system.
Background technology
Master-slave mode (Master-Slave) system is a kind of conventional system structure.Master-slave mode (Master-Slave) system is led to
Often include a main website (Master) and a plurality of slave station (Slave).Each slave station is it is necessary to have one uniquely total
Line address is used as identification.The method of traditional bus address of configuration slave station has two kinds.One kind is by being arranged at slave station
Interior hardware switch (e.g., thumb-acting switch DIP switch) carries out bus address configuration;Another kind is to be joined by software
Number is set for bus address configuration.
Content of the invention
An object of the present invention is to provide the method automatically configuring the bus address of slave station in master-slave system, shortens system and adjusts
The examination time, provide system debug efficiency.
One aspect of the present invention provides master-slave system, including:
One main website;
N number of slave station;With
One communication bus, main website can be communicated with N number of slave station respectively by communication bus;
Wherein, N number of slave station cascades one by one, and can be activated step by step, and the slave station being activated passes through communication bus from main website
Obtain a destination address and the bus address of itself is configured to destination address, N is the positive integer more than or equal to 2.So,
The bus address of slave station in master-slave system can be automatically configured, shorten the system debug time, system debug efficiency is provided.
In another kind of schematically embodiment of master-slave system, N number of slave station of cascade is according to the order being activated successively
Be respectively the 1st grade of slave station, the 2nd grade of slave station ..., N level slave station, N level slave station electrically connected with main website;
Wherein, respectively from stand in bus address when being activated be one identical activation address, the slave station being activated by itself
The mode that bus address is configured to destination address is:Activation address is updated to destination address, the destination address of each slave station is all not
Identical.Main website can accurately find, by activating address, the slave station being activated, and improves the accuracy of bus address configuration.
In another schematic embodiment of master-slave system, during upper electricity, it is identical that the bus address of each slave station is one
Initial address, the mode that each slave station is activated is:Initial address is updated to activate address.Unified initial address, just
In the bus address automatically configuring all slave stations.
In another schematic embodiment of master-slave system, the 1st grade of slave station obtains an effective enable signal from outside
And be activated, in other N-1 level slave stations, every one-level slave station all obtains effective enable signal from previous stage slave station and is activated;The
N level is configured after destination address effectively to enable signal to main website output from standing in, and in other N-1 level slave stations, every one-level slave station is equal
Effectively enable signal to the output of next stage slave station after being configured destination address;Main website receives effective from N level slave station
Terminate the configuration of the bus address to N number of slave station after enabling signal.N number of slave station is activated step by step, is capable of automatically
Configure the bus address of all slave stations.
In another schematic embodiment of master-slave system, each slave station includes:
One from microprocessing unit;
One first signal end, it can receive effective enable signal;
One secondary signal end, it can export effective enable signal;With
One address storaging unit, for storing the bus address of slave station;
Main website includes:
One main microprocessing unit, its can by communication bus respectively with N number of from microprocessing unit communication;With
One the 3rd signal end, it can receive from N level slave station and effectively enable signal;
Wherein, the first signal end of the 1st grade of slave station effectively enable signal source outside with electrically connects, and the second of N level slave station
Signal end is electrically connected with the 3rd signal end of main website, the first signal end of every one-level slave station in other slave stations and upper level slave station
The electrical connection of secondary signal end, the first signal end of the secondary signal end of every one-level slave station in other slave stations and next stage slave station
Electrical connection;In address storaging unit in the bus address configuration process of slave station, the bus address of the slave station of storage is followed successively by initially
Address, activation address and destination address.First signal end of adjacent slave station and secondary signal end are passed through to enable holding wire electrical connection,
Facilitate implementation cascade and automatic bus address configuration.
In another schematic embodiment of master-slave system,
During upper electricity, from microprocessing unit, one invalid enable signal is exported by secondary signal end in each slave station, and address is deposited
In storage unit, the bus address of the slave station of storage is set to initial address;
After upper electricity, in each slave station, read the enable signal of the first signal end from microprocessing unit,
When the enable signal reading from the first signal end is invalid enable signal, address is kept to deposit from microprocessing unit
In storage unit, the bus address of the slave station of storage is initial address, and keeps secondary signal end to be output as invalid enable signal,
When the enable signal reading from the first signal end is effective enable signal, from microprocessing unit, address is stored
In unit storage slave station bus address from initial address be updated to activate address, from microprocessing unit pass through communication bus from
Main website obtains destination address and from activation address, the bus address of the slave station storing in address storaging unit is updated to target ground
Location, effectively enables signal by the output of secondary signal end from microprocessing unit after activation address is updated to destination address;
After upper electricity, main website reads the enable signal of the 3rd signal end,
When the enable signal reading from the 3rd signal end is invalid enable signal, main website is carried out with the slave station being activated
Communicate and configure the bus address of the slave station being activated,
When the enable signal reading from the 3rd signal end is effective enable signal, main website terminates total to N number of slave station
The configuration of line address;
Wherein, invalid enable signal is low level, and effectively enabling signal is high level;Or invalid enable signal is high level,
Effectively enabling signal is low level.
By reading the enable signal of the first signal end, arbitrary slave station judges whether itself activates, and after configuring bus address
Automatically activation next stage slave station, process is simple.Main website judges whether to terminate bus by reading the enable signal of the 3rd signal end
The configuration of address, realizes the automatization of configuration process.
In another schematic embodiment of master-slave system, each slave station also includes:
One switch element, it includes:
One input, is electrically connected with one first level,
One outfan, is electrically connected with secondary signal end, and
One control end, electrically connects with from microprocessing unit, and
One first resistor, its one end electrically connects with the first signal end with from microprocessing unit, and its other end and a second electrical level are electric
Connect;
Main website also includes a second resistance, and its one end is electrically connected with the 3rd signal end and main microprocessing unit, its other end and
Two level electrical connections;
Wherein, the first level is high level, and second electrical level is low level;Or the first level is low level, and the second electricity
Put down as high level.
The circuit of switch element and first resistor composition can produce enable signal, and circuit structure is simple.
Another aspect of the present invention provides the collocation method of bus address in master-slave system, master-slave system, including:
One main website;The slave station of N number of cascade;With a communication bus, main website can pass through communication bus and communicate with N number of slave station respectively;
Collocation method includes:
It is individually activated the slave station of N number of cascade, each slave station being activated obtains a destination address simultaneously by communication bus from main website
The bus address of itself is configured to destination address, N is the positive integer more than or equal to 2.
In another kind of schematically embodiment of collocation method, collocation method also includes:
Power-up initializing, the bus address of each slave station is set to an identical initial address;
Wherein, the mode that each slave station is activated is:Initial address is updated to an activation address, the slave station being activated will be from
The mode that the bus address of body is configured to destination address is:By activation address be updated to destination address, respectively from stand in be activated when
Bus address be an identical activation address, the destination address of each slave station all differs.Principal and subordinate so can be automatically configured
The bus address of slave station in formula system, shortens the system debug time, provides system debug efficiency.
In another schematic embodiment of collocation method, N number of slave station of cascade divides successively according to the order being activated
Not Wei the 1st grade of slave station, the 2nd grade of slave station ..., N level slave station, N level slave station electrically connected with main website, the 1st grade of slave station
Obtain an effective enable signal from outside and be activated, in other N-1 level slave stations, every one-level slave station all obtains from previous stage slave station
Effectively enable signal and be activated;N level is configured after destination address effectively to enable signal to main website output from standing in, other
In N-1 level slave station, every one-level slave station effectively enables signal to the output of next stage slave station all after being configured destination address;Main website connects
Receive the configuration terminating after effective enable signal of N level slave station to N number of tributary address.Unified initial address, is easy to
Automatically configure the bus address of all slave stations.Main website can accurately find, by activating address, the slave station being activated, and improves
The accuracy of bus address configuration.
Another aspect of the present invention provides for the slave station in master-slave system, and it can be main by a communication bus and one
Stand communication, slave station includes:
One from microprocessing unit;
One first signal end, it can receive an effective enable signal;
One secondary signal end, it can export an effective enable signal;With
One address storaging unit, for storing the bus address of slave station;
Wherein, from microprocessing unit, one invalid enable signal is exported by secondary signal end during upper electricity, and by address storaging unit
The bus address of the slave station of middle storage is set to an initial address;After upper electricity slave station receive effectively enable signal and when being activated from
The bus address of the slave station storing in address storaging unit is updated to an activation address from initial address by microprocessing unit, from micro-
Processing unit obtains a destination address the bus ground by the slave station storing address storaging unit by communication bus from main website
Location is updated to destination address from activation address, believes by second after activation address is updated to destination address from microprocessing unit
Number end output effectively enables signal.First signal end of adjacent slave station and secondary signal end are passed through to enable holding wire electrical connection, just
In realization cascade and automatic bus address configuration.
In another kind of schematically embodiment of slave station, also include:
One switch element, it includes:
One input, is electrically connected with one first level,
One outfan, is electrically connected with secondary signal end, and
One control end, electrically connects with from microprocessing unit, and
One first resistor, its one end electrically connects with the first signal end with from microprocessing unit, and its other end and a second electrical level are electric
Connect;
Wherein, the first level is high level, and second electrical level is low level;Or the first level is low level, and the second electricity
Put down as high level.The circuit of switch element and first resistor composition can produce enable signal, and circuit structure is simple.
Brief description
Hereafter by the way of clearly understandable by description of a preferred embodiment and combine accompanying drawing come characteristic above-mentioned to the present invention,
Technical characteristic, advantage and its implementation are further described, wherein:
Fig. 1 is the structural representation of the master-slave system that one embodiment of the present of invention provides;
Fig. 2 is the collocation method flow chart of bus address in the master-slave system that one embodiment of the present of invention provides;
Fig. 3 is the structural representation of the master-slave system that one embodiment of the present of invention provides;
Fig. 4 is the flow chart of the bus address configuration process of a slave station that one embodiment of the present of invention provides;
Fig. 5 is the flow chart of the bus address configuration process of main website that one embodiment of the present of invention provides;
Fig. 6 is the structural representation of the master-slave system that one embodiment of the present of invention provides.
Label declaration:
10 main websites
11 main microprocessing units
12 the 3rd signal ends
13 second resistances
2-1,2-2 ..., 2-N slave station
21 from microprocessing unit
22 first signal ends
23 secondary signal ends
24 address storaging units
25 switch elements
A outfan
B control end
C input
26 first resistors
30 communication buses
40 enable holding wires
IDD enables signal
Vcc power supply potential
Vee earthing potential
Specific embodiment
In order to be more clearly understood to the technical characteristic of invention, purpose and effect, now compare the tool of the brief description present invention
Body embodiment, in the various figures identical label represent identical part.
The various embodiments of each figure discussed below and the principle of the disclosure being used to be described in this patent file only with
The mode that illustrates and anyway should not be construed as limiting the scope of the present disclosure.It will be understood to those of skill in the art that
The principle of the disclosure can be implemented in the equipment of any suitable arrangement.With reference to exemplary non-limiting embodiments, this Shen will be described
Various innovative teachings please.
Herein, " schematic " expression " serving as example, example or explanation ", should not will be described herein as " showing
Any diagram of meaning property ", embodiment are construed to a kind of preferred or more advantage technical scheme.
For making simplified form, each in figure only schematically show part related to the present invention, and they do not represent its work
Practical structures for product.In addition, so that simplified form readily appreciates, have the portion of identical structure or function in some in figures
Part, schematically show only one of, or has only marked one of.
In present specification, " invalid enable signal " refers to make slave station activation or main website can not be made to stop bus address
The enable signal IDD of configuration." effectively enabling signal " refers to make slave station activation or main website can be made to stop bus ground
The enable signal IDD of location configuration.For example enabling signal IDD=1 is effective enable signal, and it is invalid for enabling signal IDD=0
Enable signal." activation " refers to slave station and is in the configurable state of bus address, and such as certain slave station is activated, then this slave station
It is in bus address and can configure state.
Fig. 1 is the structural representation of the master-slave system that one embodiment of the present of invention provides.From figure 1 it appears that
This master-slave system, including:
One main website 10;
N number of slave station 2-1,2-2 ..., 2-N;With
One communication bus 30, this main website 10 can by communication bus 30 respectively with N number of slave station 2-1,2-2 ..., 2-N
Communication;
Wherein, this N number of slave station cascades one by one, and can be activated step by step.The slave station that this is activated passes through communication bus 30
Obtain a destination address from main website 10 and the bus address of itself is configured to this destination address, N is just whole more than or equal to 2
Number.Tu1Zhong main website 10 and N number of slave station 2-1,2-2 ..., 2-N connected by an enable holding wire 40.The N of cascade
Individual slave station 2-1,2-2 ..., 2-N according to the order being activated respectively be the 1st grade of slave station 2-1, the 2nd grade of slave station 2-2 ...,
N level slave station 2-N, is electrically connected by this enable holding wire 40 between adjacent slave station, N level slave station 2-N and main website
10 are electrically connected by this enable holding wire 40.The signal enabling transmission on holding wire 40 is to enable signal IDD.So, energy
Enough automatically configure the bus address of slave station in master-slave system, shorten the system debug time, system debug efficiency is provided.
Upper electricity when, each slave station 2-1,2-2 ..., the bus address of 2-N be an identical initial address, such as 0xff.
The mode that each slave station is activated is:This initial address is updated to activate address.Each slave station 2-1,2-2 ..., 2-N exists
Bus address when being activated is an identical activation address, such as 0x00.Synchronization only one of which slave station is activated.
For example, if one of slave station is activated, then its bus address can be updated to 0x00 from 0xff;Not not the having of other slave stations
It is activated, its bus address is not 0x00, but initial address 0x00 or destination address.Unified initial address, is easy to
Automatically configure the bus address of all slave stations.
The mode that the bus address of itself is configured to destination address is by the slave station being activated:This activation address is updated to this mesh
Mark address.For example, if one of slave station 2-2 is activated, only its bus address be 0x00, other slave stations total
Line address is not 0x00, and main website 10 can be addressed by communication bus 30, and correctly finds this activation address 0x00,
And then uniquely identify this slave station 2-2.Afterwards, main website 10 passes through slave station transmission one mesh that communication bus 30 is activated to this
Mark address, such as 0x02;The bus address of itself is configured to this target after receiving this destination address 0x02 by slave station 2-2
Address 0x02;Thus completing the configuration of the bus address to slave station 2-2.The bus address of other same slave stations also according to
The mode of foregoing description configures, when all slave station 2-1,2-2 ..., 2-N be activated successively and be configured destination address after,
The bus address configuration of whole master-slave system completes.Each slave station 2-1,2-2 ..., the destination address that is configured of 2-N all not
Identical, the destination address that for example slave station 2-1 is configured is 0x01, and the destination address that slave station 2-2 is configured is 0x02 ...,
The destination address that slave station 2-N is configured is 0x0N.So each slave station 2-1,2-2 ..., 2-N be respectively provided with one unique
The bus address all differing with other slave stations.Main website can accurately find, by activating address, the slave station being activated, and improves
The accuracy of bus address configuration.
In a schematic embodiment, the 1st grade of slave station 2-1 obtains an effective enable signal from outside and is activated,
In other N-1 level slave stations (i.e. the 2nd to N level slave station), every one-level slave station all obtains effective enable signal from previous stage slave station
And be activated.N level slave station 2-N exports effective enable signal, other N-1 to main website 10 after being configured destination address
In level slave station (i.e. the 1st to N-1 level slave station), every one-level slave station exports to next stage slave station all after being configured destination address
Effectively enable signal.Main website 10 receives and terminates to this N number of slave station after effective enable signal of N level slave station 2-N
Bus address configuration.N number of slave station is activated step by step, is capable of automatically configuring the bus address of all slave stations.
Taking N=6 as a example specifically, when just starting system electrification, this 6 slave station 2-1,2-2 ..., the bus of 2-6 ground
Location is an identical initial address, such as 0xff.Then, after system electrification, the 1st grade of slave station 2-1 obtains one from outside to be had
Effect enables signal and is activated, and the bus address of slave station 2-1 is updated to activate address 0x00 from initial address 0xff, other from
Stand 2-2 ..., the bus address of 2-6 be still initial address 0xff.So main website 10 is accurately looked for according to this activation address 0x00
To this slave station 2-1, and destination address 0x01 is sent to the slave station 2-1 that this is activated by communication bus 30;Slave station 2-1
After receiving this destination address 0x01, the bus address of itself is updated to this destination address 0x01 from activation address 0x00;From
And complete the configuration of the bus address to slave station 2-1.The bus address of slave station 2-1 is updated to this mesh from activation address 0x00
An effective enable signal is exported to next stage slave station 2-2 after mark address 0x01.Slave station 2-2 obtains effective enable from slave station 2-1
Signal and be activated, its bus address is updated to activate address 0x00 from initial address 0xff, and the bus address of slave station 2-1 is
Destination address 0x01, other slave stations 2-3 ..., the bus address of 2-6 be still initial address 0xff.So main website 10 basis
This activation address 0x00 accurately finds this slave station 2-2, and sends a mesh by communication bus 30 to the slave station 2-2 that this is activated
Mark address 0x02;The bus address of itself is updated after receiving this destination address 0x02 by slave station 2-2 from activation address 0x00
For this destination address 0x02;Thus completing the configuration of the bus address to slave station 2-2.The bus address of slave station 2-2 is from sharp
The address 0x00 that lives exports an effective enable signal to next stage slave station 2-3 after being updated to this destination address 0x02.Slave station 2-3 ...,
The activation of each of 2-5 slave station is all identical with slave station 2-2 with bus address configuration, and being configured bus address respectively is:
0x03,0x04,0x05, its process is not repeated to illustrate.Afterbody slave station 2-6 activation and bus address configuration and slave station
2-2 is similar to, and somewhat different, detailed process is:Slave station 2-6 obtains effective enable signal from slave station 2-5 and is activated,
Its bus address is updated to activate address 0x00 from initial address 0xff, other slave stations 2-1 ..., the bus address of 2-5 divides
Wei not 0x01,0x02,0x03,0x04,0x05.So main website 10 accurately finds this slave station according to this activation address 0x00
2-6, and destination address 0x06 is sent to the slave station 2-6 that this is activated by communication bus 30;Slave station 2-6 receives this
After destination address 0x06, the bus address of itself is updated to this destination address 0x06 from activation address 0x00;Thus completing
Configuration to the bus address of slave station 2-6.The bus address of slave station 2-6 is updated to this destination address from activation address 0x00
An effective enable signal is exported to main website 10 after 0x06.Main website 10 receives the effective enable letter from the 6th grade of slave station 2-6
Terminate the configuration to this 6 tributary address after number.
An alternative embodiment of the invention provides the collocation method of bus address in master-slave system.This master-slave system includes:
One main website 10;The slave station 2-1 of N number of cascade, 2-2 ..., 2-N;With a communication bus 30.Main website 10 can be by logical
News bus 30 respectively with N number of slave station 2-1,2-2 ..., 2-N communication;
Fig. 2 is the collocation method flow chart of bus address in the master-slave system that one embodiment of the present of invention provides.As Fig. 2
Shown, this collocation method includes:
S20:Be individually activated the slave station 2-1 of this N number of cascade, 2-2 ..., 2-N, it is total that each slave station being activated passes through communication
Line 30 obtains a destination address from main website 10 and the bus address of itself is configured to this destination address, and N is more than or equal to 2
Positive integer.So can automatically configure the bus address of slave station in master-slave system, shorten the system debug time, provide and be
System debugging efficiency.
In a schematic embodiment, this collocation method is additionally included in step S10 before step S20:Upper electricity is just
Beginningization, by each slave station 2-1,2-2 ..., the bus address of 2-N be set to an identical initial address, such as 0xff.Wherein,
The mode that each slave station is activated is:Initial address 0xff is updated to an activation address, such as 0x00.This slave station being activated
The mode that the bus address of itself is configured to this destination address is:Activation address 0x00 is updated to this destination address.Respectively
Slave station 2-1,2-2 ..., the bus address when being activated for the 2-N be one identical activation address 0xff, each slave station 2-1,
2-2 ..., the destination address of 2-N all differ, also all from activation address and initial address different.Unified initial address, just
In the bus address automatically configuring all slave stations.Main website can accurately find, by activating address, the slave station being activated, and improves
The accuracy of bus address configuration.
Fig. 3 is the structural representation of the master-slave system that one embodiment of the present of invention provides.It is with master-slave mode system shown in Fig. 1
The something in common of system no longer illustrates.From figure 3, it can be seen that each slave station includes:
One from microprocessing unit 21;
One first signal end 22, it can receive effective enable signal;
One secondary signal end 23, it can export effective enable signal;With
One address storaging unit 24, for storing the bus address of this slave station.
Main website 10 includes:
One main microprocessing unit 11, it can be communicated from microprocessing unit 21 with N number of respectively by communication bus 30;With
One the 3rd signal end 12, it can receive from N level slave station 2-N and effectively enable signal.
Wherein, first signal end 22 of the 1st grade of slave station 2-1 and an outside signal source that effectively enables are (with power supply potential in Fig. 3
As a example Vcc) electrically connect, the secondary signal end 23 of N level slave station 2-N is electrically connected with the 3rd signal end 12 of main website 10,
The of first signal end 22 of the every one-level slave station in other slave stations (i.e. the 2nd to N-1 level slave station) and upper level slave station
Binary signal end 23 electrically connects, the secondary signal end of the every one-level slave station in other slave stations (i.e. the 2nd to N-1 level slave station)
23 are electrically connected with the first signal end 22 of next stage slave station.Specifically, first signal end 22 of second level slave station 2-2 with
The secondary signal end 23 of first order slave station 2-1 electrically connects, secondary signal end 23 and the third level slave station of second level slave station 2-2
First signal end 22 of 2-3 electrically connects, by that analogy.In the bus address configuration process of each slave station, the ground of this slave station
In location memory element 24, the bus address of this slave station of storage is followed successively by initial address, activation address and destination address.Adjacent
First signal end of slave station and secondary signal end are passed through to enable holding wire electrical connection, facilitate implementation cascade and automatic bus address is joined
Put.Certain first signal end 22 also can receive invalid enable signal, and secondary signal end also can export invalid enable signal,
3rd signal end 12 also can receive invalid enable signal.
In conjunction with Fig. 4, the bus address configuration process with regard to a slave station is described as follows below:
S31:During upper electricity, invalid by secondary signal end 23 output one of this slave station from microprocessing unit 21 in each slave station
Enable signal, and the bus address of this slave station of storage in the address storaging unit 24 of this slave station is set to initial address 0xff.
After upper electricity, in each slave station, read the enable signal IDD of the first signal end 22 of this slave station from microprocessing unit 21.
When the enable signal IDD reading from the first signal end 22 of this slave station is invalid enable signal (i.e. IDD=0),
The bus address keeping this slave station of storage the address storaging unit 24 of this slave station from microprocessing unit 21 is initial address
0xff, and keep the secondary signal end 23 of this slave station to be output as invalid enable signal.Enable the enable letter on holding wire 40
Or a number IDD is invalid enable signal (i.e. IDD=0), or being effectively to enable signal (i.e. IDD=1).First signal end
Or the signal on 22 is invalid enable signal, or being effectively to enable signal.Enable signal IDD on secondary signal end 23
It is invalid enable signal, or being effectively to enable signal.In a schematic embodiment, invalid enable signal
For low level, effectively enabling signal is high level;In another schematic embodiment, invalid enable signal is high electricity
Flat, effectively enabling signal is low level.
S32:When the enable signal IDD reading from the first signal end 22 of this slave station is effective enable signal (i.e. IDD=1)
When, this slave station is activated, from microprocessing unit 21 by the address storaging unit 24 of this slave station storage this slave station bus
Address is updated to activate address 0x00 from initial address 0xff.
S33:After this slave station obtains activation address 0x00, pass through communication bus 30 from main website 10 from microprocessing unit 21
Obtain destination address and the bus address of this slave station of storage in address storaging unit 24 is updated to mesh from activation address 0x00
Mark address.Exported by secondary signal end 23 after activation address 0x00 is updated to destination address from microprocessing unit 21
Effectively enable signal.
In conjunction with Fig. 5, with regard to main website, the work process in address configuration process is described as follows below:
S41:After upper electricity, main website 10 initializes and reads the enable signal IDD of the 3rd signal end 12.
S42:When the enable signal IDD reading from the 3rd signal end 12 is invalid enable signal (IDD=0),
Main website 10 is communicated with the slave station being activated and is configured the bus address of the slave station that this is activated,
S43:When the enable signal IDD reading from the 3rd signal end 12 is effective enable signal (IDD=1),
Main website 10 terminate to this N number of slave station 2-1,2-2 ..., the configuration of the bus address of 2-N.
By reading the enable signal of the first signal end, arbitrary slave station judges whether itself activates, and after configuring bus address
Automatically activation next stage slave station, process is simple.Main website judges whether to terminate bus by reading the enable signal of the 3rd signal end
The configuration of address, realizes the automatization of configuration process.
Fig. 6 is the structural representation of the master-slave system that one embodiment of the present of invention provides.It is main with shown in Fig. 1 and Fig. 3
No longer illustrate from the something in common of formula system.From fig. 6 it can be seen that
Each slave station also includes:
One switch element 25, it includes:
One input c, is electrically connected with one first level,
One outfan a, is electrically connected with secondary signal end 23, and
One control end b, electrically connects with from microprocessing unit 21, and
One first resistor 26, its one end electrically connects with the first signal end 22 with from microprocessing unit 21, its other end and one
Two level electrical connections;
Main website 10 also includes a second resistance 13, and its one end is electrically connected with the 3rd signal end 12 and main microprocessing unit 11,
Its other end is electrically connected with second electrical level;
Wherein, the first level is high level, and second electrical level is low level.With the first level for power supply potential Vcc in Fig. 6,
As 24V;Second electrical level is earthing potential Vee, as a example such as 0V, but is not limited thereto.Now effectively enabling signal is height
Level, invalid enable signal is low level.The circuit of switch element and first resistor composition can produce enable signal, circuit
Structure is simple.In a schematic embodiment, the first level is low level, and second electrical level is high level.Now
Effectively enabling signal is low level, and invalid enable signal is high level.As a example in Fig. 5, a switch element is audion, but simultaneously
It is not limited, can also be field effect transistor.
It should be understood that although this specification is according to the description of each embodiment, but not each embodiment only comprises one
Individual independent technical scheme, only for clarity, those skilled in the art should will illustrate this narrating mode of description
Book can also form those skilled in the art permissible through appropriately combined as an entirety, the technical scheme in each embodiment
The other embodiment understanding.
The a series of detailed description of those listed above is only for illustrating of the possible embodiments of the present invention, they
And be not used to limit the scope of the invention, all Equivalent embodiments made without departing from skill spirit of the present invention or change all should
It is included within protection scope of the present invention.
Claims (12)
1. master-slave system, including:
One main website (10);
N number of slave station (2-1,2-2 ..., 2-N);With
One communication bus (30), described main website (10) can by described communication bus (30) respectively with described N number of slave station (2-1,2-2 ...,
2-N) communicate;
Wherein, described N number of slave station (2-1,2-2 ..., 2-N) cascade one by one, and can be activated step by step, described be activated from
Stand and described mesh is configured to from described main website (10) acquisition one destination address and by the bus address of itself by described communication bus (30)
Mark address, N is the positive integer more than or equal to 2.
2. master-slave system according to claim 1 it is characterised in that described cascade N number of slave station (2-1,2-2 ...,
2-N) according to the order being activated respectively be the 1st grade of slave station (2-1), the 2nd grade of slave station (2-2) ..., N level slave station (2-N),
Described N level slave station (2-N) is electrically connected with described main website (10);
Wherein, each described from stand in bus address when being activated be one identical activation address, the described slave station being activated by itself
Bus address be configured to the mode of described destination address and be:Described activation address is updated to described destination address, each described from
The destination address stood all differs.
3. master-slave system according to claim 2 is it is characterised in that when upper electric, the bus address of each described slave station is equal
For an identical initial address, the mode that each described slave station is activated is:Described initial address is updated to described activation address.
4. master-slave system according to claim 3 is it is characterised in that described 1st grade of slave station (2-1) obtains one from outside
Effectively enable signal and be activated, in other N-1 level slave stations every one-level slave station all from previous stage slave station obtain effectively enable signal and
It is activated;Described N level slave station (2-N) effectively enables signal to described main website (10) output after being configured destination address, other
In N-1 level slave station, every one-level slave station effectively enables signal to the output of next stage slave station all after being configured destination address;Described main website
(10) receive terminate after effective enable signal of described N level slave station (2-N) to described N number of slave station (2-1,2-2 ...,
The configuration of bus address 2-N).
5. master-slave system according to claim 4 it is characterised in that
Each described slave station includes:
One from microprocessing unit (21);
One first signal end (22), it can receive described effective enable signal;
One secondary signal end (23), it can export described effective enable signal;With
One address storaging unit (24), for storing the bus address of described slave station;
Described main website (10) includes:
One main microprocessing unit (11), its can by described communication bus (30) respectively with described N number of from microprocessing unit (21) communication;
With
One the 3rd signal end (12), it can receive described effective enable signal from described N level slave station (2-N);
Wherein, first signal end (22) of described 1st grade of slave station (2-1) effectively enable signal source outside with electrically connects, described N level
The secondary signal end (23) of slave station (2-N) is electrically connected with the 3rd signal end (12) of described main website (10), each in other described slave stations
Level first signal end (22) of slave station electrically connect with the secondary signal end (23) of upper level slave station, the every one-level in other described slave stations from
The secondary signal end (23) stood is electrically connected with first signal end (22) of next stage slave station;Bus address configuration process in described slave station
Described in address storaging unit (24) bus address of the described slave station of storage be followed successively by described initial address, described activation address
With described destination address.
6. master-slave system according to claim 5 it is characterised in that
During upper electricity, described in each described slave station, from microprocessing unit (21), an invalid enable signal is exported by described secondary signal end (23),
And the bus address of the described slave station of storage in described address storaging unit (24) is set to described initial address;
After upper electricity, described in each described slave station, read the enable signal (IDD) of described first signal end (22) from microprocessing unit (21),
When the enable signal (IDD) reading from described first signal end (22) be invalid enable signal when, described from microprocessing unit
(21) bus address keeping the described slave station of storage in described address storaging unit (24) is described initial address, and keeps described
Secondary signal end (23) is output as invalid enable signal,
When the enable signal (IDD) reading from described first signal end (22) be effective enable signal when, described from microprocessing unit
(21) bus address of the described slave station of storage in described address storaging unit (24) is updated to described activation from described initial address
Address, described obtains described destination address and by institute by described communication bus (30) from described main website (10) from microprocessing unit (21)
The bus address stating the described slave station of storage in address storaging unit (24) is updated to described destination address, institute from described activation address
State and exported by described secondary signal end (23) after described activation address is updated to described destination address from microprocessing unit (21)
Described effective enable signal;
After upper electricity, described main website (10) reads the enable signal (IDD) of described 3rd signal end (12),
When the enable signal (IDD) reading from described 3rd signal end (12) be invalid enable signal when, described main website (10) with swashed
The bus address of the slave station that the slave station lived is communicated and is activated described in configuring,
When the enable signal (IDD) reading from described 3rd signal end (12) is effective enable signal, it is right that described main website (10) is terminated
Described N number of slave station (2-1,2-2 ..., 2-N) bus address configuration;
Wherein, described invalid enable signal is low level, and described effective enable signal is high level;Or described invalid enable signal is
High level, described effective enable signal is low level.
7. master-slave system according to claim 6 it is characterised in that
Each described slave station also includes:
One switch element (25), it includes:
One input (c), is electrically connected with one first level,
One outfan (a), is electrically connected with described secondary signal end (23), and
One control end (b), is electrically connected from microprocessing unit (21) with described, and
One first resistor (26), its one end and described first signal end (22) and described electrically connect from microprocessing unit (21), its other end with
One second electrical level electrical connection;
Described main website (10) also includes a second resistance (13), its one end and described 3rd signal end (12) and described main microprocessing unit (11)
Electrical connection, its other end is electrically connected with described second electrical level;
Wherein, described first level is high level, and described second electrical level is low level;Or described first level is low level, and
Described second electrical level is high level.
8. in master-slave system bus address collocation method, described master-slave system, including:One main website (10);N number of level
Connection slave station (2-1,2-2 ..., 2-N);With a communication bus (30), described main website (10) can pass through described communication bus (30)
Respectively with described N number of slave station (2-1,2-2 ..., 2-N) communication;
Described collocation method includes:
Be individually activated described N number of cascade slave station (2-1,2-2 ..., 2-N), it is total that each described slave station being activated passes through described communication
Line (30) obtains a destination address from described main website (10) and the bus address of itself is configured to described destination address, N be more than etc.
In 2 positive integer.
9. collocation method according to claim 8 is it is characterised in that described collocation method also includes:
Power-up initializing, the bus address of each described slave station is set to an identical initial address;
Wherein, the mode that each described slave station is activated is:Described initial address is updated to an activation address, described be activated from
The mode that the bus address of itself is configured to described destination address of standing is:Described activation address is updated to described destination address,
Each described be an identical activation address from standing in bus address when being activated, the destination address of each described slave station all differs.
10. collocation method according to claim 9 it is characterised in that described cascade N number of slave station (2-1,2-2 ...,
2-N) according to the order being activated respectively be the 1st grade of slave station (2-1), the 2nd grade of slave station (2-2) ..., N level slave station (2-N),
Described N level slave station (2-N) is electrically connected with described main website (10), and described 1st grade of slave station (2-1) obtains effective an enable from outside and believe
Number and be activated, in other N-1 level slave stations, every one-level slave station all obtains from previous stage slave station and effective enable signal and be activated;Institute
State N level slave station (2-N) and effectively enable signal, other N-1 level slave stations to described main website (10) output after being configured destination address
In every one-level slave station effectively enable signal to the output of next stage slave station all after being configured destination address;Described main website (10) receives
Terminate after effective enable signal of described N level slave station (2-N) to described N number of slave station (2-1,2-2 ..., 2-N) address
Configuration.
11. are used for the slave station in master-slave system, and it can be communicated with a main website (10) by a communication bus (30), described slave station
Including:
One from microprocessing unit (21);
One first signal end (22), it can receive an effective enable signal;
One secondary signal end (23), it can export an effective enable signal;With
One address storaging unit (24), for storing the bus address of described slave station;
Wherein, from microprocessing unit (21), an invalid enable signal is exported by described secondary signal end (23) described in during upper electricity, and will be described
In address storaging unit (24), the bus address of the described slave station of storage is set to an initial address;After upper electricity, described slave station receives institute
State effective described in when enabling signal and being activated from microprocessing unit (21) by store described address storaging unit (24) described from
The bus address stood is updated to an activation address from described initial address, described passes through described communication bus from microprocessing unit (21)
(30) destination address the bus address by the described slave station of storage described address storaging unit (24) are obtained from described main website (10)
Be updated to described destination address from described activation address, described be updated in described activation address from microprocessing unit (21) described
After destination address, described effective enable signal is exported by described secondary signal end (23).
12. slave stations according to claim 11 are it is characterised in that also include:
One switch element (25), it includes:
One input (c), is electrically connected with one first level,
One outfan (a), is electrically connected with described secondary signal end (23), and
One control end (b), is electrically connected from microprocessing unit (21) with described, and
One first resistor (26), its one end and described first signal end (22) and described electrically connect from microprocessing unit (21), its other end with
One second electrical level electrical connection;
Wherein, described first level is high level, and described second electrical level is low level;Or described first level is low level, and
Described second electrical level is high level.
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108388533A (en) * | 2018-02-27 | 2018-08-10 | 浙江中控技术股份有限公司 | A kind of method, apparatus and equipment base for addressing |
CN110166335A (en) * | 2019-04-02 | 2019-08-23 | 深圳市汇川技术股份有限公司 | EtherCAT slave station and slave station synchronous communication method, control system, equipment and storage medium |
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Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1719363A (en) * | 2005-07-27 | 2006-01-11 | 艾默生网络能源有限公司 | Hard ware extension method of programmable logic controller |
CN1783045A (en) * | 2004-12-04 | 2006-06-07 | 鸿富锦精密工业(深圳)有限公司 | System and method for dynamically distributing device address on integrated circuit bus |
CN102012885A (en) * | 2010-09-15 | 2011-04-13 | 开源集成电路(苏州)有限公司 | System and method for realizing communication by adopting dynamic I2C bus |
-
2015
- 2015-08-12 CN CN201510494488.2A patent/CN106445857A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1783045A (en) * | 2004-12-04 | 2006-06-07 | 鸿富锦精密工业(深圳)有限公司 | System and method for dynamically distributing device address on integrated circuit bus |
CN1719363A (en) * | 2005-07-27 | 2006-01-11 | 艾默生网络能源有限公司 | Hard ware extension method of programmable logic controller |
CN102012885A (en) * | 2010-09-15 | 2011-04-13 | 开源集成电路(苏州)有限公司 | System and method for realizing communication by adopting dynamic I2C bus |
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CN108388533A (en) * | 2018-02-27 | 2018-08-10 | 浙江中控技术股份有限公司 | A kind of method, apparatus and equipment base for addressing |
CN110247993A (en) * | 2018-03-09 | 2019-09-17 | 町洋企业股份有限公司 | System containing multiple functional modules and its functional module addressing method |
CN110166335A (en) * | 2019-04-02 | 2019-08-23 | 深圳市汇川技术股份有限公司 | EtherCAT slave station and slave station synchronous communication method, control system, equipment and storage medium |
CN110166335B (en) * | 2019-04-02 | 2021-08-27 | 深圳市汇川技术股份有限公司 | EtherCAT slave station and slave station synchronous communication method, control system, equipment and storage medium |
CN110601943A (en) * | 2019-09-09 | 2019-12-20 | 上海新时达电气股份有限公司 | Communication system based on RS485 bus and communication method thereof |
CN110601943B (en) * | 2019-09-09 | 2021-11-23 | 上海新时达电气股份有限公司 | Communication system based on RS485 bus and communication method thereof |
CN111614492A (en) * | 2020-05-07 | 2020-09-01 | 上海拓智电气有限公司 | Method for multi-site communication system and multi-site communication system |
CN113794785A (en) * | 2021-08-17 | 2021-12-14 | 统一通信(苏州)有限公司 | Method for automatically allocating equipment communication address |
CN114827087A (en) * | 2022-03-21 | 2022-07-29 | 无锡先导智能装备股份有限公司 | Communication system and slave station address allocation method, setting method and device thereof |
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