CN106413264A - Manufacturing method of PCB of solder resist ink plug hole - Google Patents
Manufacturing method of PCB of solder resist ink plug hole Download PDFInfo
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- CN106413264A CN106413264A CN201611029499.4A CN201611029499A CN106413264A CN 106413264 A CN106413264 A CN 106413264A CN 201611029499 A CN201611029499 A CN 201611029499A CN 106413264 A CN106413264 A CN 106413264A
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0094—Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0502—Patterning and lithography
- H05K2203/052—Magnetographic patterning
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
The present invention relates to the technical field of circuit board production and particularly relates to a manufacturing method of a PCB of a solder resist ink plug hole. Through optimizing a first film and a second film used in an exposure process, suitable light transmission point and light shaking point are arranged on the first film and the second film, thus a small part of solder resist ink at a target hole opening is swept away in a development process, thus the explosion of the solder resist ink in a target hole to pollute a target pad in a post-baking process is prevented, the welding reliability of the target pad is improved, and the interconnection between the electronic component and a target pad is not influenced while the false welding of an electronic component and the PCB is not formed.
Description
Technical field
The present invention relates to board production technical field, more particularly, to a kind of manufacture method of the PCB of solder mask consent.
Background technology
PCB (Printed Circuit Board), also known as wiring board, circuit board or printed circuit board, is electronics industry
One of vitals, is the supporter of electronic devices and components, the carrier of electrical connection.The production of PCB includes below scheme：Open plate →
Make at internal layer circuit → pressing → drill flute hole → heavy copper → electric plating of whole board → making outer-layer circuit → making solder mask → surface
Reason → molding.Make solder mask and refer on the PCB having made outer-layer circuit, in addition to the positions such as the pad for welding, hole
It is coated with one layer of solder mask, and cured is carried out to solder mask, thus PCB is played with protection and anti-welding effect.?
When making solder mask, the partial hole on some PCB need to be clogged with solder mask and be solidified, i.e. solder mask consent, and this pores claims
For welding resistance consent.The general flow of solder mask consent is as follows：Welding resistance pre-treatment → solder mask consent → standing → silk-screen resistance
Roasting after solder paste ink → pre-baked → exposure → → mono- section of development.
But the popularization with wiring BGA, the requirement more and more higher to wiring board for the industry.If can not lead to after solder mask consent
Cross pre-baked operation effectively by the ink solidification in welding resistance consent, when welding resistance consent on pad or welding resistance consent hole side from weldering
When the distance of disk is less than 0.1mm, through the spray irrigation of liquid medicine and the purging of high temperature air knife, the welding resistance in welding resistance consent during development
The pad closing on is polluted outside the easy overfolw hole of ink；When baking afterwards, because the solder mask in welding resistance consent is not fully cured, high
Warm baking can make the solder mask in welding resistance consent produce and pollute and close on pad；This all can lead to PCB to weld not with components and parts
Good.Need to be repaired with trimming knife for the bad PCB of this kind of quality, but the method remedied be repaired by trimming knife and easily causes plate
Face scratch is scrapped, and it is low to repair efficiency.
Content of the invention
The manufacture method that the present invention is directed to the PCB of existing solder mask consent clogs solder mask the mistake solidifying in the hole
Cheng Zhong, in developing procedure, the solder mask of in the hole is easily excessive and solder mask of in the hole in rear roasting operation easily produce from
And pollute and close on pad, lead to the problem of PCB and components and parts failure welding, a kind of making of the PCB of solder mask consent is provided
Method.
For achieving the above object, the present invention employs the following technical solutions.
A kind of manufacture method of the PCB of solder mask consent, comprises the following steps：
S1 pre-treatment：Cleaning and the plate face of roughening production plate；Described production plate has made outer-layer circuit thereon, described
Produce plate and be provided with the target hole that need to clog solder mask, produce the solder side of plate and component side is provided with target land, described
Target land is minimum with target hole vertical dimension pad on solder side and component side respectively.
S2 consent and silk-screen welding resistance：With solder mask clog produce plate on target hole, and produce plate solder side and
Silk-screen solder mask on component side；Then it is statically placed in producing plate under normal pressure or to production plate evacuation process；Then pre-baked life
Produce plate.
Preferably, with the technological parameter that solder mask clogs target hole it is：Using 36T grenadine, squeegee speed is 150 ±
50mm/s, half tone height is 5 ± 2mm, and angle of attack angle is 12 ± 3 °.
Preferably, the relation of the H thick with the top layer copper producing plate that produce the time T that stands at ambient pressure of plate is：35mm≤H ＜
During 50mm, T=30-45min；During 50mm≤H ＜ 70mm, T=45-60min；During 70mm≤H ＜ 90mm, T=60-90min；H
During >=90mm, T=90-120min.
S3 is exposed and developed：Using the first welding resistance film, the component side producing plate is exposed processing, using the second resistance
The weldering film is exposed processing to the solder side producing plate.Then development treatment is carried out to producing plate according to prior art.
On the described first welding resistance film, position corresponding with target hole is the target land pair in the first hole position, with component side
The position answered is the first pad position, and described first hole position is D1 with the vertical dimension of the first pad position；On the second welding resistance film with
The corresponding position of target hole is the second hole position, and position corresponding with the target land on solder side is the second pad position, described the
Two hole positions are D2 with the vertical dimension of the second pad position.
Be provided with described first hole position and the second hole position 0.08mm diaphanous spot or than target hole monolateral little 0.04mm
It is in the light a little.
Preferably, described 0 ＜ D1 ＜ 0.1mm, 0 ＜ D2 ＜ 0.1mm, and during D1 ＜ D2；Or described 0 ＜ D1 ＜ 0.1mm, D2
During >=0.1mm；Or described D1=0, during D2 >=0.1mm；Or described D1=0, during D2=0；Or described first hole position and the first weldering
Disk position is intersected, and during D2 >=0.1mm；Or described first hole position is intersected with the first pad position, and during D2=0；At the first hole position
Setting monolateral little 0.04mm's than target hole is in the light a little, setting and the equal-sized diaphanous spot of target hole at the second hole position.
Preferably, described 0 ＜ D1 ＜ 0.1mm, 0 ＜ D2 ＜ 0.1mm, and during D2 ＜ D1；Described 0 ＜ D2 ＜ 0.1mm, D1 >=
During 0.1mm；Described D1 >=0.1mm, during D2=0；Described second hole position is intersected with the second pad position, and during D1 >=0.1mm；Described
Second hole position is intersected with the first pad position, and during D1=0；At the second hole position, setting monolateral little 0.04mm's than target hole is in the light
Point, setting and the equal-sized diaphanous spot of target hole at the first hole position.
Preferably, described first hole position is intersected with the first pad position, and during 0 ＜ D2 ＜ 0.1mm, arranges at the first hole position
The diaphanous spot of monolateral little 0.08mm than target hole, setting and the equal-sized diaphanous spot of target hole at the second hole position.
Preferably, described second hole position is intersected with the second pad position, and during 0 ＜ D1 ＜ 0.1mm, arranges at the second hole position
The diaphanous spot of monolateral little 0.08mm than target hole, setting and the equal-sized diaphanous spot of target hole at the first hole position.
Preferably, described first hole position is intersected with the first pad position, and when the second hole position is intersected with the second pad position,
At one hole position setting than target hole monolateral little 0.04mm be in the light a little, at the second hole position setting than target hole monolateral little 0.08mm
Diaphanous spot.
It is furthermore preferred that the first hole position is intersected with the first pad position, the second hole position is intersected with the second pad position, and described target
During the aperture ＞ 0.4mm in hole, carry out also including heavy exposure step after development treatment to producing plate, it is right that described heavy exposure step refers to
Produce plate and carry out full plate exposure, exposure energy is 800MJ, time of exposure is 20-25s.
Roasting after S4：Baking produces plate, makes the solder mask heat cure on production plate.
Preferably, it is sequentially placed into baking 30min in 55 DEG C, 65 DEG C, 75 DEG C, 85 DEG C, 95 DEG C and 110 DEG C by producing plate；So
After continue to be placed in 155 DEG C baking 60min by producing plate.
Operation after S5：According to prior art to produce plate carry out successively being surface-treated, molding and detection operation, prepared PCB
Finished product.
Compared with prior art, the invention has the beneficial effects as follows：The present invention passes through to optimize first used in exposure process
The film and second film, arrange appropriately sized diaphanous spot and chopping point on first film and second film, make target hole hole
Fraction solder mask at mouthful is washed in developing process, prevents the welding resistance oil of target in the hole during rear baking with this
Ink is produced and is polluted target land, thus improving the soldering reliability of target land, is ensureing electronic devices and components with PCB welding not
Can be formed while rosin joint it is ensured that the interconnection between components and parts and target land is unaffected.
Specific embodiment
In order to more fully understand the technology contents of the present invention, with reference to specific embodiment to technical scheme
It is described further and illustrate.
Embodiment
The present embodiment provides a kind of manufacture method of the PCB of solder mask consent, and especially one kind is designed with welding resistance consent
The manufacture method being less than the PCB of 0.1mm with the distance of nearest pad on plate.Comprise the following steps that：
(1) there is the production plate of outer-layer circuit
According to prior art, sequentially pass through sawing sheet → negative film technique and make internal layer circuit → pressing → boring → sink copper → entirely
Plate plating → positive/negative film technique makes outer-layer circuit, is fabricated to the life with outer-layer circuit by core material and outer copper foil
Produce plate；This production plate is provided with the target hole that need to clog solder mask, produces the solder side of plate and component side is provided with target weldering
Disk, target land refers to minimum with target hole vertical dimension pad on solder side and component side.
(2) pre-treatment
Carry out nog plate process to producing plate, for cleaning plate face and roughening plate face, subsequently to strengthen plate face and welding resistance oil
The adhesion of ink, prevents from getting rid of oil.
(3) consent and silk-screen welding resistance
Clog the target hole producing on plate with solder mask, and according to prior art in the solder side producing plate and component side
Upper silk-screen solder mask；Then it is statically placed in producing plate under normal pressure or to production plate evacuation process (keeping vacuum 5-15min)；
Then it is placed in pre-baked 30-35min at 75 DEG C by producing plate.
With the technological parameter that solder mask clogs target hole it is：Using 36T grenadine, squeegee speed is 150 ± 50mm/s, net
Version height is 5 ± 2mm, and angle of attack angle is 12 ± 3 °.
The relation of the H thick with the top layer copper producing plate that produce the time T that stands at ambient pressure of plate is：During 35mm≤H ＜ 50mm,
T=30-45min；During 50mm≤H ＜ 70mm, T=45-60min；During 70mm≤H ＜ 90mm, T=60-90min；H≥90mm
When, T=90-120min.
(4) exposed and developed
Using the first welding resistance film, the component side producing plate is exposed processing, using the second welding resistance film to production plate
Solder side be exposed process.
On the described first welding resistance film, position corresponding with target hole is the target land pair in the first hole position, with component side
The position answered is the first pad position, and described first hole position is D1 with the vertical dimension of the first pad position；On the second welding resistance film with
The corresponding position of target hole is the second hole position, and position corresponding with the target land on solder side is the second pad position, described the
Two hole positions are D2 with the vertical dimension of the second pad position.
Be provided with described first hole position and the second hole position diaphanous spot or than target hole monolateral little 0.04mm be in the light a little, tool
Body is as follows：Described 0 ＜ D1 ＜ 0.1mm, 0 ＜ D2 ＜ 0.1mm, and during D1 ＜ D2；Or described 0 ＜ D1 ＜ 0.1mm, D2 >=0.1mm
When；Or described D1=0, during D2 >=0.1mm；Or described D1=0, during D2=0；Or described first hole position and the first pad position phase
Hand over, and during D2 >=0.1mm；Or described first hole position is intersected with the first pad position, and during D2=0；Setting ratio at the first hole position
The monolateral little 0.04mm's of target hole is in the light a little, setting and the equal-sized diaphanous spot of target hole at the second hole position.Described 0 ＜ D1
＜ 0.1mm, 0 ＜ D2 ＜ 0.1mm, and during D2 ＜ D1；Described 0 ＜ D2 ＜ 0.1mm, during D1 >=0.1mm；Described D1 >=0.1mm, D2
When=0；Described second hole position is intersected with the second pad position, and during D1 >=0.1mm；Described second hole position and the first pad position phase
Hand over, and during D1=0；At the second hole position setting than target hole monolateral little 0.04mm be in the light a little, at the first hole position setting with
The equal-sized diaphanous spot of target hole.Described first hole position is intersected with the first pad position, and during 0 ＜ D2 ＜ 0.1mm, in the first hole
The diaphanous spot of setting monolateral little 0.08mm than target hole at position, setting and the equal-sized printing opacity of target hole at the second hole position
Point.Described second hole position is intersected with the second pad position, and during 0 ＜ D1 ＜ 0.1mm, at the second hole position, setting is more monolateral than target hole
The diaphanous spot of little 0.08mm, setting and the equal-sized diaphanous spot of target hole at the first hole position.Described first hole position and first
Pad position is intersected, and when the second hole position is intersected with the second pad position, arranges than target hole monolateral little 0.04mm at the first hole position
Be in the light a little, at the second hole position setting than target hole monolateral little 0.08mm diaphanous spot.With form, above-mentioned various situations are returned
Class is as follows：
In table a refer to arrange than target hole monolateral little 0.04mm be in the light a little, b refer to setting than target hole monolateral little 0.08mm
Diaphanous spot, c refers to setting and the equal-sized diaphanous spot of target hole.
When the first hole position is intersected with the first pad position, the second hole position is intersected with the second pad position, and the hole of described target hole
During the ＞ 0.4mm of footpath, carry out also including heavy exposure step after development treatment to producing plate.Described heavy exposure step refers to production plate
Carry out full plate exposure, exposure energy is 800MJ, time of exposure is 20-25s.
Then development treatment is carried out to producing plate according to prior art, remove not by the solder mask of photocuring.
(5) bake afterwards
It is respectively placed in baking 30min in 55 DEG C, 65 DEG C, 75 DEG C, 85 DEG C, 95 DEG C and 110 DEG C by producing plate；Then proceeding to will
Produce plate and be placed in baking 60min in 155 DEG C, make the solder mask heat cure on production plate.Solder mask solidification in target hole,
Form welding resistance consent.
(6) surface treatment, detection and molding
It is surface-treated on production plate according to prior art and by design requirement, then test produces the electrical resistance of plate
Energy, gong profile and the outward appearance taking a sample test plate again, prepared PCB finished product.
The above only to further illustrate the technology contents of the present invention with embodiment, is easier to understand in order to reader,
But do not represent embodiments of the present invention and be only limitted to this, any technology done according to the present invention extends or recreates, all by this
Bright protection.
Claims (10)
1. a kind of manufacture method of the PCB of solder mask consent is it is characterised in that comprise the following steps：
S1 pre-treatment：Cleaning and the plate face of roughening production plate；Described production plate has made outer-layer circuit thereon, described production
Plate is provided with the target hole that need to clog solder mask, produces the solder side of plate and component side is provided with target land, described target
Pad is minimum with target hole vertical dimension pad on solder side and component side respectively；
S2 consent and silk-screen welding resistance：Clog the target hole producing on plate with solder mask, and in the solder side producing plate and element
Silk-screen solder mask on face；Then it is statically placed in producing plate under normal pressure or to production plate evacuation process；
S3 is exposed and developed：Using the first welding resistance film, the component side producing plate is exposed processing, luxuriant and rich with fragrance using the second welding resistance
Woods is exposed processing to the solder side producing plate；Then development treatment is carried out to producing plate according to prior art；
On the described first welding resistance film, position corresponding with target hole is the first hole position, corresponding with the target land on component side
Position is the first pad position, and described first hole position is D1 with the vertical dimension of the first pad position；With target on the second welding resistance film
The corresponding position in hole is the second hole position, and position corresponding with the target land on solder side is the second pad position, described second hole
Position is D2 with the vertical dimension of the second pad position；
Be provided with described first hole position and the second hole position diaphanous spot or than target hole being in the light a little of monolateral little 0.04mm；
Roasting after S4：Baking produces plate, makes the solder mask heat cure on production plate；
Operation after S5：According to prior art to produce plate carry out successively being surface-treated, molding and detection operation, prepared PCB finished product.
2. according to claim 1 a kind of manufacture method of the PCB of solder mask consent it is characterised in that in step S3, institute
State 0 ＜ D1 ＜ 0.1mm, 0 ＜ D2 ＜ 0.1mm, and during D1 ＜ D2；Or described 0 ＜ D1 ＜ 0.1mm, during D2 >=0.1mm；Or it is described
When D1=0, D2 >=0.1mm；Or described D1=0, during D2=0；Or described first hole position is intersected with the first pad position, and D2 >=
During 0.1mm；Or described first hole position is intersected with the first pad position, and during D2=0；At the first hole position, setting is more monolateral than target hole
Little 0.04mm's is in the light a little, setting and the equal-sized diaphanous spot of target hole at the second hole position.
3. according to claim 1 a kind of manufacture method of the PCB of solder mask consent it is characterised in that in step S3, institute
State 0 ＜ D1 ＜ 0.1mm, 0 ＜ D2 ＜ 0.1mm, and during D2 ＜ D1；Described 0 ＜ D2 ＜ 0.1mm, during D1 >=0.1mm；Described D1 >=
When 0.1mm, D2=0；Described second hole position is intersected with the second pad position, and during D1 >=0.1mm；Described second hole position and the first weldering
Disk position is intersected, and during D1=0；At the second hole position, setting monolateral little 0.04mm's than target hole is in the light a little, at the first hole position
Setting and the equal-sized diaphanous spot of target hole.
4. according to claim 1 a kind of manufacture method of the PCB of solder mask consent it is characterised in that in step S3, institute
State the first hole position to intersect with the first pad position, and during 0 ＜ D2 ＜ 0.1mm, setting is monolateral less than target hole at the first hole position
The diaphanous spot of 0.08mm, setting and the equal-sized diaphanous spot of target hole at the second hole position.
5. according to claim 1 a kind of manufacture method of the PCB of solder mask consent it is characterised in that in step S3, institute
State the second hole position to intersect with the second pad position, and during 0 ＜ D1 ＜ 0.1mm, setting is monolateral less than target hole at the second hole position
The diaphanous spot of 0.08mm, setting and the equal-sized diaphanous spot of target hole at the first hole position.
6. according to claim 1 a kind of manufacture method of the PCB of solder mask consent it is characterised in that in step S3, institute
State the first hole position to intersect with the first pad position, and when the second hole position is intersected with the second pad position, mesh is compared in setting at the first hole position
The mark monolateral little 0.04mm's in hole is in the light a little, the diaphanous spot of setting monolateral little 0.08mm than target hole at the second hole position.
7. according to claim 6 a kind of manufacture method of the PCB of solder mask consent it is characterised in that described target hole
Aperture ＞ 0.4mm when, to produce plate carry out also including heavy exposure step after development treatment, described heavy exposure step refers to opposite
Produce plate and carry out full plate exposure, exposure energy is 800MJ, time of exposure is 20-25s.
8. a kind of manufacture method of the PCB of solder mask consent, will it is characterised in that in step S4 according to claim 1
Produce plate and be sequentially placed into baking 30min in 55 DEG C, 65 DEG C, 75 DEG C, 85 DEG C, 95 DEG C and 110 DEG C；Then proceed to be placed in producing plate
60min is toasted in 155 DEG C.
9. a kind of manufacture method of the PCB of solder mask consent it is characterised in that in step S2, is used according to claim 1
Solder mask clog target hole technological parameter be：Using 36T grenadine, squeegee speed is 150 ± 50mm/s, and half tone height is 5
± 2mm, angle of attack angle is 12 ± 3 °.
10. according to claim 9 a kind of manufacture method of the PCB of solder mask consent it is characterised in that in step S2,
The relation of the H thick with the top layer copper producing plate that produce the time T that stands at ambient pressure of plate is：During 35mm≤H ＜ 50mm, T=30-
45min；During 50mm≤H ＜ 70mm, T=45-60min；During 70mm≤H ＜ 90mm, T=60-90min；During H >=90mm, T=
90-120min.
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| CN201611029499.4A CN106413264B (en) | 2016-11-14 | 2016-11-14 | A kind of production method of the PCB of solder mask consent |
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| CN201611029499.4A CN106413264B (en) | 2016-11-14 | 2016-11-14 | A kind of production method of the PCB of solder mask consent |
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| CN107613656A (en) * | 2017-08-31 | 2018-01-19 | 景旺电子科技(龙川)有限公司 | It is a kind of to improve the bad method of anti-welding thick exposed copper |
| CN107683023A (en) * | 2017-09-19 | 2018-02-09 | 珠海精毅电路有限公司 | The method of aperture bleed when preventing high-temperature baking after printed substrate via hole consent |
| CN109257886A (en) * | 2018-10-23 | 2019-01-22 | 景旺电子科技(龙川)有限公司 | A kind of rigid-flexible combination multi-layer board solder-resisting manufacturing methods |
| CN109298595A (en) * | 2018-11-14 | 2019-02-01 | 大连崇达电路有限公司 | For boring the exposure film of the above welding resistance single layer opening of nozzle aperture 0.8mm |
| CN110798983A (en) * | 2019-11-18 | 2020-02-14 | 高德（江苏）电子科技有限公司 | Improvement method applied to PCB half plug hole oil spilling upper bonding pad |
| CN111511114A (en) * | 2019-01-31 | 2020-08-07 | 惠东县建祥电子科技有限公司 | Method for improving SMDPAD on solder resist oil bleeding of PCB |
| CN114501833A (en) * | 2020-10-23 | 2022-05-13 | 深南电路股份有限公司 | Method for processing solder mask on circuit board |
| CN115003031A (en) * | 2022-06-15 | 2022-09-02 | 富乐德科技发展（大连）有限公司 | Processing method for improving poor hole plugging of solder-resisting thick copper plate |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107613656A (en) * | 2017-08-31 | 2018-01-19 | 景旺电子科技(龙川)有限公司 | It is a kind of to improve the bad method of anti-welding thick exposed copper |
| CN107613656B (en) * | 2017-08-31 | 2020-08-11 | 景旺电子科技(龙川)有限公司 | Method for improving poor exposure of metal-based thick copper plate |
| CN107683023A (en) * | 2017-09-19 | 2018-02-09 | 珠海精毅电路有限公司 | The method of aperture bleed when preventing high-temperature baking after printed substrate via hole consent |
| CN109257886A (en) * | 2018-10-23 | 2019-01-22 | 景旺电子科技(龙川)有限公司 | A kind of rigid-flexible combination multi-layer board solder-resisting manufacturing methods |
| CN109298595A (en) * | 2018-11-14 | 2019-02-01 | 大连崇达电路有限公司 | For boring the exposure film of the above welding resistance single layer opening of nozzle aperture 0.8mm |
| CN111511114A (en) * | 2019-01-31 | 2020-08-07 | 惠东县建祥电子科技有限公司 | Method for improving SMDPAD on solder resist oil bleeding of PCB |
| CN110798983A (en) * | 2019-11-18 | 2020-02-14 | 高德（江苏）电子科技有限公司 | Improvement method applied to PCB half plug hole oil spilling upper bonding pad |
| CN110798983B (en) * | 2019-11-18 | 2022-08-19 | 高德(江苏)电子科技股份有限公司 | Improvement method applied to PCB half-plug hole oil spilling upper bonding pad |
| CN114501833A (en) * | 2020-10-23 | 2022-05-13 | 深南电路股份有限公司 | Method for processing solder mask on circuit board |
| CN114501833B (en) * | 2020-10-23 | 2024-05-14 | 深南电路股份有限公司 | Processing method of solder mask layer on circuit board |
| CN115003031A (en) * | 2022-06-15 | 2022-09-02 | 富乐德科技发展（大连）有限公司 | Processing method for improving poor hole plugging of solder-resisting thick copper plate |
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