CN106411564B - For detecting the device and method of ethernet frame - Google Patents
For detecting the device and method of ethernet frame Download PDFInfo
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- CN106411564B CN106411564B CN201610592947.5A CN201610592947A CN106411564B CN 106411564 B CN106411564 B CN 106411564B CN 201610592947 A CN201610592947 A CN 201610592947A CN 106411564 B CN106411564 B CN 106411564B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/407—Bus networks with decentralised control
- H04L12/413—Bus networks with decentralised control with random access, e.g. carrier-sense multiple-access with collision detection (CSMA-CD)
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/50—Testing arrangements
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/08—Configuration management of networks or network elements
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/08—Configuration management of networks or network elements
- H04L41/0803—Configuration setting
- H04L41/0823—Configuration setting characterised by the purposes of a change of settings, e.g. optimising configuration for enhancing reliability
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/08—Configuration management of networks or network elements
- H04L41/0803—Configuration setting
- H04L41/0823—Configuration setting characterised by the purposes of a change of settings, e.g. optimising configuration for enhancing reliability
- H04L41/0826—Configuration setting characterised by the purposes of a change of settings, e.g. optimising configuration for enhancing reliability for reduction of network costs
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/10—Active monitoring, e.g. heartbeat, ping or trace-route
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/22—Parsing or analysis of headers
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2101/00—Indexing scheme associated with group H04L61/00
- H04L2101/60—Types of network addresses
- H04L2101/618—Details of network addresses
- H04L2101/622—Layer-2 addresses, e.g. medium access control [MAC] addresses
Abstract
The present invention relates to a kind of for detecting the device and method of ethernet frame.The Ethernet detection circuit for including in the equipment for detecting ethernet frame includes: the byte counter received, is configured as calculating the byte count value of the data received；Mask and pattern storage unit are configured as being calculated the mask data of the pattern comprising frame based on calculated byte count value and compare data；Comparator is configured as based on calculated mask data and compares data and determine whether the data received are corresponding with the target data to be detected；And detection signal generator, it is configured as output detection signal corresponding with determining result.
Description
Technical field
The present invention relates to the device and method for detecting ethernet frame, and more particularly relate to detection Ethernet net
The equipment of ethernet frame in the field of network communication.
Background technique
Ethernet is the most typically short range communication network of bus structures.In order to transmit data over ethernet, using having
The Carrier Sense Multiple Access (CSMA/CD) of collision detection.
During transmitting data by ethernet frame, ethernet header and tail portion are added in internet layer (its
For high level) in generate data grouping and then transmitted via medium.When data are received by ethernet frame, header and tail portion
It is separated from each other, and data grouping is sent to network layer.
Ethernet frame includes: that (it is used to notify the transmission of ethernet frame to receiver and offer being capable of area for preamble field
0 and 1 synchronization signal in not received frame), starting delimiter field (it indicates the starting position of the frame), purpose MAC
(it indicates the number with the transmission for the variable-length for including in data field for location field, source MAC field, length field
According to size), (it enables receiver host to identify that the data during data transmission become for data field and checksum field
The appearance of the mistake of change).
In order to handle Ethernet data, the ethernet frame received needs to be detected and the Ethernet by wherein receiving
Frame can be transferred according to the result of detection come the path of proper treatment.
Therefore, it is necessary to the ethernet frame detection devices that one kind can effectively detect ethernet frame.
Summary of the invention
One aspect of the present invention is effectively to detect ethernet frame in various ways.
Another aspect of the present invention is to reduce the production cost of ethernet frame detection circuit and simplifies its configuration.
According to an aspect of the present invention, the ethernet frame detection circuit for detecting ethernet frame includes: to receive
Byte counter is configured as calculating the byte count value of the data received；Mask and pattern storage unit, are configured
To calculate the mask data of the pattern comprising frame based on calculated byte count value and comparing data；Comparator is matched
Be set to based on calculated mask data and compare data come determine the data received whether with the target data pair to be detected
It answers；And detection signal generator, it is configured as output detection signal corresponding with determining result.
Mask and pattern storage unit may include mask and pattern storage memory, be configured as storage for ignoring
The mask register of the position of detection and the pattern register of the instruction frame to be detected are not needed, and is configured as covering based on storage
Code memory and pattern register come calculate mask data corresponding with calculated byte count value and compared with data.
Mask and pattern storage unit may include in random access memory (RAM), read-only memory (ROM) and flash memory
At least one.
Mask and pattern storage unit may include: mask register column, are configured as storage and do not need for ignoring
The mask register of the position of detection；First multiplexer (mux) is configured as based on mask register and calculated byte
Numerical value calculates mask data；Pattern register is configured as the pattern register of the storage instruction frame to be detected；And the
Two mux are configured as comparing data based on pattern register and calculated byte count value to calculate.
Comparator may include: first comparator, is configured as ignoring based on calculated mask data and is receiving
To data in do not need detection position；And second comparator, it is configured as to connect based on calculated relatively data
The data received are compared with the target data to be detected.
Using embodiment according to the present invention for detecting the device and method of ethernet frame, ethernet frame can pass through
Various configurations are to detect, and the performance requirement for ethernet frame detection device can be satisfied.
Furthermore, it is possible to reduce the production cost of ethernet frame detection circuit and can simplify configuration.
Detailed description of the invention
Fig. 1 is the block diagram for showing the configuration of Ethernet system of embodiment according to the present invention.
Fig. 2 is the block diagram for showing the configuration of Ethernet detection circuit of embodiment according to the present invention.
Fig. 3 is the flow chart for showing the operation of Ethernet detection circuit of embodiment according to the present invention.
Fig. 4 is the Ethernet detection circuit of the mask for showing embodiment according to the present invention and the configuration of pattern storage unit
Block diagram.
Fig. 5 is the Ethernet inspection for the configuration for showing mask and pattern storage unit according to another embodiment of the invention
The block diagram of slowdown monitoring circuit.
Specific embodiment
Hereinafter, it will be described in detail with reference to the accompanying drawings the embodiment of the present invention.As it is used herein, suffix " module " and
" unit " be increased and convertibly use the preparation to promote the specification and be not intended to meaning that suggestion is therebetween distinguished or
Function.
Realize their advantage and feature of the invention with reference to the accompanying drawings from the description of exemplary embodiment herein below
In become apparent.However, can be real in various different formats the present invention is not limited to exemplary embodiment disclosed herein
It is existing.Exemplary embodiment is provided for being properly completed the disclosure and for completely to those of this field skill
Art personnel convey the scope of the present invention.It should be noted that the scope of the present invention is only defined by the claims.Similar reference symbol is entire
Similar components are referred in specification.
During describing the embodiment of the present invention disclosed in the specification, if it is determined that these descriptions can be not
Subject of the present invention must be obscured, then can be not described in detail related known function and component.In view of in the embodiment of the present invention
The function of counter element limit the term that will be used below.
It should be understood that the present invention is not limited to the following examples and embodiment is provided for only illustrative purpose.
The scope of the present invention should only be shown by the following claims and their equivalents.The definition of term can depend on user or operation
Intention, legal precedent etc. of member and change.Therefore, term should be limited based on the whole instruction.
It will be understood that flow chart illustrates and/or each frame and flow chart of block diagram illustrate and/or the combination of each frame of block diagram can
To be realized by computer program instructions.These computer instructions can be supplied to general purpose computer, special purpose computer or other
The processor of programmable data processing device is to generate machine, so that via computer or other programmable data processing devices
The instruction that processor executes creates for realizing the device for the function of specifying in flowchart and or block diagram or frame.These computers
Program instruction can be stored in the meter for instructing computer or other programmable data processing devices to run in a specific way
Calculation machine is available or computer-readable memory in, enable computer be used or computer-readable memory in the instruction production that stores
Raw product of the production comprising the instruction for realizing the function of being specified in flowchart and or block diagram or frame.Computer program refers to
Order can also be loaded in computer or other programmable data processing devices so that setting in computer or other may be programmed
Standby upper execution series of operation steps, can realize process to generate computer, so that on computer or other programmable devices
The instruction of execution is provided for realizing the process for the function of specifying in flowchart and or block diagram or frame.
In addition, each frame or each step in flowchart or block diagram can indicate to include specified for executing (one or more)
The part of the modules of one or more executable instructions of logic function, segment or code.In addition, in some alternative embodiments
In, it is noted that each function described in each frame or each step can execute except specified sequence.For example, can be basic
Last time, which executes two continuous frames or step or can sometimes depend on corresponding function, executes two companies with reverse sequence
Continuous frame or step.
Hereinafter, the Ethernet system 10 of embodiment according to the present invention will be described referring to Fig.1.
Fig. 1 is the block diagram for showing the configuration of Ethernet system of embodiment according to the present invention.
Referring to Fig.1, Ethernet system 10 includes ethernet network 100, physical interface unit 200 and Ethernet detection device
400。
Ethernet network 100 can indicate physical communication network.For example, ethernet network 100 can indicate bus structures
Local area network (LAN).
Physical interface unit 200 can be to be connected to the interface of ethernet network 100 to receive data.Ethernet detection is set
Standby 400 can detecte the ethernet frame of the data received.
Ethernet detection device 400 may include multiple Ethernet detection circuit 300a, 300b ..., 300n.
Here, each Ethernet detection circuit can detecte a frame of the maximum length with L byte.As a result, with
Too net detection device 400 can by multiple Ethernet detection circuit 300a including n Ethernet detection circuit,
300b ..., 300n detects n frame.
For ease of description, reference number " 300 " will be assigned to Ethernet detection circuit.
Hereinafter, Ethernet detection circuit 300 will be described in detail referring to Fig. 2.
Fig. 2 is the block diagram for showing the configuration of Ethernet detection circuit of embodiment according to the present invention.
Referring to Fig. 2, Ethernet detection circuit 300 includes byte counter 310, mask and the pattern storage unit received
320, comparator 330 and detection signal generator 340.
The counter 310 received can count the byte of the ethernet frame of the data received.The word received as a result,
Section counter 310 can calculate the byte count value of the data received.The byte counter 310 received can also will calculate
Count value out is sent to mask and pattern storage unit 320 and detection signal generator 340.
Mask and pattern storage unit 320 can be calculated and be calculated based on the mask register of storage and pattern register
The corresponding mask data of count value out and compare data.
Here, mask register can be the length with L byte and the register of instruction bitmask.Therefore, mask
Register can indicate the register for ignoring the position for not needing detection.Mask data can indicate and calculated count value
Corresponding mask register.
Pattern register can be the length with L byte and the register of indicating bit Comparing patterns.Therefore, pattern is posted
Storage can indicate the register for being used to indicate the pattern for the frame to be detected.Comparing data can indicate and calculated count value
Corresponding pattern register.
Comparator 330 by calculated mask data and can compare data and be compared with the data received.For example,
Comparator 330 can ignore the position that detection is not needed in the data received based on calculated mask data.Comparator
330 can also detect the pattern for the frame to detect in the data received based on calculated relatively data.Here, comprising
The data of the pattern for the frame to be detected are properly termed as target data.Comparator 330.Comparison result is sent to by comparator 330
Detect signal generator 340.
Meanwhile comparator 330 may include multiple comparators.For example, comparator 330 may include first comparator 331
With the second comparator 332.
First comparator 331 can be ignored based on calculated mask data not to be needed to detect in the data received
Position.
Second comparator 332 can be based on the data and the number of targets to be detected that calculated relatively data will receive
According to being compared.
The data received can successively be transferred to first comparator 331 and the second comparator 332.
Detection signal generator 340 exports detection signal based on comparison result.
Detection signal generator 340 can export detection signal, and whether the frame of maximum length of the instruction with L byte
It has been detected as the frame to be detected.
For example, detection signal generator 340 can export 1 when detecting the frame to be detected.When the frame detected is not
When the frame to be detected, detection signal generator 340 can export 0.
Hereinafter, the operation of Ethernet detection circuit 300 will be described based on above description.
Fig. 3 is the flow chart of the operation of the Ethernet detection circuit of embodiment according to the present invention.
Referring to Fig. 3, the byte counter 310 of Ethernet detection circuit received is calculated just in the byte of received data
Count value (S110).
The byte counter 310 received can count in ethernet frames just in the word of received or received data
Section.The byte counter 310 received as a result, can calculate the byte count value just in received data.The byte received
Calculated count value can be sent to mask and pattern storage unit 320 and detection signal generator 340 by counter 310.
The mask and pattern storage unit 320 of Ethernet detection circuit 300 are calculated separately based on calculated count value
Mask data and compare data (S120).
Mask and pattern storage unit 320 can be calculated and be calculated based on the mask register of storage and pattern register
The corresponding mask data of count value out and compare data.
Example will be described referring to Fig. 4.
Fig. 4 is the Ethernet detection circuit of the mask for showing embodiment according to the present invention and the configuration of pattern storage unit
Block diagram.
Referring to Fig. 4, the mask and pattern storage unit 320 of Ethernet detection circuit 300 may include mask register column
321, the first multiplexer (mux) 322, pattern array of registers 323 and the 2nd mux 324.
Mask register column 321 can store mask register.
First mux 322 can be deposited based on calculated count value and the mask stored in mask register column 321
Device calculates mask data.
For example, the first mux 322 it is contemplated that calculated count value alternatively signal is arranged from mask register
Selection mask data in the mask register stored in 321.
Calculated relatively mask data can be transferred to comparator 330 by the first mux 322.For example, the first mux 322
Calculated mask data can be transferred to first comparator 331.
Pattern array of registers 323 can store pattern register.
2nd mux 324 can be deposited based on calculated count value and the pattern stored in pattern array of registers 323
Device compares data to calculate.
For example, calculated count value can be considered in the 2nd mux 324, alternatively signal comes from pattern array of registers
Data are compared in selection in the pattern register stored in 323.
Calculated relatively data can be transferred to comparator 330 by the 2nd mux 324.For example, the 2nd mux324 can be with
Calculated relatively data are transferred to the second comparator 332.
Hereinafter, another embodiment will be described referring to Fig. 5.
Fig. 5 is the Ethernet inspection for the configuration for showing mask and pattern storage unit according to another embodiment of the invention
The block diagram of slowdown monitoring circuit.
Referring to Fig. 5, the mask and pattern storage unit 320 of Ethernet detection circuit 300 include that mask and pattern storage are deposited
Reservoir 327.
Mask and pattern storage memory 327 can store mask register and pattern register.Mask and pattern storage
Memory 327 can calculate mask corresponding with calculated count value based on the mask register of storage and pattern register
Data and compare data.Mask and pattern storage memory 327 by calculated mask data and can compare data and are sent to
Comparator 330.For example, calculated mask data can be sent to first comparator by mask and pattern storage memory 327
331 and by it is calculated relatively data be sent to the second comparator 332.
Mask and pattern storage memory 327 may include various types of memories.For example, mask and pattern storage are deposited
Reservoir 327 may include at least one of random access memory (RAM), read-only memory (ROM) and flash memory.
Ethernet detection circuit 300 including mask and pattern storage memory 327 can reduce device such as d type flip flop
Use.It is thereby possible to reduce the production cost of Ethernet detection circuit, and the half of composition Ethernet detection circuit can be reduced
The size of conductor chip.
Description will be provided referring back to Fig. 3.
The comparator 330 of Ethernet detection circuit 300 is determined with data are compared based on calculated mask data and is received
To data it is whether corresponding with the data to be detected (S130).
Calculated relatively data can be compared by comparator 330 with the data received.
It does not need to examine in the data received for example, comparator 330 can be ignored based on calculated mask data
The position of survey.Comparator 330 is also based on calculated relatively data to detect the frame to be detected in the data received
Pattern.Here, the data of the pattern comprising the frame to be detected are properly termed as target data.Therefore, comparator 330 can be determined and be connect
Whether the data received are corresponding with the target data to be detected.Comparator 330 can transmit basis to detection signal generator 340
Mask data and the result of determination that compares data compared with the data received.
As described above, comparator 330 may include multiple comparators.
For example, comparator 330 may include first comparator 331 and the second comparator 332.
First comparator 331 can be ignored based on calculated mask data not to be needed to detect in the data received
Position, and the second comparator 332 can be based on the calculated relatively data that will receive of data and the number of targets to be detected
According to being compared.Comparison result can be sent to detection signal generator by first comparator 331 and the second comparator 332
340。
The detection signal generator 340 of Ethernet detection circuit 300 exports detection signal corresponding with definitive result
(S140)。
Detection signal generator 340 exports detection signal based on the definitive result of delivering.
Detection signal generator 340 can export detection signal, and whether the frame of maximum length of the instruction with L byte
It has been detected as the frame to be detected.
For example, detection signal generator 340 can export 1 when detecting the frame to be detected.When the frame detected is not
When the frame to be detected, detection signal generator 340 can export 0.
As described above, Ethernet detection circuit 300 can export detection signal, indicate that there is most greatly enhancing for L byte
Whether the frame of degree has been detected as the frame to be detected in the data received.
Ethernet detection device 400 can detect multiple frames by multiple Ethernet detection circuits 300 simultaneously.
As a result, when Ethernet detection device 400 includes n Ethernet detection circuit 300, Ethernet detection device 400
The ethernet frame of the size with N*L byte can be detected simultaneously.
According to an embodiment of the invention, the above method can use processor in the processing readable medium of the program with record
Readable code is realized.The example of processor readable medium may include that ROM, RAM, CD-ROM, tape, floppy disk and light data are deposited
One in storage device, and further include that carrier type realizes (such as transmission via internet).
Using embodiment according to the present invention for detecting the device and method of ethernet frame, various configurations can be passed through
Ethernet frame is detected, and therefore can satisfy the performance requirement for ethernet frame detection device.
According to an embodiment of the invention, the production cost of ethernet frame detection circuit can reduce and its configuration can be simple
Change.
Above-mentioned arrangements and methods are not limited to disclosed embodiment in the foregoing description.Some or all of embodiment can be with
It is selectively combined, to be able to carry out various modifications.
Although described above is the preferred embodiment of the present invention it should be appreciated that they are only presented by way of example
Rather than it limits.It is apparent to those skilled in the art that can not depart from as in the following claims
Various modifications and variations are made to the present invention in disclosed the spirit and scope of the present invention.Accordingly, it is intended to which the present invention includes being in
Modifications and variations in the range of the following claims and their equivalents.
Claims (4)
1. a kind of for detecting the ethernet frame detection circuit of ethernet frame, comprising:
The byte counter received is configured as calculating the byte count value of the data received；
Mask and pattern storage unit are configured as calculating covering for the pattern comprising frame based on calculated byte count value
Code and compares data at data；
Comparator, be configured as based on calculated mask data and compare data come determine the data received whether with want
The target data of detection is corresponding；And
Signal generator is detected, output detection signal corresponding with determining result is configured as,
The mask and pattern storage unit include:
Mask and pattern store memory, are configured as storage and are used to ignore the mask register for the position for not needing detection and refer to
Show the pattern register for the frame to be detected, and be configured as calculating by the mask register of storage and pattern register and based on
The corresponding mask data of byte count value of calculating and compare data.
2. ethernet frame detection circuit according to claim 1, wherein mask and pattern storage memory including depositing at random
At least one of access to memory RAM, read only memory ROM and flash memory.
3. ethernet frame detection circuit according to claim 1, wherein mask and pattern storage unit include:
Mask register column are configured as storage for ignoring the mask register for not needing the position of detection；
First multiplexer mux is configured as calculating mask data based on mask register and calculated byte count value；
Pattern register is configured as the pattern register of the storage instruction frame to be detected；And
2nd mux is configured as comparing data based on pattern register and calculated byte count value to calculate.
4. ethernet frame detection circuit according to claim 1, wherein comparator includes:
First comparator, is configured as being ignored based on calculated mask data and is not needed to detect in the data received
Position；And
Second comparator is configured as the data that will be received and the number of targets to be detected based on calculated relatively data
According to being compared.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020150108399A KR101649828B1 (en) | 2015-07-30 | 2015-07-30 | Apparatus and method for detectioning of ethenet frame |
| KR10-2015-0108399 | 2015-07-30 |
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| Publication Number | Publication Date |
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| CN106411564A CN106411564A (en) | 2017-02-15 |
| CN106411564B true CN106411564B (en) | 2019-09-06 |
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| EP (1) | EP3125470B1 (en) |
| JP (2) | JP2017034673A (en) |
| KR (1) | KR101649828B1 (en) |
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| CN112332951B (en) * | 2020-11-20 | 2022-06-24 | 昆高新芯微电子(江苏)有限公司 | Ethernet frame preemption method, device, equipment and storage medium |
| CN112737995B (en) * | 2020-12-16 | 2022-11-22 | 北京东土科技股份有限公司 | Method, device and equipment for processing Ethernet frame and storage medium |
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| CN106411564A (en) | 2017-02-15 |
| JP2019030025A (en) | 2019-02-21 |
| KR101649828B1 (en) | 2016-08-19 |
| US20170033945A1 (en) | 2017-02-02 |
| EP3125470A1 (en) | 2017-02-01 |
| JP6567754B2 (en) | 2019-08-28 |
| US10063390B2 (en) | 2018-08-28 |
| ES2735739T3 (en) | 2019-12-20 |
| EP3125470B1 (en) | 2019-05-15 |
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