CN106410778A - Surge suppressor - Google Patents
Surge suppressor Download PDFInfo
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- CN106410778A CN106410778A CN201611119613.2A CN201611119613A CN106410778A CN 106410778 A CN106410778 A CN 106410778A CN 201611119613 A CN201611119613 A CN 201611119613A CN 106410778 A CN106410778 A CN 106410778A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
- H02H9/04—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
Abstract
According to the embodiments of the invention, a surge suppressor is provided, which comprises a power supply circuit for externally connecting a voltage input circuit and for stabilizing the inputted voltage before outputting a voltage signal externally; a square wave generation circuit for receiving the voltage signal outputted from the power supply circuit and for generating a corresponding square wave signal with fixed frequency; a boost circuit for receiving the square signal generated by the square wave generation circuit and for outputting the voltage signal after it passes an amplifier; and a voltage suppressing circuit for suppressing the voltage signal outputted by the boost circuit to a pre-set range before the voltage is outputted for an external circuit. According to the invention, it is possible to adjust the parameters of a first resistor, a second resistor, a first Zener diode, a second Zener diode and an externally connected Zener diode to ensure that when surge pulses approach, the outputted voltage can still be kept in the required range.
Description
Technical field
The present invention relates to power system technologies field, more particularly, to a kind of big voltage surge suppressor.
Background technology
Electric power system may produce high-voltage pulse in loading and unloading, supplying taking electromotor output 28V voltage as a example
Electric system might have a voltage when loading and unloading and is 80V to the maximum, for up to the high-voltage pulse of several ms.For protection
The safety of subsequent conditioning circuit, need to add a surge suppressor module, to suppress between generator output end and DC/DC power module
It is possible that maximum 80V/100ms pulse, ensure DC/DC power module input voltage allow safety range with
Interior.
Normal power supply for ensureing electric power system is unaffected, and user generally may require that in surge suppressor in input voltage
During for 18V～36V, voltage is not suppressed, the conduction voltage drop of NMOS tube is in the range of set quota（Such as less than 0.5V）,
And work as surge pulse temporarily, surge suppressor output voltage is necessarily less than 36V.
At present, it is ensured that NMOS tube can be complete when normal 36V inputs in similar surge suppressor product on market
Open-minded, then Surge suppression voltage can only be suppressed to 38V；And when will ensure that Surge suppression voltage is down to below 36V, then just
During often 36V input, conduction voltage drop will exceed 3V it is impossible to meet user's index request simultaneously.
Content of the invention
Embodiment of the present invention technical problem to be solved is, provides a kind of surge suppressor, can be effectively by output electricity
Constrain system in the safety range of user's request.
For solving above-mentioned technical problem, the embodiment of the present invention provides following technical scheme：There is provided a kind of surge suppressor, bag
Include：
Power supply circuits（1）, for external voltage input circuit, and input voltage is carried out with external output voltage letter after voltage stabilizing process
Number；
Square wave generation circuit（2）, for receiving described power supply circuits（1）The voltage signal of output simultaneously corresponds to generation fixed frequency
Square-wave signal；
Booster circuit（3）, for receiving described side's wave generation circuit（2）Square-wave signal and after amplifier output voltage letter
Number；
Voltage-suppressing circuit（4）, for by described booster circuit（3）The voltage signal of output is suppressed in preset range and exports
Supply external circuit, the concatermer including the first Zener diode D1 and first resistor R1 and second resistance R2 being sequentially connected in series,
Second Zener diode D2, external Zener diode D111 and the first audion Q1；Described first resistor R1 mono- terminates external electricity
Pressure input circuit, the other end connects the negative electrode of the first Zener diode D1；The base stage of described first audion Q1 connects to first
The anode of Zener diode D1, the colelctor electrode of described first audion Q1 connects to the anode of external Zener diode D111, institute
State the grounded emitter of the first audion Q1；The anode of described second Zener diode D2 connects external Zener diode D111's
Negative electrode.
Further, described power supply circuits（1）Including 3rd resistor R3 being sequentially connected in series, the 4th resistance R4 and the 3rd voltage stabilizing
Diode D3, the outer end of described 3rd resistor R3 is additionally coupled to external input Vin, the anode of described 3rd Zener diode D3
Ground connection；Described power supply circuits（1）Also include emitter follower Q2, the base stage of described emitter follower Q2 connects to the 4th resistance R4
With the 3rd on the circuit between Zener diode D3, colelctor electrode connects to the circuit between 3rd resistor R3 and the 4th resistance R4
On, emitter stage and described power supply circuits（1）Outfan Vcc connect and described emitter stage be grounded also by the first electric capacity C1；Institute
State external input Vin to connect to first leading foot of this suppressor, the second leading foot, described first leading foot and second is drawn
Foot is as the external power supply input pin of this suppressor.
Further, described side's wave generation circuit（2）Internal structure is specially：Including Schmidt trigger IC, the 5th electricity
Resistance R5, the 6th resistance R6, the second electric capacity C2 and the 3rd electric capacity C3, described Schmidt trigger IC includes 14 pins, wherein,
14th pin and described power supply circuits（1）Outfan Vcc connect and described 14th pin be grounded also by the second electric capacity C2, institute
The earth terminal stating the second electric capacity C2 is additionally coupled to the 3rd leading foot of this suppressor, the 7th pin ground connection, the 1st pin and the 2nd pin
Connect to the 10th pin and described 10th pin also passes sequentially through the 6th resistance R6 and the 3rd electric capacity C3 ground connection, the 3rd pin connects
To booster circuit（3）, the 8th pin and the 9th pin connect to the circuit between the 6th resistance R6 and the 3rd electric capacity C3；5th pipe
Foot and the 6th pin connect to one end of the 5th resistance R5, and the 5th pin is additionally coupled to the 4th leading foot of this suppressor, and described
The other end of five resistance R5 connects to described power supply circuits（1）Outfan Vcc, the 12nd pin and the 13rd pin connect to the 4th
Pin, the 11st pin connects to voltage-suppressing circuit（4）.
Further, described booster circuit（3）Including：It is sequentially connected in series from external input Vin to external delivery point Vout
The 7th resistance R7, the 4th electric capacity C4, the 4th Zener diode D4 and the 5th electric capacity C5；Described booster circuit（3）Also include with
The concatermer of the 4th Zener diode D4 and the 5th electric capacity C5 the 5th Zener diode D5 in parallel and the second audion Q3, institute
The anode stating the 5th Zener diode D5 connects that negative electrode connects to the sun of the 4th Zener diode D4 to external delivery point Vout
Pole, the negative electrode of described 4th Zener diode D4 connects to booster circuit（3）Outfan T, described second audion Q3 send out
Emitter grounding, colelctor electrode connects to the circuit between the 7th resistance R7 and the 4th electric capacity C4, and base stage passes through the 8th resistance R8 even
The side's of being connected to wave generation circuit（2）The 3rd pin.
Further, described voltage-suppressing circuit（4）NMOS tube include connect the first NMOS tube Q4 and second
NMOS tube Q5, described first NMOS tube Q4 drain electrode connect to external input Vin, the anode of the 6th Zener diode D6 and
First leading foot of this suppressor and the second leading foot, the source electrode of described second NMOS tube Q5 connect to external delivery point Vout,
7th leading foot of the anode of the 7th Zener diode D7 and this suppressor and the 8th leading foot；Described 6th Zener diode
The negative electrode of D6 is connected to the grid of the first NMOS tube Q4, and the negative electrode of described 7th Zener diode D7 is connected to the second NMOS tube Q5
Grid；The grid of described second NMOS tube Q5 passes sequentially through the 9th resistance R9 and the tenth resistance R10 and is connected to outfan T, institute
The grid stating the first NMOS tube Q4 passes sequentially through the 11st resistance R11 and the 12nd resistance R12 and is connected to the 9th resistance R9 and
Between ten resistance R10；The negative electrode of described 8th Zener diode D8 is connected to the 11st resistance R11 by the 13rd resistance R13
With the 12nd between resistance R12；Described voltage-suppressing circuit（4）Also include between the 9th resistance R9 and the tenth resistance R10 according to
The doublet of second resistance R2 of secondary series connection ground connection and the 6th electric capacity C6, the second Zener diode D2, external Zener diode
D111 and the first audion Q1；The base stage of described first audion Q1 connects to the anode of the first Zener diode D1, described
The negative electrode of the first Zener diode D1 is connected to external input Vin, the collection of described first audion Q1 by first resistor R1
Electrode connects to the anode of external Zener diode D111, and the negative electrode of described external Zener diode D111 connects to the second voltage stabilizing
The anode of diode D2, the grounded emitter of described first audion Q1；Described voltage-suppressing circuit（4）Also include the three or three pole
Pipe Q6, the base stage of described 3rd audion Q6 is connected to square wave generation circuit by the 14th resistance R14（2）The 11st pin,
The colelctor electrode of described 3rd audion Q6 connects between the 9th resistance R9 and the tenth resistance R10, described 3rd audion Q6's
Grounded emitter.
By adopting technique scheme, the embodiment of the present invention at least has the advantages that：The embodiment of the present invention is led to
Cross the voltage signal that power supply circuits and square wave occur circuit output fixed frequency, then via booster circuit carry out after boosting process by
Voltage-suppressing circuit carries out voltage suppression process, during work, by choosing the first different Zener diode D1 and adjusting first
The resistance of resistance R1, can make suppressor fully on and conduction voltage drop is minimum in the input voltage range requiring, and adjust
The parameter size of two resistance R2, the second Zener diode D2 and external Zener diode D111 is it is ensured that product is in surge
Pulse comes temporarily, and output voltage is maintained in the range of user's request.It is especially suitable for the power-supply system of the airborne vehicles such as aircraft
In.
Brief description
Fig. 1 is the structural representation of one embodiment of surge suppressor of the present invention.
Fig. 2 is the power supply circuits internal structure schematic diagram of one embodiment of surge suppressor of the present invention.
Fig. 3 is that the square wave of one embodiment of surge suppressor of the present invention occurs circuit inner structure schematic diagram.
Fig. 4 is the booster circuit internal structure schematic diagram of one embodiment of surge suppressor of the present invention.
Fig. 5 is the voltage-suppressing circuit internal structure schematic diagram of one embodiment of surge suppressor of the present invention.
Fig. 6 is the topological structure workflow diagram of one embodiment of surge suppressor of the present invention.
Specific embodiment
With specific embodiment, the present invention is described in further detail below in conjunction with the accompanying drawings.It should be appreciated that the present invention's shows
Meaning property embodiment and its illustrate for explaining the present invention, but not as a limitation of the invention.
As shown in figure 1, the embodiment of the present invention provides a kind of surge suppressor, including：
Power supply circuits 1, for external voltage input circuit, and carry out external output voltage letter after voltage stabilizing process to input voltage
Number；
Square wave generation circuit 2, for receiving the voltage signal of described power supply circuits 1 output the corresponding square wave producing fixed frequency
Signal；
Booster circuit 3, for receive described side's wave generation circuit 2 square-wave signal and after amplifier output voltage signal；
Voltage-suppressing circuit（4）, for by described booster circuit（3）The voltage signal of output is suppressed in preset range and exports
Supply external circuit, the concatermer including the first Zener diode D1 and first resistor R1 and second resistance R2 being sequentially connected in series,
Second Zener diode D2, external Zener diode D111 and the first audion Q1；Described first resistor R1 mono- terminates external electricity
Pressure input circuit, the other end connects the negative electrode of the first Zener diode D1；The base stage of described first audion Q1 connects to first
The anode of Zener diode D1, the colelctor electrode of described first audion Q1 connects to the anode of external Zener diode D111, institute
State the grounded emitter of the first audion Q1；The anode of described second Zener diode D2 connects external Zener diode D111's
Negative electrode.
The embodiment of the present invention passes through power supply circuits and square wave occurs the voltage signal of circuit output fixed frequency, then via liter
Volt circuit carries out voltage suppression process by voltage-suppressing circuit after carrying out boosting process, during work, by choosing different first
Zener diode D1 and adjust first resistor R1 resistance, can make suppressor in the input voltage range requiring fully on and
Conduction voltage drop is minimum, and the parameter adjusting second resistance R2, the second Zener diode D2 and external Zener diode D111 is big
Little it is ensured that product comes interim in surge pulse, output voltage is maintained in the range of user's request.
As shown in Fig. 2 in one alternate embodiment, 3rd resistor R3 that described power supply circuits 1 include being sequentially connected in series,
Four resistance R4 and the 3rd Zener diode D3, the outer end of described 3rd resistor R3 is additionally coupled to external input Vin, and the described 3rd
The plus earth of Zener diode D3；Described power supply circuits 1 also include emitter follower Q2, the base stage of described emitter follower Q2
Connect to the circuit between the 4th resistance R4 and the 3rd Zener diode D3, colelctor electrode connects to 3rd resistor R3 and the 4th electricity
On circuit between resistance R4, emitter stage is connected with the outfan Vcc of described power supply circuits 1 and described emitter stage is also by the first electricity
Hold C1 ground connection；Described external input Vin connects to first leading foot of this suppressor, the second leading foot, described first extraction
Foot and the second leading foot are as the external power supply input pin of this suppressor.
In the present embodiment, power supply circuits 1 can be powered for Schmidt trigger IC.
As shown in figure 3, in one alternate embodiment, described side's wave generation circuit 2 internal structure is specially：Close including applying
Special trigger IC, the 5th resistance R5, the 6th resistance R6, the second electric capacity C2 and the 3rd electric capacity C3, described Schmidt trigger IC bag
Include 14 pins, wherein, the 14th pin be connected with the outfan Vcc of described power supply circuits 1 and described 14th pin also by
Second electric capacity C2 ground connection, the earth terminal of described second electric capacity C2 is additionally coupled to the 3rd leading foot of this suppressor, and the 7th pin connects
Ground, the 1st pin and the 2nd pin connects to the 10th pin and described 10th pin also passes sequentially through the 6th resistance R6 and the 3rd electric capacity
C3 is grounded, and the 3rd pin connects to booster circuit 3, the 8th pin and the 9th pin connect to the 6th resistance R6 and the 3rd electric capacity C3 it
Between circuit on；5th pin and the 6th pin connect to one end of the 5th resistance R5, and the 5th pin is additionally coupled to the of this suppressor
Four leading foots, the other end of described 5th resistance R5 connects to the outfan Vcc of described power supply circuits 1, the 12nd pin and the 13rd
Pin connects to the 4th pin, and the 11st pin connects to voltage-suppressing circuit 4.
Specifically, described Schmidt trigger IC is CD4093.
In the present embodiment, square wave generation circuit 2, through the effect of Schmidt trigger IC, can obtain a fixing frequency road
Square wave, then will export the input voltage signal as career circuit after its waveform shaping.
As shown in figure 4, in one alternate embodiment, described booster circuit 3 includes：Extremely external from external input Vin
The 7th resistance R7 that output end vo ut is sequentially connected in series, the 4th electric capacity C4, the 4th Zener diode D4 and the 5th electric capacity C5；Described liter
Volt circuit 3 also include the fiveth Zener diode D5 in parallel with the concatermer of the 4th Zener diode D4 and the 5th electric capacity C5 and
The anode of the second audion Q3, described 5th Zener diode D5 connects to external delivery point Vout negative electrode and connects to the 4th steady
The anode of pressure diode D4, the negative electrode of described 4th Zener diode D4 connects to the outfan T of booster circuit 3, and described second
The grounded emitter of audion Q3, colelctor electrode connects to the circuit between the 7th resistance R7 and the 4th electric capacity C4, and base stage is passed through
8th resistance R8 connects to the 3rd pin of square wave generation circuit 2.
As shown in figure 5, in one alternate embodiment, the NMOS tube of described voltage-suppressing circuit 4 include connecting the
One NMOS tube Q4 and the second NMOS tube Q5, the drain electrode of described first NMOS tube Q4 connects to external input Vin, the 6th voltage stabilizing two
First leading foot of the anode of pole pipe D6 and this suppressor and the second leading foot, the source electrode of described second NMOS tube Q5 connect to
7th leading foot of external delivery point Vout, the anode of the 7th Zener diode D7 and this suppressor and the 8th leading foot；Institute
The negative electrode stating the 6th Zener diode D6 is connected to the grid of the first NMOS tube Q4, and the negative electrode of described 7th Zener diode D7 is even
It is connected to the grid of the second NMOS tube Q5；The grid of described second NMOS tube Q5 passes sequentially through the 9th resistance R9 and the tenth resistance R10
It is connected to outfan T, the grid of described first NMOS tube Q4 passes sequentially through the 11st resistance R11 and the 12nd resistance R12 and connects
To between the 9th resistance R9 and the tenth resistance R10；The negative electrode of described 8th Zener diode D8 passes through the 13rd resistance R13 and connects
To between the 11st resistance R11 and the 12nd resistance R12；Described voltage-suppressing circuit 4 is also included from the 9th resistance R9 and the tenth
It is sequentially connected in series second resistance R2 of ground connection and the doublet of the 6th electric capacity C6, the second Zener diode D2, external between resistance R10
Zener diode D111 and the first audion Q1；The base stage of described first audion Q1 connects to the first Zener diode D1's
Anode, the negative electrode of described first Zener diode D1 is connected to external input Vin, described one or three pole by first resistor R1
The colelctor electrode of pipe Q1 connects to the anode of external Zener diode D111, the negative electrode of described external Zener diode D111 connect to
The anode of the second Zener diode D2, the grounded emitter of described first audion Q1；Described voltage-suppressing circuit 4 also includes
The base stage of three audion Q6, described 3rd audion Q6 is connected by the 14th resistance R14 to the 11st pipe of square wave generation circuit 2
Foot, the colelctor electrode of described 3rd audion Q6 connects between the 9th resistance R9 and the tenth resistance R10, described 3rd audion Q6
Grounded emitter.
As shown in fig. 6, in a specific embodiment, the circuit concrete operating principle of the present invention includes：
S11, to electricity on the product of the present invention；
S12, after electricity on product, through 3rd resistor R3 and the 4th resistance R4, the 3rd Zener diode D3 produces a 15V electricity
15V voltage is carried out Current amplifier through emitter follower Q2, to the Schmitt trigger IC of square wave generation circuit 2 by pressure signal
Power supply.
S13, when just having gone up electricity, the 8th pin of Schmidt trigger IC and the 9th pin are low level, the therefore the 10th pin output
For high level, this high level charges to the 3rd electric capacity C3 through the 6th resistance R6, when the 3rd electric capacity C3 voltage-to-ground is close more than applying
After the threshold voltage of special trigger IC, the 10th pin output is low level by high level saltus step, and the 3rd electric capacity C3 begins through again
6th resistance R6 electric discharge, after the 3rd electric capacity C3 voltage-to-ground is less than the threshold voltage of Schmidt trigger IC, the 10th pin is defeated
Go out and high level is become by low transition, so repeatedly, obtain the square wave of a fixed frequency, then will through Schmidt trigger IC
The input as booster circuit 3 is exported after waveform shaping.
S14, square-wave signal voltage after the 8th resistance R8 and the second audion Q3 is exaggerated, when the second audion Q3 exports
During low level, the 4th electric capacity C4 is charged through the 5th Zener diode D5 from product input, when the second audion Q3 is defeated
When going out high level, because the 4th electric capacity C4 both end voltage can not be mutated, now the 4th electric capacity C4 is connected with the second audion Q36
One terminal voltage is changed into product input voltage from 0V, and then the voltage of the other end also accordingly raises, and electric charge is through the 4th Zener diode
D4 pumps into the 5th electric capacity C5, and the grid voltage of the first NMOS tube Q4 and the second NMOS tube Q5 is raised.
S15, electric power system can produce a voltage and be 80V to the maximum, for up to several ms in loading and unloading
High-voltage pulse.
S16, voltage-suppressing circuit 4 detection input voltage is the need of suppression.
S17, if input voltage needs suppression, the first Zener diode D1 is breakdown, the base stage of the first audion Q1
Electric current is had to flow through so that the first audion Q1 conducting, the grid voltage of the first NMOS tube Q4 and the second NMOS tube Q5 is through the second electricity
Resistance R2, the second Zener diode D2, external Zener diode D111 and the first audion Q1 are limited in 40V, ratio the
The input voltage of the drain electrode of one NMOS tube Q4 and the second NMOS tube Q5 is low, now the first NMOS tube Q4 and the work of the second NMOS tube Q5
In linearly interval, it is a drain electrode follower, within source output voltage is suppressed in 36V.By choosing different voltage stabilizing values
First Zener diode D1 and the resistance adjusting first resistor R1, can make product lead completely in the input voltage range requiring
Logical, conduction voltage drop is minimum.And adjust the parameter size of second resistance R2, the second Zener diode D2 and external stabilivolt D111,
Product then can be adjusted and carry out interim, the size of output voltage in surge pulse.
S18, if input voltage does not need suppression, the first Zener diode D1 is in cut-off state, the first audion
The base stage no current of Q1 passes through, and the grid voltage of the first NMOS tube Q4 and the second NMOS tube Q5 is not inhibited, higher than source voltage
More than 7V is so that the first NMOS tube Q4 and the second NMOS tube Q5 can be completely open-minded.
The present invention also has that structure is simple, with low cost, control parameter is easy to adjust and the strong advantage of autgmentability.
Particular embodiments described above, has carried out detailed further to the purpose of the present invention, technical scheme and beneficial effect
Describe in detail bright, be should be understood that the specific embodiment that the foregoing is only the present invention, the guarantor being not intended to limit the present invention
Shield scope, all any modification, equivalent substitution and improvement within the spirit and principles in the present invention, done etc., should be included in this
Within the protection domain of invention.
Claims (5)
1. a kind of surge suppressor is it is characterised in that include：
Power supply circuits（1）, for external voltage input circuit, and input voltage is carried out with external output voltage letter after voltage stabilizing process
Number；
Square wave generation circuit（2）, for receiving described power supply circuits（1）The voltage signal of output simultaneously corresponds to generation fixed frequency
Square-wave signal；
Booster circuit（3）, for receiving described side's wave generation circuit（2）Square-wave signal and after amplifier output voltage letter
Number；
Voltage-suppressing circuit（4）, for by described booster circuit（3）The voltage signal of output is suppressed in preset range and exports
Supply external circuit, the concatermer including the first Zener diode D1 and first resistor R1 and second resistance R2 being sequentially connected in series,
Second Zener diode D2, external Zener diode D111 and the first audion Q1；Described first resistor R1 mono- terminates external electricity
Pressure input circuit, the other end connects the negative electrode of the first Zener diode D1；The base stage of described first audion Q1 connects to first
The anode of Zener diode D1, the colelctor electrode of described first audion Q1 connects to the anode of external Zener diode D111, institute
State the grounded emitter of the first audion Q1；The anode of described second Zener diode D2 connects external Zener diode D111's
Negative electrode.
2. surge suppressor according to claim 1 it is characterised in that：Described power supply circuits（1）Including be sequentially connected in series
3rd resistor R3, the 4th resistance R4 and the 3rd Zener diode D3, the outer end of described 3rd resistor R3 is additionally coupled to external input
End Vin, the plus earth of described 3rd Zener diode D3；Described power supply circuits（1）Also include emitter follower Q2, described penetrate
The base stage of pole follower Q2 connects to the circuit between the 4th resistance R4 and the 3rd Zener diode D3, and colelctor electrode connects to
On circuit between three resistance R3 and the 4th resistance R4, emitter stage and described power supply circuits（1）Outfan Vcc connect and described
Emitter stage is grounded also by the first electric capacity C1；Described external input Vin connects to first leading foot of this suppressor, second draws
Go out foot, described first leading foot and the second leading foot are as the external power supply input pin of this suppressor.
3. surge suppressor according to claim 1 it is characterised in that：Described side's wave generation circuit（2）Internal structure has
Body is：Including Schmidt trigger IC, the 5th resistance R5, the 6th resistance R6, the second electric capacity C2 and the 3rd electric capacity C3, described apply close
Special trigger IC includes 14 pins, wherein, the 14th pin and described power supply circuits（1）Outfan Vcc connect and described
14th pin is grounded also by the second electric capacity C2, and the earth terminal of described second electric capacity C2 is additionally coupled to the 3rd extraction of this suppressor
Foot, the 7th pin ground connection, the 1st pin and the 2nd pin connects to the 10th pin and described 10th pin also passes sequentially through the 6th resistance
R6 and the 3rd electric capacity C3 ground connection, the 3rd pin connects to booster circuit（3）, the 8th pin and the 9th pin connect to the 6th resistance R6
With the 3rd on the circuit between electric capacity C3；5th pin and the 6th pin connect to one end of the 5th resistance R5, and the 5th pin is also connected with
To the 4th leading foot of this suppressor, the other end of described 5th resistance R5 connects to described power supply circuits（1）Outfan
Vcc, the 12nd pin and the 13rd pin connect to the 4th pin, and the 11st pin connects to voltage-suppressing circuit（4）.
4. surge suppressor according to claim 3 it is characterised in that：Described booster circuit（3）Including：From external input
The 7th resistance R7, the 4th electric capacity C4, the 4th Zener diode D4 and the 5th electricity that end Vin to external delivery point Vout is sequentially connected in series
Hold C5；Described booster circuit（3）Also include fiveth in parallel with the concatermer of the 4th Zener diode D4 and the 5th electric capacity C5 steady
The anode of pressure diode D5 and the second audion Q3, described 5th Zener diode D5 connects cloudy to external delivery point Vout
Pole connects to the anode of the 4th Zener diode D4, and the negative electrode of described 4th Zener diode D4 connects to booster circuit（3）'s
Outfan T, the grounded emitter of described second audion Q3, colelctor electrode connects between the 7th resistance R7 and the 4th electric capacity C4
On circuit, base stage is connected to square wave generation circuit by the 8th resistance R8（2）The 3rd pin.
5. surge suppressor according to claim 3 it is characterised in that：Described voltage-suppressing circuit（4）NMOS tube
The first NMOS tube Q4 including series connection and the second NMOS tube Q5, the drain electrode of described first NMOS tube Q4 connects to external input
First leading foot of Vin, the anode of the 6th Zener diode D6 and this suppressor and the second leading foot, described second NMOS tube
The source electrode of Q5 connect to external delivery point Vout, the anode of the 7th Zener diode D7 and this suppressor the 7th leading foot and
8th leading foot；The negative electrode of described 6th Zener diode D6 is connected to the grid of the first NMOS tube Q4, described 7th voltage stabilizing two
The negative electrode of pole pipe D7 is connected to the grid of the second NMOS tube Q5；The grid of described second NMOS tube Q5 passes sequentially through the 9th resistance R9
It is connected to outfan T with the tenth resistance R10, the grid of described first NMOS tube Q4 passes sequentially through the 11st resistance R11 and the tenth
Two resistance R12 are connected between the 9th resistance R9 and the tenth resistance R10；The negative electrode of described 8th Zener diode D8 passes through the tenth
Three resistance R13 are connected between the 11st resistance R11 and the 12nd resistance R12；Described voltage-suppressing circuit（4）Also include from
It is sequentially connected in series second resistance R2 of ground connection and the doublet of the 6th electric capacity C6, second steady between nine resistance R9 and the tenth resistance R10
Pressure diode D2, external Zener diode D111 and the first audion Q1；The base stage of described first audion Q1 connects to
The anode of one Zener diode D1, the negative electrode of described first Zener diode D1 is connected to external input by first resistor R1
The colelctor electrode of Vin, described first audion Q1 connects to the anode of external Zener diode D111, described external Zener diode
The negative electrode of D111 connects to the anode of the second Zener diode D2, the grounded emitter of described first audion Q1；Described voltage
Suppression circuit（4）Also include the 3rd audion Q6, the base stage of described 3rd audion Q6 is connected to side by the 14th resistance R14
Wave generation circuit（2）The 11st pin, the colelctor electrode of described 3rd audion Q6 connects to the 9th resistance R9 and the tenth resistance R10
Between, the grounded emitter of described 3rd audion Q6.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611119613.2A CN106410778B (en) | 2016-12-08 | 2016-12-08 | surge suppressor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611119613.2A CN106410778B (en) | 2016-12-08 | 2016-12-08 | surge suppressor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106410778A true CN106410778A (en) | 2017-02-15 |
| CN106410778B CN106410778B (en) | 2018-11-16 |
Family
ID=58085298
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201611119613.2A Active CN106410778B (en) | 2016-12-08 | 2016-12-08 | surge suppressor |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108233353A (en) * | 2018-03-01 | 2018-06-29 | 成都新欣神风电子科技有限公司 | The anti-overvoltage surge cascade module of two-stage |
| CN112018725A (en) * | 2020-09-22 | 2020-12-01 | 上海创功通讯技术有限公司 | Overvoltage protection device |
| CN112993953A (en) * | 2021-02-26 | 2021-06-18 | 西安微电子技术研究所 | High-voltage surge suppression circuit |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN202872356U (en) * | 2012-09-26 | 2013-04-10 | 深圳市振华微电子有限公司 | Surge suppression circuit |
| CN204597772U (en) * | 2015-05-22 | 2015-08-26 | 天水华天微电子股份有限公司 | Airborne DC power supply anti-surge circuit |
| CN206422515U (en) * | 2016-12-08 | 2017-08-18 | 深圳市振华微电子有限公司 | Surge suppressor |
-
2016
- 2016-12-08 CN CN201611119613.2A patent/CN106410778B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN202872356U (en) * | 2012-09-26 | 2013-04-10 | 深圳市振华微电子有限公司 | Surge suppression circuit |
| CN204597772U (en) * | 2015-05-22 | 2015-08-26 | 天水华天微电子股份有限公司 | Airborne DC power supply anti-surge circuit |
| CN206422515U (en) * | 2016-12-08 | 2017-08-18 | 深圳市振华微电子有限公司 | Surge suppressor |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108233353A (en) * | 2018-03-01 | 2018-06-29 | 成都新欣神风电子科技有限公司 | The anti-overvoltage surge cascade module of two-stage |
| CN112018725A (en) * | 2020-09-22 | 2020-12-01 | 上海创功通讯技术有限公司 | Overvoltage protection device |
| CN112993953A (en) * | 2021-02-26 | 2021-06-18 | 西安微电子技术研究所 | High-voltage surge suppression circuit |
| CN112993953B (en) * | 2021-02-26 | 2023-06-06 | 西安微电子技术研究所 | High-voltage surge suppression circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106410778B (en) | 2018-11-16 |
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