CN106356398A - High-voltage power device with special voltage withstanding ring - Google Patents
High-voltage power device with special voltage withstanding ring Download PDFInfo
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- CN106356398A CN106356398A CN201510760236.XA CN201510760236A CN106356398A CN 106356398 A CN106356398 A CN 106356398A CN 201510760236 A CN201510760236 A CN 201510760236A CN 106356398 A CN106356398 A CN 106356398A
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- pressure ring
- power device
- voltage power
- high voltage
- epitaxial layer
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- 239000000463 material Substances 0.000 claims abstract description 24
- 239000000758 substrate Substances 0.000 claims abstract description 16
- 239000004065 semiconductor Substances 0.000 claims description 12
- 238000000034 method Methods 0.000 claims description 7
- 230000005669 field effect Effects 0.000 claims description 2
- 238000011084 recovery Methods 0.000 claims description 2
- 229910044991 metal oxide Inorganic materials 0.000 claims 1
- 150000004706 metal oxides Chemical class 0.000 claims 1
- 230000015556 catabolic process Effects 0.000 abstract description 10
- 238000013461 design Methods 0.000 abstract description 4
- 238000002161 passivation Methods 0.000 abstract description 2
- 239000010410 layer Substances 0.000 description 33
- 230000005684 electric field Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 210000003127 knee Anatomy 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000004134 energy conservation Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
Abstract
The invention relates to a high-voltage power device with a special voltage withstanding ring. The high-voltage power device comprises a working area (1) and a terminal area (2). The upper surface of a substrate (3) of the working area (1) and the terminal area (2) is provided with an epitaxial layer (4), and the terminal area (2) is provided with a voltage withstanding ring groove (21) downwardly from the upper surface of the epitaxial layer (4). The depth of the voltage withstanding ring groove (21) is smaller than the thickness of the epitaxial layer (4) and internally filled with a light doped P-type GaN material, and the upper surface of the P-type GaN material is flush with the upper surface of the epitaxial layer (4) after filling. Further, the upper surface of the P-type GaN material filled in the voltage withstanding ring groove (21) is covered with an edge passivation layer (5). The high-voltage power device is simple and reasonable in structural design and stable and reliable in use, the area of the terminal area can be effectively reduced while breakdown voltage of the device is effectively boosted, and cost reduction is realized.
Description
Technical field
The present invention relates to technical field of semiconductor device, particularly to a kind of high pressure work(with special pressure ring
Rate device.
Background technology
Developing rapidly with Power Electronic Technique, high voltage power device is also towards Large Copacity, high frequency, height
Effect energy-conservation, the direction of low cost are developed.The breakdown voltage improving device then becomes one of research direction of people.
Preferably device electric breakdown strength refers to that pn-junction or metal-semiconductor become the situation of parallel plane knot, but,
Due to practical devices and in the technological process of production some factors impact, impurity carrying out longitudinal diffusion
Also there is lateral diffusion, so the terminal profile of knot is bending simultaneously.For high voltage power device, when giving
Knot plus reversed bias voltage, close to being very high in the field intensity of vicinity of knot when puncturing, the electricity at knot terminal bend
Field intensity exceeds a lot than other regions, is also more susceptible to puncture.In order to solve this problem,
Add pressure ring around main knot, be that the depletion region of main knot expands laterally along surface when applying reversed bias voltage to knot
Exhibition, when depletion region expands to pressure ring knot, main knot knee electric field intensity is also not reaching to critical breakdown field
By force, that is, main knot also will not puncture.With the increase of reverse biased, main knot and pressure ring are binded up one's hair raw break-through, consumption
Area to the greatest extent joins together, and so, depletion region radius of curvature increases, and the electric field accumulation effect of main knot knee is cut
Weak, breakdown voltage is therefore improved.
As shown in figure 4, traditional power device includes working area 05 and termination environment 06, this working area 05 and eventually
The heavy doping n+ substrate 01 of petiolarea 06 is provided with and n- epitaxial layer 02 is lightly doped, and this is lightly doped and sets on n- epitaxial layer 02
Plane pressure ring 03, this is lightly doped n- epitaxial layer 02 and is being provided with sio2 insulation located at plane pressure ring 03 upper surface
Layer 04, it is known that traditional pressure loop technique, is plane pressure ring, i.e. implanting impurity ion in si substrate
Form pressure ring knot, disperse the Electric Field Distribution of main knot, weaken the electric field accumulation phenomena of main knot knee, thus
Improve breakdown voltage；Add pressure ring around main knot, the area of the chip to be increased that is bound to, and with power
Device requires more and more higher to breakdown voltage, and pressure ring bar number also can accordingly increase, and it is pressure that this results in terminal
Ring occupied area increases, and the area of whole chip also increases therewith, improves cost.
In consideration of it, mention in patent cn201180050935 a kind of improving terminal for having of high-voltage applications
The groove dmos device of structure, including Semiconductor substrate, this Semiconductor substrate has active area and termination environment.
This substrate has the first conduction type.Terminal trenches are located in termination environment, and from educate the border of source region to
Extend in the specific range at the edge of Semiconductor substrate.Doped region has the second conduction type, is arranged in terminal
In the substrate of beneath trenches.The side wall adjacent with border is formed
Mos grid.This doped region distant place of direction terminal trenches from a part for the mos grid separating with border
Side wall extends.Terminal structure oxide skin(coating) is formed in terminal trenches, and covers a part for mos grid,
And extend to the edge of substrate.First conductive layer is formed on the back surface of Semiconductor substrate.Active
The expose portion of area top mos grid forms the second conductive layer, and the second conductive layer extends to cover terminal
At least a portion of structure oxide layer.Although this invention termination environment is also adopted by groove-shaped and mixes in beneath trenches
Miscellaneous n-type impurity, but it is in trench sidewall deposition grid, deposit dielectrics layer, metal level in groove, this
Kind device making technics are more complicated, and relatively costly, the pressure performance of device cannot obtain Reliable guarantee.
Patent cn201310086262 is mentioned a kind of terminal structure of mesohigh slot type power device and its
Manufacture method, the terminal area at least groove of its terminal structure, the both sides Jun You surface knot of groove,
Inject knot near the side of active area for N-shaped, knot is injected for p-type in the side away from active area, fills out in groove
Fill thing.Although this invention termination environment be also adopted by groove-shaped, in groove filling be silicon oxide, silicon nitride,
Silicon oxynitride or polysilicon, in the case of pressure identical, compare other materials then needs end to these materials
End area is bigger, and not only processing technology is relative complex, and pressure performance is general.
Mention a kind of super junction high-voltage power device structure in another patent cn201210009184, it includes
Source region and termination environment, termination environment arranges the epitaxial layer of the first conductivity type material on substrate layer, in epitaxial layer
Upper formation compound buffer layer, contains what the first alternately arranged conductivity type material was constituted in compound buffer layer
First semiconductor region and the second semiconductor region of second conductivity type material composition；The trap of the second conduction type
Area is located at the surface of the second semiconductor region, is between two the first semiconductor regions or last the first half is led
Between body area and cut-off ring.Although it is pressure that this invention adopts super-junction structure to improve, its termination environment is plane,
Therefore pressure poor-performing, terminal occupied area is bigger, and cost is also higher.
In sum it is necessary to make perfect further to prior art.
Content of the invention
In order to solve the problems, such as to be previously mentioned in background above technology, the invention provides a kind of structure design simple,
Rationally, using stable, reliable, while effectively improving the breakdown voltage of device, terminal can be effectively reduced
The area in area, reduces cost, improves the high voltage power device with special pressure ring of pressure performance.
Technical scheme is as follows:
The above-mentioned high voltage power device with special pressure ring, including working area (1) and termination environment (2)；
Substrate (3) upper surface of described working area (1) and termination environment (2) is provided with epitaxial layer (4)；Described end
Petiolarea (2) faces down from the upper table of described epitaxial layer (4) and offers pressure ring groove (21)；Described resistance to
The depth of pressure ring groove (21) is less than the thickness of described epitaxial layer (4), is filled with lightly doped inside it
The upper surface of described p-type gan material after p-type gan material and filling is upper with described epitaxial layer (4)
Flush；Meanwhile, the described p-type gan material upper surface filled in described pressure ring groove (21) is also
It is coated with one layer of boundary-passivated layer (5).
The described high voltage power device with special pressure ring, wherein: described boundary-passivated layer (5) adopts
Be sin dielectric layer.
The described high voltage power device with special pressure ring, wherein: described pressure ring groove (21) is logical
Cross the epitaxial layer (4) that lithographic etch process is opened in described termination environment (2).
The described high voltage power device with special pressure ring, wherein: described high voltage power device includes insulating
Grid bipolar transistor igbt, mos field effect transistor mosfet and fast recovery two poles
Pipe frd；The working area of described insulated gate bipolar transistor igbt includes gate regions g and launch site e.
The described high voltage power device with special pressure ring, wherein: the middle region of described high voltage power device
Domain is working area (1), and the region around described working area (1) is described termination environment (2).
Beneficial effect:
The high-voltage power device structure design that the present invention has special pressure ring is simple, rationally, using stable,
Reliable, the area of termination environment while effectively improving the breakdown voltage of device, can be effectively reduced, and then make
Whole chip area reduces, and reduces cost.
The working area of the present invention is identical with the working area of traditional high voltage power semiconductor device, and that distinguishes is in
In the termination environment pressure ring of the present invention adopts groove-shaped, filling p-type gan material in groove, and gan groove is resistance to
Pressure ring replaces conventional planar pressure ring, reduces the width shared by pressure ring, reduces chip area, reduce
Cost, the pressure performance of gan material is ten times of traditional si material, therefore is reducing face shared by terminal pressure ring
While long-pending, improve the pressure performance of power device again.
Brief description
Fig. 1 has the sectional view of the high voltage power device of special pressure ring for the present invention；
Fig. 2 has the top view of the high voltage power device of special pressure ring for the present invention；
Fig. 3 is the workspace architecture profile of insulated gate bipolar transistor igbt；
Fig. 4 is traditional power unit structure sectional view.
Specific embodiment
As shown in Figure 1, 2, the present invention has the high voltage power device of special pressure ring, can be igbt,
The devices such as mosfet, frd, including working area 1 and termination environment 2.
This working area 1 is located at the central region of power device, and the region around working area 1 is termination environment 2；
Wherein, Fig. 3 is the working area 1 of igbt, including gate regions g and launch site taking power device igbt as a example
e.
The substrate 3 of this working area 1 and termination environment 2 is heavy doping n+ silicon substrate structure, this working area 1 and eventually
The epitaxial layer 4 of petiolarea 2 is that n- epitaxial layer structure and upper surface located at heavy doping n+ substrate 3 are lightly doped；
The thickness of this epitaxial layer 4 is 50-150um.
This termination environment 2 faces down from the upper table of epitaxial layer 4 and offers pressure ring groove 21；Wherein, this is pressure
Circular groove groove 21 is to open up in termination environment 2 by lithographic etch process to be formed, and its depth is less than epitaxial layer 4
Thickness.
It is filled with lightly doped p-type gan material, wherein, this pressure ring groove in this pressure ring groove 21
21 gash depth position 5-15um, the gan material upper surface of its internal filling and the upper surface of epitaxial layer 4
Concordantly, meanwhile, in this pressure ring groove 21, the gan material upper surface of filling is also covered with one layer of side
Edge passivation layer 5, this boundary-passivated layer 5 uses sin dielectric layer, and it instead of traditional sio2Insulating barrier,
Sin dielectric layer compares sio2There is for insulating barrier more stable surface chemistry, play more preferable protection
Effect.
Wherein, the pressure ring groove 21 of the present invention is different from the plane of the conventional high-tension power device in Fig. 4
Pressure ring 03, the present invention fills lightly doped p-type gan material in pressure ring groove 21, due to
The voltage endurance capability of gan material is than high ten times traditional of si material, therefore, the pressure ring groove of the present invention
21 knots are than traditional plane pressure ring 03 junction depth；Meanwhile, compare traditional plane pressure ring 03, this
The quantity of bright pressure ring groove 21 significantly reduce and pressure ring shared by area be also obviously reduced, and then make
The area of whole high voltage power device reduces, and reduces cost.
Moreover, can be seen that from the contrast of Fig. 4 and Fig. 1, Fig. 2, termination environment 22 occupied area of Fig. 1 is bright
Show and be less than Fig. 4 conventional power devices termination environment 06, pressure ring groove 21 quantity of Fig. 2 is considerably less than to be schemed
4.Again due to the high withstand voltage of gan material, the reverse BV of device is made to greatly improve.
Present configuration design is simple, reasonable, using stable, reliable, is effectively improving the breakdown potential of device
The area of termination environment while pressure, can be effectively reduced, reduce cost, be suitable to promote on a large scale and apply.
The above, be only present pre-ferred embodiments, is not that the present invention is made with any other form
Restriction, and any modification made of technical spirit according to the present invention or equivalent variations, still fall within this
Bright scope required for protection.
Claims (5)
1. a kind of high voltage power device with special pressure ring, including working area (1) and termination environment
(2)；Substrate (3) upper surface of described working area (1) and termination environment (2) is provided with epitaxial layer (4)；
It is characterized in that: described termination environment (2) faces down from the upper table of described epitaxial layer (4) and offers pressure ring
Groove (21)；The depth of described pressure ring groove (21) is less than the thickness of described epitaxial layer (4), its
Inside is filled with the upper surface of described p-type gan material and institute after lightly doped p-type gan material and filling
The upper surface stating epitaxial layer (4) is concordant；Meanwhile, that fills in described pressure ring groove (21) is described
P-type gan material upper surface is also covered with one layer of boundary-passivated layer (5).
2. there is the high voltage power device of special pressure ring as claimed in claim 1 it is characterised in that:
Described boundary-passivated layer (5) uses sin dielectric layer.
3. there is the high voltage power device of special pressure ring as claimed in claim 1 it is characterised in that:
Described pressure ring groove (21) is the epitaxial layer being opened in described termination environment (2) by lithographic etch process
(4).
4. there is the high voltage power device of special pressure ring as claimed in claim 1 it is characterised in that:
Described high voltage power device includes insulated gate bipolar transistor igbt, metal oxide semiconductor field-effect
Transistor mosfet and fast recovery diode frd.
5. the described high voltage power device with special pressure ring as arbitrary in Claims 1-4, it is special
Levy and be: the central region of described high voltage power device is working area (1), positioned at described working area (1)
The region of surrounding is described termination environment (2).
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510416439 | 2015-07-16 | ||
| CN2015104164397 | 2015-07-16 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106356398A true CN106356398A (en) | 2017-01-25 |
Family
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510760236.XA Pending CN106356398A (en) | 2015-07-16 | 2015-11-10 | High-voltage power device with special voltage withstanding ring |
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| Country | Link |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115241277A (en) * | 2022-09-22 | 2022-10-25 | 深圳芯能半导体技术有限公司 | Isolated trench MOS device and preparation method thereof |
| CN117711939A (en) * | 2024-02-05 | 2024-03-15 | 深圳腾睿微电子科技有限公司 | Groove type terminal IGBT device and manufacturing method thereof |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040061195A1 (en) * | 2002-09-30 | 2004-04-01 | Sanyo Electric Co., Ltd. | Semiconductor device and manufacturing method thereof |
| CN102074587A (en) * | 2009-10-30 | 2011-05-25 | 万国半导体股份有限公司 | Gallium nitride semiconductor device with improved termination scheme |
| CN104716192A (en) * | 2015-03-31 | 2015-06-17 | 无锡新洁能股份有限公司 | Power MOS device capable of achieving voltage resistance by charge coupling and preparation method thereof |
| CN205177848U (en) * | 2015-07-16 | 2016-04-20 | 张家港意发功率半导体有限公司 | High voltage power device with special pressure ring |
-
2015
- 2015-11-10 CN CN201510760236.XA patent/CN106356398A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040061195A1 (en) * | 2002-09-30 | 2004-04-01 | Sanyo Electric Co., Ltd. | Semiconductor device and manufacturing method thereof |
| CN102074587A (en) * | 2009-10-30 | 2011-05-25 | 万国半导体股份有限公司 | Gallium nitride semiconductor device with improved termination scheme |
| CN104716192A (en) * | 2015-03-31 | 2015-06-17 | 无锡新洁能股份有限公司 | Power MOS device capable of achieving voltage resistance by charge coupling and preparation method thereof |
| CN205177848U (en) * | 2015-07-16 | 2016-04-20 | 张家港意发功率半导体有限公司 | High voltage power device with special pressure ring |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115241277A (en) * | 2022-09-22 | 2022-10-25 | 深圳芯能半导体技术有限公司 | Isolated trench MOS device and preparation method thereof |
| CN117711939A (en) * | 2024-02-05 | 2024-03-15 | 深圳腾睿微电子科技有限公司 | Groove type terminal IGBT device and manufacturing method thereof |
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