CN106330109A - Cascode amplifier electric circuit and power amplifier - Google Patents
Cascode amplifier electric circuit and power amplifier Download PDFInfo
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- CN106330109A CN106330109A CN201610793670.2A CN201610793670A CN106330109A CN 106330109 A CN106330109 A CN 106330109A CN 201610793670 A CN201610793670 A CN 201610793670A CN 106330109 A CN106330109 A CN 106330109A
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- drain electrode
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3205—Modifications of amplifiers to reduce non-linear distortion in field-effect transistor amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/211—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Amplifiers (AREA)
Abstract
The invention provides a cascode amplifier electric circuit and power amplifier. The cascode amplifier electric circuit includes transistor M 1 and transistor M 2, which are represented as G a A s M O S H E M T. The grounding source of M 1 and the gate electrode of M 1 serve as the signal input V i n of the cascode amplifier electric circuit. The gate electrode of M 1 is linked with the negative voltage source V S S 1 through the choke inductance L 1. The drain electrode of M 1 is linked with the positive voltage source V D D 1 through the choke inductance L 4. The drain electrode of M 1 is linked with the source electrode of M 2 through the blocking capacitor C 2. The source electrode of M 2 is linked with the ground through the choke inductance L 5. The gate electrode of M 2 is linked with the negative voltage source V S S 1 through the choke inductance L 2. The gate electrode of M 2 is linked with the ground through grid capacitance C 2. The drain electrode of M 2 serves as the signal output V o u t of the cascode amplifier electric circuit. The drain electrode of M 2 is linked with the positive voltage source V D D 2. The technical scheme requires no extra high voltage power module which decreases the complexity of design, with the premise of performing the power amplification well.
Description
Technical field
The present invention relates to semiconductor integrated circuit technical field, particularly relate to a kind of cascade amplifying circuit and power is put
Big device.
Background technology
In the application of handset power amplifier, traditional framework typically uses Si-MOSFET (Metal Oxide
Semiconductor Field Effect Transistor, mos field effect transistor) carry out design power
Amplifier, relatively low for Si-MOSFET breakdown voltage ratio, and mobile phone power supply is generally 3.3V, therefore, power amplifier
Two Si-MOSFET M1 and M2 in power amplification circuit use the structure of stack cascade to be attached (such as Fig. 1 institute
Show), wherein, the source ground of M1, the grid of M1 is as the signal input part V of amplifying circuitin, the grid of M1 passes through choke induction
L1 connects the drain electrode of negative voltage source VSS1, M1 and is connected with the source electrode of M2, and the grid of M2 connects negative voltage source by choke induction L2
The grid of VSS2, M2 passes through grid capacitance C1 ground connection, and the drain electrode of M2 is as the signal output part V of power amplification circuitout, M2's
Drain and connect positive voltage source VDD by choke induction L3.
Due to GaAs-MOSHEMT (Metal Oxide Semiconductor High Electron Mobility
Transistor, metal-oxide semiconductor (MOS) HEMT) there is the performance more excellent than Si-MOSFET, there is literary composition
Offer proposition to be replaced by the Si-MOSFET GaAs-MOSHEMT in Fig. 1.But, due to GaAs-MOSHEMT breakdown voltage ratio
Higher, if the attachment structure of stack cascade to be applied to GaAs-MOSHEMT, need 3.3V power supply it
Outer be the extra boost module of the power amplification circuit introducing of stack cascode structure, thus adds the complexity of design
Degree.
Summary of the invention
The cascade amplifying circuit of present invention offer and power amplifier, it is without introducing extra boost module, from
And on the premise of ensureing preferable power amplification performance, reduce the complexity of design.
First aspect, the present invention provides a kind of cascade amplifying circuit, and described cascade amplifying circuit includes crystal
Pipe M1 and transistor M2, described transistor M1 and described transistor M2 are GaAs-MOSHEMT, and wherein, the source electrode of described M1 connects
Ground, the grid of described M1 is as the signal input part V of described cascade amplifying circuitin, the grid of the most described M1 is by gripping
Stream inductance L1 connects negative voltage source VSS1, and the drain electrode of described M1 connects positive voltage source VDD1 by choke induction L4, the most described
The drain electrode of M1 connects the source electrode of described M2 by capacitance C2, and the source electrode of described M2 passes through choke induction L5 ground connection, described M2
Grid by choke induction L2 connect negative voltage source VSS1, the grid of the most described M2 pass through grid capacitance C1 ground connection, described
The drain electrode of M2 is as the signal output part V of amplifying circuitout, the drain electrode of the most described M2 connects positive voltage by choke induction L3
Source VDD2.
Second aspect, the present invention provides a kind of power amplifier, and described power amplifier includes power supply S, source impedance Rs, every
Straight electric capacity C3, input matching network M-N1, drive amplification circuit, capacitance C4, inter-stage matching network M-N2, power amplification electricity
Road, output matching network M-N3, capacitance C5 and load Rload；
Wherein, one end of described input matching network M-N1 is by described capacitance C3 and described source impedance RsOne end
Connect, described source impedance RsThe other end by described power supply S ground connection, the other end of described input matching network M-N1 is with described
The input of drive amplification circuit connects；
The outfan of described drive amplification circuit is connected by one end of capacitance C4 and inter-stage matching network M-N2, institute
The input of the other end and described power amplification circuit of stating inter-stage matching network M-N2 is connected；
The outfan of described power amplification circuit is connected with one end of described output matching network M-N3, described output matching
The other end of network M-N3 is by capacitance C5 and described load RloadOne end connect, described load RloadAnother termination
Ground；
Described drive amplification circuit includes that transistor M3, described transistor M3 are GaAs-MOSHEMT, the source electrode of described M3
Ground connection, the grid of described M3 connects with the other end of described input matching network M-N1 as the input of described drive amplification circuit
Connecing, the grid of the most described M3 connects negative voltage source VSS3 by choke induction L6, and the drain electrode of described M3 is put as described driving
The outfan of big circuit is connected by one end of described capacitance C4 and described inter-stage matching network M-N2, the most described M3's
Drain and connect positive voltage source VDD3 by choke induction L7；
Described power amplification circuit includes that transistor M1 and transistor M2, described transistor M1 and described transistor M2 are
GaAs-MOSHEMT, wherein, the source ground of described M1, the grid of described M1 as described power amplification circuit input with
The other end of described inter-stage matching network M-N2 connects, and the grid of the most described M1 connects negative voltage source by choke induction L1
VSS1, the drain electrode of described M1 connects positive voltage source VDD1 by choke induction L4, and capacitance is passed through in the drain electrode of the most described M1
C2 connects the source electrode of described M2, and the source electrode of described M2 passes through choke induction L5 ground connection, and the grid of described M2 passes through choke induction L2
Connecting negative voltage source VSS1, the grid of the most described M2 passes through grid capacitance C1 ground connection, and the drain electrode of described M2 is as described power
Choke induction is passed through in the drain electrode that the outfan of amplifying circuit is connected the most described M2 with one end of described output matching network M-N3
L3 connects positive voltage source VDD2.
The cascade amplifying circuit of embodiment of the present invention offer and power amplifier, compared with prior art, it passes through
Improve stack cascade amplifying circuit so that the inclined of single transistor in cascade amplifying circuit can be adjusted easily
Put voltage, so for the characteristic that GaAs-MOSHEMT breakdown voltage is high, mobile phone power supply than in the case of relatively low both without
Extra boost module need to be introduced, the advantage of cascode structure can be retained again, i.e. make power amplifier have higher increasing
Benefit, higher output and the preferably linearity.
Accompanying drawing explanation
Fig. 1 is the structural representation of the stack cascade amplifying circuit of prior art intermediate power amplifier；
Fig. 2 is the structural representation of one embodiment of the invention cascade amplifying circuit；
Fig. 3 is the structural representation of one embodiment of the invention power amplifier；
Fig. 4 is the structural representation of another embodiment of the present invention power amplifier.
Detailed description of the invention
For making the purpose of the embodiment of the present invention, technical scheme and advantage clearer, below in conjunction with the embodiment of the present invention
In accompanying drawing, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is only
It is only a part of embodiment of the present invention rather than whole embodiments.Based on the embodiment in the present invention, ordinary skill
The every other embodiment that personnel are obtained under not making creative work premise, broadly falls into the scope of protection of the invention.
The present invention provides a kind of cascade amplifying circuit, as in figure 2 it is shown, described cascade amplifying circuit includes crystal
Pipe M1 and transistor M2, described transistor M1 and described transistor M2 are GaAs-MOSHEMT, and wherein, the source electrode of described M1 connects
Ground, the grid of described M1 is as the signal input part V of described cascade amplifying circuitin, the grid of the most described M1 is by gripping
Stream inductance L1 connects negative voltage source VSS1, and the drain electrode of described M1 connects positive voltage source VDD1 by choke induction L4, the most described
The drain electrode of M1 connects the source electrode of described M2 by capacitance C2, and the source electrode of described M2 passes through choke induction L5 ground connection, described M2
Grid by choke induction L2 connect negative voltage source VSS1, the grid of the most described M2 pass through grid capacitance C1 ground connection, described
The drain electrode of M2 is as the signal output part V of amplifying circuitout, the drain electrode of the most described M2 connects positive voltage by choke induction L3
Source VDD2.
The cascade amplifying circuit that the embodiment of the present invention provides, compared with prior art, it is by improving stack altogether
Source grid amplifying circuit altogether so that the bias voltage of single transistor in cascade amplifying circuit can be adjusted easily, so
For the characteristic that GaAs-MOSHEMT breakdown voltage is high, both more extra without introducing than in the case of relatively low at mobile phone power supply
Boost module, can retain again the advantage of cascode structure, i.e. makes power amplifier have higher gain, higher output
Power and the preferably linearity.
The embodiment of the present invention also provides for a kind of power amplifier, as it is shown on figure 3, described power amplifier includes power supply S, source
Impedance Rs, capacitance C3, input matching network M-N1, drive amplification circuit, capacitance C4, inter-stage matching network M-N2,
Power amplification circuit, output matching network M-N3, capacitance C5 and load Rload；
Wherein, one end of described input matching network M-N1 is by described capacitance C3 and described source impedance RsOne end
Connect, described source impedance RsThe other end by described power supply S ground connection, the other end of described input matching network M-N1 is with described
The input of drive amplification circuit connects；
The outfan of described drive amplification circuit is connected by one end of capacitance C4 and inter-stage matching network M-N2, institute
The input of the other end and described power amplification circuit of stating inter-stage matching network M-N2 is connected；
The outfan of described power amplification circuit is connected with one end of described output matching network M-N3, described output matching
The other end of network M-N3 is by capacitance C5 and described load RloadOne end connect, described load RloadAnother termination
Ground；
Described drive amplification circuit includes that transistor M3, described transistor M3 are GaAs-MOSHEMT, the source electrode of described M3
Ground connection, the grid of described M3 connects with the other end of described input matching network M-N1 as the input of described drive amplification circuit
Connecing, the grid of the most described M3 connects negative voltage source VSS3 by choke induction L6, and the drain electrode of described M3 is put as described driving
The outfan of big circuit is connected by one end of described capacitance C4 and described inter-stage matching network M-N2, the most described M3's
Drain and connect positive voltage source VDD3 by choke induction L7；
Described power amplification circuit includes that transistor M1 and transistor M2, described transistor M1 and described transistor M2 are
GaAs-MOSHEMT, wherein, the source ground of described M1, the grid of described M1 as described power amplification circuit input with
The other end of described inter-stage matching network M-N2 connects, and the grid of the most described M1 connects negative voltage source by choke induction L1
VSS1, the drain electrode of described M1 connects positive voltage source VDD1 by choke induction L4, and capacitance is passed through in the drain electrode of the most described M1
C2 connects the source electrode of described M2, and the source electrode of described M2 passes through choke induction L5 ground connection, and the grid of described M2 passes through choke induction L2
Connecting negative voltage source VSS1, the grid of the most described M2 passes through grid capacitance C1 ground connection, and the drain electrode of described M2 is as described power
Choke induction is passed through in the drain electrode that the outfan of amplifying circuit is connected the most described M2 with one end of described output matching network M-N3
L3 connects positive voltage source VDD2.
Wherein, described input matching network M-N1 is for by described source impedance Rs(such as 50 ohm) match described driving
The input impedance of amplifying circuit, described inter-stage matching network M-N2 is for being impedance-matched to the output of described drive amplification circuit
The optimum source impedance of described power amplification circuit, described output matching network M-N3 is for by load impedance Rload(such as 50 Europe
Nurse) match the optimum load impedance of described power amplification circuit, the optimum source impedance of described power amplification circuit is led by source
Inviting, the optimum load impedance of described power amplification circuit is got by load balance factor.
The power amplifier that the embodiment of the present invention provides, compared with prior art, it is by improving stack cascade
Amplifying circuit so that can adjust the bias voltage of single transistor in cascade amplifying circuit easily, so for
The characteristic that GaAs-MOSHEMT breakdown voltage is high, mobile phone power supply than in the case of relatively low both without introducing extra boosting
Module, can retain again the advantage of cascode structure, i.e. makes power amplifier have higher gain, higher output
And the preferable linearity.
Further, as shown in Figure 4, described power amplifier also includes that fundamental frequency strengthens electric capacity C6, and wherein, described fundamental frequency increases
One end of strong capacitive C6 connects the outfan of described power amplification circuit, and described fundamental frequency strengthens the other end ground connection of electric capacity C6.
Wherein, described fundamental frequency strengthens the further output improving power amplifier of effect of electric capacity C6.
The above, the only detailed description of the invention of the present invention, but protection scope of the present invention is not limited thereto, and any
Those familiar with the art in the technical scope that the invention discloses, the change that can readily occur in or replacement, all answer
Contain within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with scope of the claims.
Claims (3)
1. a cascade amplifying circuit, it is characterised in that described cascade amplifying circuit includes transistor M1 and crystal
Pipe M2, described transistor M1 and described transistor M2 are GaAs-MOSHEMT, wherein, the source ground of described M1, described M1
Grid as the signal input part V of described cascade amplifying circuitin, the grid of the most described M1 is by choke induction L1 even
Meeting negative voltage source VSS1, the drain electrode of described M1 connects positive voltage source VDD1 by choke induction L4, and the drain electrode of the most described M1 is led to
Crossing the source electrode that capacitance C2 connects described M2, the source electrode of described M2 passes through choke induction L5 ground connection, and the grid of described M2 passes through
Choke induction L2 connects negative voltage source VSS1, and the grid of the most described M2 passes through grid capacitance C1 ground connection, and the drain electrode of described M2 is made
Signal output part V for amplifying circuitout, the drain electrode of the most described M2 connects positive voltage source VDD2 by choke induction L3.
2. a power amplifier, it is characterised in that described power amplifier includes power supply S, source impedance Rs, capacitance C3, defeated
Enter matching network M-N1, drive amplification circuit, capacitance C4, inter-stage matching network M-N2, power amplification circuit, output matching
Network M-N3, capacitance C5 and load Rload；
Wherein, one end of described input matching network M-N1 is by described capacitance C3 and described source impedance RsOne end connect,
Described source impedance RsThe other end by described power supply S ground connection, the other end of described input matching network M-N1 and described driving
The input of amplifying circuit connects；
The outfan of described drive amplification circuit is connected by one end of capacitance C4 and inter-stage matching network M-N2, described level
Between the other end of matching network M-N2 be connected with the input of described power amplification circuit；
The outfan of described power amplification circuit is connected with one end of described output matching network M-N3, described output matching network
The other end of M-N3 is by capacitance C5 and described load RloadOne end connect, described load RloadOther end ground connection；
Described drive amplification circuit includes that transistor M3, described transistor M3 are GaAs-MOSHEMT, the source ground of described M3,
The grid of described M3 is connected with the other end of described input matching network M-N1 as the input of described drive amplification circuit, with
The grid of Shi Suoshu M3 connects negative voltage source VSS3 by choke induction L6, and the drain electrode of described M3 is as described drive amplification circuit
Outfan be connected by one end of described capacitance C4 and described inter-stage matching network M-N2, the drain electrode of the most described M3 is logical
Cross choke induction L7 and connect positive voltage source VDD3；
Described power amplification circuit includes that transistor M1 and transistor M2, described transistor M1 and described transistor M2 are
GaAs-MOSHEMT, wherein, the source ground of described M1, the grid of described M1 as described power amplification circuit input with
The other end of described inter-stage matching network M-N2 connects, and the grid of the most described M1 connects negative voltage source by choke induction L1
VSS1, the drain electrode of described M1 connects positive voltage source VDD1 by choke induction L4, and capacitance is passed through in the drain electrode of the most described M1
C2 connects the source electrode of described M2, and the source electrode of described M2 passes through choke induction L5 ground connection, and the grid of described M2 passes through choke induction L2
Connecting negative voltage source VSS1, the grid of the most described M2 passes through grid capacitance C1 ground connection, and the drain electrode of described M2 is as described power
Choke induction is passed through in the drain electrode that the outfan of amplifying circuit is connected the most described M2 with one end of described output matching network M-N3
L3 connects positive voltage source VDD2.
Power amplifier the most according to claim 2, described power amplifier also include fundamental frequency strengthen electric capacity C6, wherein,
Described fundamental frequency strengthens the outfan of the described power amplification circuit of one end connection of electric capacity C6, and described fundamental frequency strengthens another of electric capacity C6
End ground connection.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610793670.2A CN106330109B (en) | 2016-08-31 | 2016-08-31 | Cascade amplifying circuit and power amplifier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610793670.2A CN106330109B (en) | 2016-08-31 | 2016-08-31 | Cascade amplifying circuit and power amplifier |
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| Publication Number | Publication Date |
|---|---|
| CN106330109A true CN106330109A (en) | 2017-01-11 |
| CN106330109B CN106330109B (en) | 2019-02-12 |
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| CN201610793670.2A Active CN106330109B (en) | 2016-08-31 | 2016-08-31 | Cascade amplifying circuit and power amplifier |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107483020A (en) * | 2017-08-04 | 2017-12-15 | 杭州长泽科技有限公司 | A kind of elimination circuit of power amplifier electricity memory effect |
| US10985715B2 (en) | 2018-09-04 | 2021-04-20 | Murata Manufacturing Co., Ltd. | Power amplifier circuit |
| US11114982B2 (en) | 2019-03-20 | 2021-09-07 | Murata Manufacturing Co. , Ltd. | Power amplifier circuit |
| CN113746442A (en) * | 2021-11-05 | 2021-12-03 | 成都明夷电子科技有限公司 | Low-voltage high-linearity cascode amplifier |
| US11469715B2 (en) | 2019-12-05 | 2022-10-11 | Murata Manufacturing Co., Ltd. | Power amplifier circuit |
| US11545944B2 (en) | 2020-01-21 | 2023-01-03 | Murata Manufacturing Co., Ltd. | Power amplifier circuit |
| US11616479B2 (en) | 2019-04-05 | 2023-03-28 | Murata Manufacturing Co., Ltd. | Power amplifier apparatus |
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| CN102723917A (en) * | 2011-03-30 | 2012-10-10 | 比亚迪股份有限公司 | Power amplifier |
| CN107294502A (en) * | 2016-04-12 | 2017-10-24 | 香港城市大学 | The circuit and method of a kind of bandwidth enhancement of promotion low-noise amplifier |
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| CN1308788A (en) * | 1998-07-07 | 2001-08-15 | 松下电器产业株式会社 | Semiconductor amplifier circuit and system |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107483020A (en) * | 2017-08-04 | 2017-12-15 | 杭州长泽科技有限公司 | A kind of elimination circuit of power amplifier electricity memory effect |
| US10985715B2 (en) | 2018-09-04 | 2021-04-20 | Murata Manufacturing Co., Ltd. | Power amplifier circuit |
| US11658622B2 (en) | 2018-09-04 | 2023-05-23 | Murata Manufacturing Co., Ltd. | Power amplifier circuit |
| US11114982B2 (en) | 2019-03-20 | 2021-09-07 | Murata Manufacturing Co. , Ltd. | Power amplifier circuit |
| US11616479B2 (en) | 2019-04-05 | 2023-03-28 | Murata Manufacturing Co., Ltd. | Power amplifier apparatus |
| US11469715B2 (en) | 2019-12-05 | 2022-10-11 | Murata Manufacturing Co., Ltd. | Power amplifier circuit |
| US11545944B2 (en) | 2020-01-21 | 2023-01-03 | Murata Manufacturing Co., Ltd. | Power amplifier circuit |
| CN113746442A (en) * | 2021-11-05 | 2021-12-03 | 成都明夷电子科技有限公司 | Low-voltage high-linearity cascode amplifier |
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|---|---|
| CN106330109B (en) | 2019-02-12 |
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