CN106301298A - A kind of telecommunication transmission system and method for communication transmission - Google Patents
A kind of telecommunication transmission system and method for communication transmission Download PDFInfo
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- CN106301298A CN106301298A CN201610648088.7A CN201610648088A CN106301298A CN 106301298 A CN106301298 A CN 106301298A CN 201610648088 A CN201610648088 A CN 201610648088A CN 106301298 A CN106301298 A CN 106301298A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
Abstract
The invention discloses a kind of telecommunication transmission system, including: pulse generation circuit, when level signal occurs difference upset, described pulse generation circuit generates the pulse signal of different number；Optical coupling isolation circuit, described optical coupling isolation circuit electrically connects with described pulse generation circuit, and described optical coupling isolation circuit receives described pulse signal, and described pulse signal is carried out insulation blocking transmission；Pulse-detecting circuit, described pulse-detecting circuit electrically connects with described optical coupling isolation circuit, and described pulse-detecting circuit receives the pulse signal through insulation blocking transmission, generates transmission of control signals.The present invention is when data signal changes so that optical coupling isolation circuit sends pulse signal；When data signal does not converts, optical coupling isolation circuit is in cut-off state；The different pulse number of transmission is used to distinguish two states.Accordingly even when in the case of system is operated in badly, is there is error code by very noisy interference in signal, also can quickly be found.
Description
Technical field
The present invention relates to communication technical field, particularly relate to telecommunication transmission system and method for communication transmission.
Background technology
Communications refers to be carried out to another ground transmission and the exchange of data message by a ground, along with sending out of social productive forces
Exhibition, communications is applied in every field, such as remotely control etc., and therefore, people are to transmitting the accuracy requirement of message also
More and more higher.
But, communications mode traditionally, it is impossible to identify data message and the most correctly transmitted.Especially pass
Communication system is in severe working environment, and the data being in transmission easily error code are occurred by strong noise jamming, thus lead
Cause remotely to control the phenomenon such as unsuccessfully.
Summary of the invention
The technical scheme that the present invention provides is as follows:
A kind of telecommunication transmission system that the present invention provides, including: pulse generation circuit, when level signal occurs difference upset
Time, described pulse generation circuit generates the pulse signal of different number；Optical coupling isolation circuit, described optical coupling isolation circuit is with described
Pulse generation circuit electrically connects, and described optical coupling isolation circuit receives described pulse signal, described pulse signal carries out isolation and protects
Protect transmission；Pulse-detecting circuit, described pulse-detecting circuit electrically connects with described optical coupling isolation circuit, described pulse-detecting circuit
Receive the pulse signal through insulation blocking transmission, generate transmission logic detection signal.
Further, described pulse generation circuit includes: pulse generates electronic circuit, when level signal generation high level is to low
When level or low level to the one of which of high level overturns, generate single pulse signal；Dipulse generates electronic circuit, when level is believed
Number occur high level to low level and low level to the upset of high level time, generate dipulse signal；Pulse processes electronic circuit, uses
According to when there is difference upset in level signal, by single pulse signal, the pulse of the different number of dipulse signal processing output
Signal.
Further, described pulse generates electronic circuit and includes not gate, NAND gate and the first chronotron, and described pulse processes son
Circuit includes and door；The outfan of described not gate electrically connects with an input of described NAND gate, and the input of described not gate is defeated
Enter level signal；Another input of described NAND gate electrically connects with the outfan of described first chronotron；Described first time delay
The input of device electrically connects with the input of described not gate；The outfan of described NAND gate is electrically connected with a described input with door
Connect.
Further, described dipulse generates electronic circuit and includes the first XOR gate, the second XOR gate and the second chronotron, described
Second delay cycle Tb of the second chronotron is less than the first delay cycle Ta of described first chronotron；Described first XOR gate
One input electrically connects with the outfan of described first chronotron, another input incoming level letter of described first XOR gate
Number；One input of described second XOR gate electrically connects with the outfan of described first XOR gate, described second XOR gate another
One input is electrically connected with the outfan of described first XOR gate by described second chronotron；The output of described second XOR gate
End electrically connects with described another input with door.
Further, described pulse-detecting circuit includes the 3rd chronotron, the first trigger and the second trigger, the described 3rd
The input of chronotron electrically connects with the outfan of described optical coupling isolation circuit；The outfan of described 3rd chronotron and described the
The input CLK electrical connection of one trigger；The input D of described first trigger is electric with the outfan of described optical coupling isolation circuit
Connecting, the outfan Q of described first trigger electrically connects with the input D of described second trigger；Described second trigger
Input CLK electrically connects with the outfan of described 3rd chronotron, and the outfan Q of described second trigger forms described pulse inspection
The outfan of slowdown monitoring circuit.
A kind of method for communication transmission that the present invention also provides for, comprises the following steps: S10, turn over when level signal generation difference
When turning, generate the pulse signal of different number；The pulse signal that S20, basis have generated, carries out isolation and protects described pulse signal
Protect transmission；S30, according to the pulse signal transmitted through insulation blocking, generate transmission logic detection signal.
Further, described step S10 also includes: S11, when level signal generation high level paramount to low level or low level
When the one of which of level overturns, generate single pulse signal；S12, when level signal generation high level is to low level and low level
During to the upset of high level, generate dipulse signal；Pulse, when level signal occurs difference upset, is believed by S13, basis
Number, the pulse signal of the different number of dipulse signal processing output.
Further, described step S11 also includes: S111, when level signal occur high to Low upset time, original levels signal
Exporting the first level signal after the delay process that the first delay cycle is Ta, original levels signal exports after inverse
Second electrical level signal；After S112, described first level signal and described second electrical level signal participate in NAND operation jointly, generate arteries and veins
Wide it is equal to the first single pulse signal that the first delay cycle Ta, direction are downward；S113, when level signal occur low to high upset
Time, after described first level signal and described second electrical level signal participate in NAND operation jointly, generate three level signal.
Further, described step S12 also includes: S121, when level signal occur low to high and low to high upset time, initially
After level signal and the first level signal participate in an XOR jointly, output pulse width is equal to the first delay cycle Ta, direction
The second single pulse signal upwards；S122, described second single pulse signal after the delay process that the second delay cycle is Tb,
Output pulse width is equal to the first delay cycle Ta, direction the 3rd single pulse signal upwards；Described 3rd single pulse signal time delay in
Described second single pulse signal, its time delay is Tb；Described second delay cycle Tb is less than described first delay cycle Ta；
After S123, described second single pulse signal and described 3rd single pulse signal participate in XOR the most again, generate pulsewidth etc.
The first dipulse signal upwards in the second delay cycle Tb, direction；Described step S13 also includes: S131, send out when level signal
During raw high to Low upset, described first single pulse signal and described first dipulse signal jointly participate in computing after, export one
Individual pulsewidth is equal to the second delay cycle Tb, direction pulse signal upwards；S132, when level signal occur low to high upset time,
Described three level signal and described first dipulse signal jointly participate in computing after, continuously two pulsewidths of output are equal to second
Delay cycle Tb, direction pulse signal upwards.
Further, described step S30 also includes: S31, the pulse signal transmitted through insulation blocking, described pulse signal
After the delay process that delay cycle is Ta+Tb/2, export delay pulse signal；S32, described delay pulse signal and process
The pulse signal of insulation blocking transmission, exports start pulse signal after detection trigger of common participation；S33, described time delay arteries and veins
Rush signal and described start pulse signal, after the most again participating in detection trigger, export transmission logic detection signal.
Compared with prior art, a kind of telecommunication transmission system that the present invention provides, when data signal changes so that
Optical coupling isolation circuit sends pulse signal；When data signal does not converts, optical coupling isolation circuit is in cut-off state；Patrol to distinguish
Collect the upset to logic ' 0 ' of ' 0 ' upset arriving logic ' 1 ' and logic ' 1 ', use the different pulse number of transmission to distinguish two kinds
State.Accordingly even when in the case of system is operated in badly, is there is error code by very noisy interference in signal, also can quickly be found,
The self-recovery the most quickly realized.
The present invention increases pulse generation circuit between data signal input and optical coupling isolation circuit, and this pulse generates electricity
Road realizes once input and ' 0 ' upset arriving logic ' 1 ' occurs, exports two continuous impulse signals；Input occurs ' 1 ' to patrolling
Collect the upset of ' 0 ', export a pulse signal；It is thus possible to quickly find that erroneous transmissions occur in data, can avoid follow-up as early as possible
Mistake.
The present invention increases between optical coupling isolation circuit and data signal output pulse-detecting circuit, this circuit realiration
Once two continuous impulses be detected, export logic ' 1 ' to outfan；Only detect a pulse and then export logic ' 0 ' to defeated
Go out end.Optical coupling isolation circuit completes the transmission every discrete pulses of circuit.
Accompanying drawing explanation
Below by the way of the most understandable, accompanying drawings preferred implementation, to a kind of telecommunication transmission system and
Above-mentioned characteristic, technical characteristic, advantage and the implementation thereof of method for communication transmission are further described.
Fig. 1 is the circuit theory diagrams of a kind of telecommunication transmission system of the present invention；
Fig. 2 is the circuit theory diagrams of pulse generation circuit in a kind of telecommunication transmission system of the present invention；
Fig. 3 is the circuit theory diagrams of pulse-detecting circuit in a kind of telecommunication transmission system of the present invention；
Fig. 4 is the oscillogram of pulse generation circuit output in the present invention；
Fig. 5 is the oscillogram of pulse-detecting circuit output in the present invention；
Fig. 6 is the schematic flow sheet of a kind of method for communication transmission of the present invention；
Fig. 7 is the schematic flow sheet of step S10 in a kind of method for communication transmission of the present invention；
Fig. 8 is the schematic flow sheet of step S10 in another kind method for communication transmission of the present invention；
Fig. 9 is the schematic flow sheet of step S10 in another method for communication transmission of the present invention；
Figure 10 is the schematic flow sheet of step S30 in a kind of method for communication transmission of the present invention.
Drawing reference numeral illustrates:
10, pulse generation circuit, 20, optical coupling isolation circuit, 30, pulse-detecting circuit.
Detailed description of the invention
In order to be illustrated more clearly that the embodiment of the present invention or technical scheme of the prior art, below will comparison accompanying drawing explanation
The detailed description of the invention of the present invention.It should be evident that the accompanying drawing in describing below is only some embodiments of the present invention, for
From the point of view of those of ordinary skill in the art, on the premise of not paying creative work, it is also possible to obtain other according to these accompanying drawings
Accompanying drawing, and obtain other embodiment.
For making simplified form, only schematically show part related to the present invention in each figure, they do not represent
It is as the practical structures of product.It addition, so that simplified form readily appreciates, some figure has identical structure or function
Parts, only symbolically depict one of them, or have only marked one of them.In this article, " one " not only represents
" only this ", it is also possible to represent the situation of " more than one ".
As it is shown in figure 1, according to one embodiment of present invention, a kind of telecommunication transmission system, including pulse generation circuit 10,
Optical coupling isolation circuit 20 and pulse-detecting circuit 30, when level signal occurs difference upset, described pulse generation circuit 10 is raw
Become the pulse signal of different number；Different upsets include that high level upset overturns to high level to low level, low level；Described light
Coupling isolation circuit 20 electrically connects with described pulse generation circuit 10, and described optical coupling isolation circuit 20 receives described pulse signal, right
Described pulse signal carries out insulation blocking transmission；Described pulse-detecting circuit 30 electrically connects with described optical coupling isolation circuit 20, institute
State pulse-detecting circuit 30 and receive the pulse signal through insulation blocking transmission, generate transmission logic detection signal.
Described pulse generation circuit 10 includes that pulse generates electronic circuit, dipulse generates electronic circuit and pulse processes son electricity
Road, when there is one upset (high level upset to low level or low level overturn to high level) in level signal, described simple venation
Punching generates electronic circuit and generates single pulse signal；When level signal overturns, (high level upset to low level and low level overturn
To high level) time, described dipulse generates electronic circuit and generates dipulse signal；Difference upset (high level is there is in level signal
Upset overturns to high level to low level and low level) time, described pulse processes electronic circuit by single pulse signal, dipulse signal
Process the pulse signal of the different number of output.
Concrete, when COM1 is in data transmission, in order to detect whether data send correctly, according to difference occurs
The pulse signal of number, judges whether data have carried out correct transmission.When high level upset is to low level, described pulse
Process electronic circuit by single pulse signal, the pulse signal of dipulse signal processing output one；When low level overturns to high level
Time, described pulse processes electronic circuit and single pulse signal, dipulse signal processing exports the pulse signal of two continuously.Or,
When high level upset is to low level, described pulse processes electronic circuit and single pulse signal, dipulse signal processing is exported continuously
The pulse signal of two；When low level upset is to high level, described pulse processes electronic circuit by single pulse signal, dipulse letter
Number process the output pulse signal of.
Light-coupled isolation uses photo-coupler to isolate exactly.The structure of photo-coupler is equivalent to light emitting diode and light
Quick audion is packaged together.Optical coupling isolation circuit 20 makes do not have being directly connected to of electricity between segregate two parts circuit, main
If preventing the interference caused because there being the connection of electricity, particularly between control circuit and the external high pressure circuit of low pressure.
For the improvement of above-described embodiment, in the present embodiment, include non-as in figure 2 it is shown, described pulse generates electronic circuit
Door, NAND gate and the first chronotron, described pulse processes electronic circuit and includes and door；The outfan of described not gate and described NAND gate
One input electrical connection, the input incoming level signal of described not gate；Another input of described NAND gate and described the
The outfan electrical connection of one chronotron；The input of described first chronotron electrically connects with the input of described not gate；Described with
The outfan of not gate electrically connects with a described input with door.
Described dipulse generates electronic circuit and includes the first XOR gate, the second XOR gate and the second chronotron, and described second prolongs
Time device the second delay cycle Tb less than the first delay cycle Ta of described first chronotron, it is preferred that the first delay cycle Ta
The second delay cycle Tb equal to twice；One input of described first XOR gate is electrically connected with the outfan of described first chronotron
Connect, another input incoming level signal of described first XOR gate；One input of described second XOR gate and described first
The outfan electrical connection of XOR gate, another input of described second XOR gate is by the second chronotron and described first XOR gate
Outfan electrical connection；The outfan of described second XOR gate electrically connects with described another input with door.
In Fig. 4 from top to bottom, Article 1 waveform is the original levels signal of input, and Article 2 waveform is that the first chronotron is defeated
The first level signal gone out, Article 3 waveform is the first dipulse signal of the second XOR gate output, Article 4 waveform right and wrong
First single pulse signal of door output, Article 5 waveform is the second single pulse signal of the first XOR gate output, Article 6 waveform
Being the 3rd single pulse signal of the second chronotron output, Article 7 waveform is and the pulse signal of door output.
Concrete, original levels signal is divided into three original levels signal branch, Article 1 original levels signal branch to enter
After entering the first chronotron, export the first level signal that the first delay cycle is Ta；Article 2 original levels signal branch enters
Non-behind the door, export the second electrical level signal contrary with original levels signal；First level signal and second electrical level signal enter jointly
Enter with behind the door, the first single pulse signal that output pulse width is downward equal to the first delay cycle Ta, direction, or output the 3rd level
Signal；
After first level signal enters XOR gate with Article 3 original levels signal branch, output pulse width is equal to the first time delay
Cycle T a, direction the second single pulse signal upwards；Second single pulse signal is divided into two branch roads, first single pulse signal
After branch road enters the second chronotron, export the second single pulse signal that the second delay cycle is Tb；Second single pulse signal is with another
Article one, after the second single pulse signal enters XOR gate, output pulse width is equal to the second delay cycle Tb, direction first pair of arteries and veins upwards
Rush signal；
When there is upset high level " 1 " upset to low level " 0 " in level signal, the first single pulse signal and first pair of arteries and veins
Rushing signal to enter with behind the door, two pulsewidths of output are equal to the second delay cycle Tb, direction pulse signal upwards continuously；Work as level
When signal occurs upset low level " 0 " upset to high level " 1 ", three level signal and the first dipulse signal enter and door
After, export a pulsewidth equal to the second delay cycle Tb, direction pulse signal upwards.
Circuit part in above-described embodiment can also be made suitably modified by those skilled in the art, to realize in the present invention
Function, fall within protection scope of the present invention, such as: described pulse generate electronic circuit can also enter in such a way
Row design, described pulse generates electronic circuit and includes not gate and door and the first chronotron, the outfan of described not gate with described with
One input electrical connection of door, described another input incoming level signal with door；The input of described not gate and described the
The outfan electrical connection of one chronotron, the input incoming level signal of described first chronotron.Pulse generates electronic circuit
Work process is as follows:
Original levels signal is divided into three original levels signal branch, and Article 1 original levels signal branch enters first and prolongs
Time device after, export the first level signal that the first delay cycle is Ta；First level signal entrance is non-behind the door, output and the first electricity
The second electrical level signal that ordinary mail number is contrary；Article 2 original levels signal branch and second electrical level signal jointly enter with behind the door,
The first single pulse signal that output pulse width is downward equal to the first delay cycle Ta, direction, or output three level signal；First
The generating mode of dipulse signal is identical with generating mode in previous embodiment, and here is omitted；
When level signal generation low level " 0 " upset is to high level " 1 ", the first single pulse signal and the first dipulse letter
Number entering with behind the door, continuously two pulsewidths of output are equal to the second delay cycle Tb, direction pulse signal upwards；Work as level signal
When there is high level " 1 " upset to low level " 0 ", three level signal and the first dipulse signal enter with behind the door, export one
Individual pulsewidth is equal to the second delay cycle Tb, direction pulse signal upwards.
In Fig. 5 from top to bottom, Article 1 waveform is the pulse signal of pulse generation circuit output, and Article 2 waveform is the 3rd
The delay pulse signal of chronotron output, Article 3 waveform is the start pulse signal of the first trigger output, Article 4 waveform
It it is the transmission logic detection signal of the second trigger output.
For the improvement of above-described embodiment, in the present embodiment, as it is shown on figure 3, described pulse-detecting circuit 30 includes the 3rd
Chronotron, the first trigger and the second trigger, the input of described 3rd chronotron is defeated with described optical coupling isolation circuit 20
Go out end electrical connection；The outfan of described 3rd chronotron electrically connects with the input CLK of described first trigger；Described first touches
The input D sending out device electrically connects with the outfan of described optical coupling isolation circuit 20, and the outfan Q of described first trigger is with described
The input D electrical connection of the second trigger；The input CLK of described second trigger is electric with the outfan of described 3rd chronotron
Connecting, the outfan Q of described second trigger forms the outfan of described pulse-detecting circuit 30.
Concrete, pulse-detecting circuit 30 is made up of a delay circuit and two d type flip flops, and circuit is simple, it is achieved inspection
Measure two continuous print pulses just one logic ' 1 ' of output, a pulse output logic ' 0 ' detected.
As shown in Figure 6, Figure 7, according to another embodiment of the invention, a kind of method for communication transmission, comprise the following steps:
S10, when there is difference upset in level signal, generate the pulse signal of different number；Different upsets include that high level overturns extremely
Low level, low level overturn to high level；The pulse signal that S20, basis have generated, carries out insulation blocking to described pulse signal
Transmission；S30, according to the pulse signal transmitted through insulation blocking, generate transmission logic detection signal.
Described step S10 also includes: S11, when level signal occur one upset (high level overturn to low level or low electricity
Flat upset is to high level) time, generate single pulse signal；S12, when level signal overturn (high level upset to low level and
Low level overturns to high level) time, generate dipulse signal；S13, level signal occur difference upset (high level overturn extremely
Low level and low level overturn to high level) time, by single pulse signal, the pulse letter of the different number of dipulse signal processing output
Number.
As shown in Fig. 4, Fig. 6, Fig. 8, Fig. 9, according to still a further embodiment, a kind of method for communication transmission, including
Following steps:
S111, when level signal occurs high " 1 " to low " 0 " to overturn, original levels signal through the first delay cycle is
Exporting the first level signal after the delay process of Ta, original levels signal exports second electrical level signal after inverse；
After S112, described first level signal and described second electrical level signal participate in NAND operation jointly, generate pulsewidth etc.
First single pulse signal downward in the first delay cycle Ta, direction；
S121, when level signal occurs high " 1 " to low " 0 " to overturn, original levels signal and the first level signal are common
After participating in an XOR, output pulse width is equal to the first delay cycle Ta, direction the second single pulse signal upwards；
S122, described second single pulse signal are after the delay process that the second delay cycle is Tb, and output pulse width is equal to
First delay cycle Ta, direction the 3rd single pulse signal upwards；Described 3rd single pulse signal time delay is in described second simple venation
Rushing signal, its time delay is Tb；Second delay cycle Tb is less than the first delay cycle Ta；Preferably, the first delay cycle Ta
The second delay cycle Tb equal to twice；
After S123, described second single pulse signal and described 3rd single pulse signal participate in XOR the most again, raw
Become pulsewidth equal to the second delay cycle Tb, direction the first dipulse signal upwards；
S131, when level signal occurs high " 1 " to low " 0 " to overturn, described first single pulse signal and the first dipulse
Signal jointly participate in computing after, export a pulsewidth equal to the second delay cycle Tb, direction pulse signal upwards.
S113, when there is low " 0 " to high " 1 " upset in level signal, the first level signal and second electrical level signal are common
After participating in NAND operation, generate three level signal；
S121, when there is low " 0 " to high " 1 " upset in level signal, original levels signal and the first level signal are common
After participating in an XOR, output pulse width is equal to the first delay cycle Ta, direction the second single pulse signal upwards；
S122, described second single pulse signal are after the delay process that the second delay cycle is Tb, and output pulse width is equal to
First delay cycle Ta, direction the 3rd single pulse signal upwards；Described 3rd single pulse signal time delay is in described second simple venation
Rushing signal, its time delay is Tb；Second delay cycle Tb is less than the first delay cycle Ta；
After S123, described second single pulse signal and described 3rd single pulse signal participate in XOR the most again, raw
Become pulsewidth equal to the second delay cycle Tb, direction the first dipulse signal upwards；
S132, when there is low " 0 " to high " 1 " upset in level signal, described three level signal and the first dipulse letter
After number common participation and computing, two pulsewidths of output are equal to the second delay cycle Tb, direction pulse signal upwards continuously.
The pulse signal that S20, basis have generated, carries out insulation blocking transmission to described pulse signal；S30, according to through every
From the pulse signal of protection transmission, generate transmission logic detection signal.
The present invention increases pulse generation circuit 10 between data signal input and optical coupling isolation circuit 20, and this pulse is raw
Become circuit 10 to realize once input and ' 0 ' upset arriving logic ' 1 ' occurs, export two continuous impulse signals；Input occurs
' 1 ' upset arriving logic ' 0 ', exports a pulse signal；
Pulse generation circuit 10 is made up of combination logic and delay circuit, it is achieved in input ain saltus step from ' 0 ' to ' 1 '
Time, outfan aout exports two continuous print pulses；Input ain from ' 1 ' to ' 0 ' saltus step time, at outfan aout
Two 1 pulses of upper output；Its output pulse width (Tb) and spacing (Ta-Tb) are determined by delay circuit parameter Ta and Tb.
As shown in Fig. 5, Fig. 8, Fig. 9, Figure 10, according to still another embodiment of the invention, a kind of method for communication transmission, including
Following steps:
S111, when level signal occurs high " 1 " to low " 0 " to overturn, original levels signal through the first delay cycle is
Exporting the first level signal after the delay process of Ta, original levels signal exports second electrical level signal after inverse；
After S112, described first level signal and described second electrical level signal participate in NAND operation jointly, generate pulsewidth etc.
First single pulse signal downward in the first delay cycle Ta, direction；
S121, when level signal occurs high " 1 " to low " 0 " to overturn, original levels signal and the first level signal are common
After participating in an XOR, output pulse width is equal to the first delay cycle Ta, direction the second single pulse signal upwards；
S122, described second single pulse signal are after the delay process that the second delay cycle is Tb, and output pulse width is equal to
First delay cycle Ta, direction the 3rd single pulse signal upwards；Described 3rd single pulse signal time delay is in described second simple venation
Rushing signal, its time delay is Tb；Second delay cycle Tb is less than the first delay cycle Ta, it is preferred that the first delay cycle Ta
The second delay cycle Tb equal to twice；
After S123, described second single pulse signal and described 3rd single pulse signal participate in XOR the most again, raw
Become pulsewidth equal to the second delay cycle Tb, direction the first dipulse signal upwards；
S131, when level signal occurs high " 1 " to low " 0 " to overturn, described first single pulse signal and the first dipulse
Signal jointly participate in computing after, export a pulsewidth equal to the second delay cycle Tb, direction pulse signal upwards.
S113, when there is low " 0 " to high " 1 " upset in level signal, the first level signal and second electrical level signal are common
After participating in NAND operation, generate three level signal；
S121, when there is low " 0 " to high " 1 " upset in level signal, original levels signal and the first level signal are common
After participating in an XOR, output pulse width is equal to the first delay cycle Ta, direction the second single pulse signal upwards；
S122, described second single pulse signal are after the delay process that the second delay cycle is Tb, and output pulse width is equal to
First delay cycle Ta, direction the 3rd single pulse signal upwards；Described 3rd single pulse signal time delay is in described second simple venation
Rushing signal, its time delay is Tb；Second delay cycle Tb is less than the first delay cycle Ta；
After S123, described second single pulse signal and described 3rd single pulse signal participate in XOR the most again, raw
Become pulsewidth equal to the second delay cycle Tb, direction the first dipulse signal upwards；
S132, when there is low " 0 " to high " 1 " upset in level signal, described three level signal and the first dipulse letter
After number common participation and computing, two pulsewidths of output are equal to the second delay cycle Tb, direction pulse signal upwards continuously.
The pulse signal that S20, basis have generated, carries out insulation blocking transmission to described pulse signal；
S31, the pulse signal transmitted through insulation blocking, described pulse signal is prolonging of Ta+Tb/2 through delay cycle
Time process after, export delay pulse signal；
S32, described delay pulse signal and described pulse signal, after detection trigger of common participation, output triggers pulse
Signal；
S33, described delay pulse signal and described start pulse signal, participate in output transmission after detection trigger the most again
Logic detection signal.
Increasing pulse-detecting circuit 30 between optical coupling isolation circuit 20 and data signal output, this circuit realiration is once
Detect that two continuous impulses then export logic ' 1 ' to outfan；Only detect a pulse and then export logic ' 0 ' to output
End.Optical coupling isolation circuit 20 completes the transmission every discrete pulses of circuit.
It should be noted that, above-described embodiment all can independent assortment as required.The above is only the preferred of the present invention
Embodiment, it is noted that for those skilled in the art, in the premise without departing from the principle of the invention
Under, it is also possible to making some improvements and modifications, these improvements and modifications also should be regarded as protection scope of the present invention.
Claims (10)
1. a telecommunication transmission system, it is characterised in that including:
Pulse generation circuit, when level signal occurs difference upset, described pulse generation circuit generates the pulse of different number
Signal；
Optical coupling isolation circuit, described optical coupling isolation circuit electrically connects with described pulse generation circuit, and described optical coupling isolation circuit connects
Receive described pulse signal, described pulse signal is carried out insulation blocking transmission；
Pulse-detecting circuit, described pulse-detecting circuit electrically connects with described optical coupling isolation circuit, and described pulse-detecting circuit connects
Receive the pulse signal through insulation blocking transmission, generate transmission logic detection signal.
2. telecommunication transmission system as claimed in claim 1, it is characterised in that described pulse generation circuit includes:
Pulse generates electronic circuit, for when wherein the one of level signal generation high level to low level or low level to high level
When planting upset, generate single pulse signal；
Dipulse generates electronic circuit, for when level signal generation high level to low level and low level to the upset of high level
Time, generate dipulse signal；
Pulse processes electronic circuit, and for according to when level signal occurs difference upset, described pulse processes electronic circuit by simple venation
Rush signal, the pulse signal of the different number of dipulse signal processing output.
3. telecommunication transmission system as claimed in claim 2, it is characterised in that:
Described pulse generates electronic circuit and includes not gate, NAND gate and the first chronotron, described pulse process electronic circuit include with
Door；
The outfan of described not gate electrically connects with an input of described NAND gate, the input incoming level letter of described not gate
Number；
Another input of described NAND gate electrically connects with the outfan of described first chronotron；The input of described first chronotron
End electrically connects with the input of described not gate；
The outfan of described NAND gate electrically connects with a described input with door.
4. telecommunication transmission system as claimed in claim 3, it is characterised in that:
Described dipulse generates electronic circuit and includes the first XOR gate, the second XOR gate and the second chronotron, described second chronotron
The second delay cycle Tb less than the first delay cycle Ta of described first chronotron；
One input of described first XOR gate electrically connects with the outfan of described first chronotron, described first XOR gate another
One input incoming level signal；
One input of described second XOR gate electrically connects with the outfan of described first XOR gate, described second XOR gate another
One input is electrically connected with the outfan of described first XOR gate by described second chronotron；
The outfan of described second XOR gate electrically connects with described another input with door.
5. telecommunication transmission system as claimed in claim 1, it is characterised in that:
Described pulse-detecting circuit includes the 3rd chronotron, the first trigger and the second trigger, described 3rd chronotron defeated
Enter end to electrically connect with the outfan of described optical coupling isolation circuit；The outfan of described 3rd chronotron and described first trigger
Input CLK electrically connects；
The input D of described first trigger electrically connects with the outfan of described optical coupling isolation circuit, described first trigger
Outfan Q electrically connects with the input D of described second trigger；
The input CLK of described second trigger electrically connects with the outfan of described 3rd chronotron, described second trigger
Outfan Q forms the outfan of described pulse-detecting circuit.
6. a method for communication transmission, it is characterised in that comprise the following steps:
S10, when there is difference upset in level signal, generate the pulse signal of different number；
The pulse signal that S20, basis have generated, carries out insulation blocking transmission to described pulse signal；
S30, according to the pulse signal transmitted through insulation blocking, generate transmission logic detection signal.
7. method for communication transmission as claimed in claim 6, it is characterised in that described step S10 also includes:
S11, when level signal generation high level to low level or low level to the one of which of high level overturns, generate simple venation
Rush signal；
S12, when level signal generation high level to low level and low level to the upset of high level, generate dipulse signal；
S13, for according to level signal occur difference upset time, by single pulse signal, dipulse signal processing output difference
The pulse signal of number.
8. method for communication transmission as claimed in claim 7, it is characterised in that described step S11 also includes:
S111, when level signal occur high to Low upset time, original levels signal is at the time delay that the first delay cycle is Ta
Exporting the first level signal after reason, original levels signal exports second electrical level signal after inverse；
After S112, described first level signal and described second electrical level signal participate in NAND operation jointly, generate pulsewidth equal to the
The first single pulse signal that one delay cycle Ta, direction are downward；
S113, when level signal occur low to high upset time, described first level signal and described second electrical level signal are joined jointly
After adding NAND operation, generate three level signal.
9. method for communication transmission as claimed in claim 8, it is characterised in that described step S12 also includes:
S121, when level signal occur low to high and low to high upset time, original levels signal and the first level signal are joined jointly
After adding an XOR, output pulse width is equal to the first delay cycle Ta, direction the second single pulse signal upwards；
S122, described second single pulse signal are after the delay process that the second delay cycle is Tb, and output pulse width is equal to first
Delay cycle Ta, direction the 3rd single pulse signal upwards；Described 3rd single pulse signal time delay is in described second pulse letter
Number, its time delay is Tb；Described second delay cycle Tb is less than described first delay cycle Ta；
After S123, described second single pulse signal and described 3rd single pulse signal participate in XOR the most again, generate arteries and veins
Wide the first dipulse signal being equal to the second delay cycle Tb, direction upwards；
Described step S13 also includes:
S131, when there is high to Low upset in level signal, described first single pulse signal and described first dipulse signal are altogether
With participating in and after computing, export a pulsewidth equal to the second delay cycle Tb, direction pulse signal upwards；
S132, when level signal occur low to high upset time, described three level signal and described first dipulse signal are common
Participating in and after computing, two pulsewidths of output are equal to the second delay cycle Tb, direction pulse signal upwards continuously.
10. method for communication transmission as claimed in claim 6, it is characterised in that described step S30 also includes:
S31, the pulse signal transmitted through insulation blocking, described pulse signal is at the time delay that delay cycle is Ta+Tb/2
After reason, export delay pulse signal；
S32, described delay pulse signal and the pulse signal through insulation blocking transmission, defeated after detection trigger of common participation
Go out start pulse signal；
S33, described delay pulse signal and described start pulse signal, export transmission logic after the most again participating in detection trigger
Detection signal.
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