KR100256674B1 - Matching assembly - Google Patents

Abstract

PURPOSE: A matching adapter for implementing an Ethernet LAN is provided to connect home information instruments for communication by economically and rapidly constructing a home LAN by using an existing home telephone line as it is and the existing low-priced Ethernet LAN hardware. CONSTITUTION: A transmission control signal generator(100) receives a LAN signal from an LAN card and provides a transmission control signal. A receiving control signal generator(200) receives a telephone signal from a telephone line and provides a receiving control signal. The first signal converting unit(300) is controlled by the transmission control signal to convert the LAN signal inputted from the LAN card into a logic level signal or is controlled by the receiving control signal to converts the inputted logic level signal into a LAN signal and transmits it to the LAN card. The second signal converting unit(400) is controlled by the transmission control signal to convert the logic level signal into a telephone signal and transmits it to the telephone line, and is controlled by the receiving control signal to converts the telephone signal transmitted from the telephone line into a logic level signal and transmits it to the first signal converting unit(300).

Description

Matching Adapter for Ethernet Local Area Network

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a matching adapter for implementing an Ethernet local area network, and more particularly, to construct an Ethernet LAN using a telephone line of a two-wire shared bus system existing in a home as it is. It relates to a matching adapter for.

Recently, with the development of information and communication technology and gradually entering the information society, the Internet communication network which connects various computers and information devices and exchanges necessary data is expanding. In the end portion of the Internet, an Ethernet LAN occupies most of a communication network to which real computers or information devices are connected. Ethernet LANs have long-term proven reliability and reliability, and are the most economical LANs to be built by mass production.

Nowadays, Ethernet LAN is widely used for data communication. The Ethernet LAN is divided into 10Base5, 10Base2, and 10BaseT according to the characteristics of the physical medium used and the communication distance. 10Base5 and 10Base2 use coaxial cable, and 10BaseT uses UTP (Unshielded Twisted Pair) cable with a characteristic impedance of 100Ω as a physical medium.

However, since the characteristic impedance of the telephone line installed in the home is about 120Ω, since the physical characteristics of the physical media used in the existing LAN and the physical characteristics of the telephone line installed in the home are different, the telephone line without modification of the existing LAN hardware is used. There is a problem that it is impossible to build a LAN using.

Accordingly, the present invention is to solve the problems as described above, by using the existing LAN hardware used in the Ethernet LAN without modification as it is possible to operate the Ethernet LAN on the existing home telephone line, at a low cost The purpose is to provide a matching adapter that can be used to build an Ethernet LAN in the home in a short time.

1 is an exemplary view showing the configuration of an Ethernet LAN to which the present invention is applied.

2 is a circuit diagram of an embodiment of a matching adapter of an Ethernet LAN according to the present invention;

3 is a circuit diagram of another embodiment of a matching adapter of an Ethernet LAN according to the present invention;

4 is a circuit diagram of an embodiment of a first transmission control signal generator of FIG. 2;

FIG. 5 is a circuit diagram of an embodiment of a reception control signal generator of FIG. 2; FIG.

FIG. 6 is a circuit diagram of an embodiment of a first signal converter of FIG. 2. FIG.

FIG. 7 is a circuit diagram of an embodiment of a second signal converter of FIG. 2. FIG.

8A and 8B are characteristic diagrams of control signals inputted to a telephone signal converter.

9A and 9B are characteristic diagrams of control signals input to a LAN signal conversion unit.

10A is a characteristic diagram of a data signal transmitted through the Tx end of a LAN card.

10B is a characteristic diagram of a link test pulse transmitted through the Tx end of the LAN card.

11A is a characteristic diagram of data received through the Rx end of the LAN card.

11B is a characteristic diagram of a link test pulse received through the Rx end of the LAN card.

12A and 12B are output characteristics diagrams sent from the matching adapter of the present invention to a telephone line.

Explanation of symbols on the main parts of the drawings

100: transmission control signal generator 200: reception control signal generator

300: first signal converter 400: second signal converter

In order to achieve the above object, the present invention provides a matching adapter for connecting a signal between a local area network and a telephone line, wherein the transmission control signal receives a LAN signal from the LAN circuit and provides a transmission control signal. Generating means; Reception control signal generation means for receiving a telephone signal from the telephone line and providing a reception control signal; First transmission signal conversion means controlled by the transmission control signal to convert the LAN signal into a logic level signal; Second transmission signal conversion means, controlled by the transmission control signal, for converting the logic level signal transmitted from the first signal conversion means and transmitting the converted logic level signal to the telephone line; First reception signal conversion means controlled by the reception control signal and converting a telephone signal from the telephone line into a logic level signal; And second receiving signal converting means, controlled by the receiving control signal, converting a logic level signal transmitted from the first receiving signal converting means into the LAN signal and transmitting the converted logic level signal to the LAN card.

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.

1 is an exemplary view showing the configuration of an Ethernet local area network (Ethernet LAN) to which the present invention is applied.

As shown in FIG. 1, a matching adapter and a PC are connected by an Unshielded Twisted Pair (UTP) cable, and the matching adapters are connected by a telephone line. In other words, 10BaseT, which uses four wires, is driven on a two-line shared bus system telephone line using a matching adapter. Since the characteristic impedance of the telephone line is about 120Ω, the matching adapters on the PC1 and PC2 sides are terminated with a 120Ω resistor to prevent reflection of the signal. In the matching adapter connected to the remaining PCs, the input impedance value seen from the telephone line side is made very large to prevent impedance disturbance.

2 is a circuit diagram of an embodiment of a matching adapter of an Ethernet local area network according to the present invention.

As shown in Fig. 2, the matching adapter of the Ethernet local area network of the present invention receives a LAN signal from a LAN card and transmits a transmission control signal generator 100 for providing a transmission control signal and a telephone signal from a telephone line. A reception control signal generation unit 200 which receives an input and provides a reception control signal and is controlled by the transmission control signal to convert a LAN signal input from a LAN card into a logic level signal or is controlled by the reception control signal A first signal converter 300 for converting an input logic level signal into a LAN signal and transmitting the same to a LAN card; and controlled by the transmission control signal, converting the logic level signal to a switching line, A second signal converter 400 converting the telephone signal transmitted from the telephone line by the reception control signal into a logic level signal and transmitting the converted signal to the first signal converter 300; The rain.

Referring to the matching adapter of the present invention having the structure as described above are as follows.

The matching adapter of FIG. 2 passes both the data signal sent out from the PC (Persnal Computer) and the link test pulse for inspecting the communication link and is sent out to the telephone line. 10BaseT emits link test pulse, receives return pulse and stops all functions in case of abnormal pulse. Thus, the matching adapter of FIG. 2 sends the link test pulse to the telephone line to provide the link test pulse to another matching adapter, and at the same time, receives the link test pulse to confirm that the link is normal. In addition, when sending data through the Tx terminal connected to the LAN card, if a signal is received from the Rx terminal connected to the LAN card, a collision is detected and data transmission is stopped. Need a function to prevent the signal from coming in. To provide these two functions, a retriggerable multivibrator is used to generate the necessary control signals for the line driver and receiver. The characteristic impedance of the UTP cable used for 10BaseT is 100Ω, and 50Ω resistors were connected to Tx + and Tx- of FIG. 2 so that it would look as if the existing UTP cable was connected when the matching adapter was seen on the LAN card of the PC. Since the characteristic impedance of the telephone line was about 120Ω, two 60Ω resistors were connected to the inverters 411 and 421 connected to the telephone line, and terminated to 120Ω to prevent reflection of the signal. Here, the resistance is divided in half and connected to ground, respectively, so that the trigger signal input to the multivibrator is not floated and the signal is transmitted in a differential mode.

3 is a circuit diagram of another embodiment of a matching adapter of an Ethernet LAN according to the present invention.

As shown in FIG. 3, the transmission control signal generator 100 is different from FIG.

The matching adapter of FIG. 3 passes only the data signal from the PC and does not send the link test pulse to the telephone line. The matching adapter of FIG. 3 differs from the matching adapter of FIG. 2 in that the link test pulse does not pass through the matching adapter by using only a signal input to the Tx-end as a trigger signal.

4 is a circuit diagram of an embodiment of a first transmission control signal generator of FIG. 2.

As shown in FIG. 4, the first transmission control signal generator of FIG. 2 includes a link test pulse detection unit 110 which detects and transmits a link test pulse transmitted through a Tx + terminal from a LAN card of the PC, and a LAN card of the PC. Enable the inverter 311 by receiving the data detector 120 for detecting and transmitting the data signal transmitted through the Tx-end, the output signal of the link test pulse detector 110, and the output signal of the data detector 120. A first transmission control signal generator 130 for providing a transmission control signal for transmitting a signal and a second transmission control signal generator for enabling the inverter 411 by receiving an output signal of the first transmission control signal generator 130 ( 140).

The link test pulse detector 110 and the data detector 120 are each composed of retrigger multivibrators 111 and 121.

The first transmission control signal generator 130 includes a negative logic gate 131 that negatively combines the output signal of the link test pulse detector 110 and the output signal of the data detector 120.

The second transmission control signal generator 140 includes an inverter 141 for inverting the output signal of the first transmission control signal generator 130.

The first transmission signal control generator of FIG. 2 having the structure as described above will be described below.

In FIG. 2, a part of generating an enable signal for the inverters 311 and 411 by sensing a signal input through the Tx + terminal and the Tx- terminal is again shown, and serves to transfer a signal from the PC to a telephone line. The enable signal generated by the retrigger multivibrators 111 and 121 is used to pass or block the link test pulse and the data signal. The trigger signal of the retrigger multivibrator (111, 121) uses the output signal of the LAN card of the PC input through the Tx + stage and the Tx- stage. The retrigger multivibrator 111, which uses a signal input through the Tx + stage as a trigger signal, is used to pass a link test pulse to the telephone line, and uses a signal input through the Tx- stage as a trigger signal. Trigger multivibrator 121 is used to allow the data signal to pass through the matching adapter. The output of the retrigger multivibrator (111, 121) outputs a pulse having a length of 300 ns. The output of the retrigger multivibrator (121) for passing the data signal continues to be retriggered before 300 ns has elapsed and the length of the data signal is longer than the length of the data signal. The pulse comes out so it can pass the data signal. Ethernet LANs operating at 10 Mbps use Manchester encoding and have a single pulse length of 300 ns for each retrigger multivibrator (111, 121) to allow enough time for the signal to pass, since one bit time is 0.1 μs. . Each retrigger multivibrator (111, 121) is to be triggered when the signal rises. When the inverters 311 and 411 pass data or link test pulses from the PC, the inverters 311 and 411 pass a negative logic sum of the data signal and the link test pulse using the negative logic gate 131.

5 is a circuit diagram of an exemplary embodiment of the reception control signal generator of FIG. 2.

As shown in FIG. 5, the reception signal generator of FIG. 2 includes a link test pulse detector 210 which detects and transmits a link test pulse transmitted from a telephone line, and a data detector that detects and transmits a data signal transmitted from a telephone line. 220, a logic level signal detector 230 for detecting a TTL signal from a signal transmitted from a telephone line, an output signal of the link test pulse detector 210, an output signal of the data detector 220, and a logic level signal detector ( A first reception control signal generator 240 that receives an output signal of 230 and provides a transmission control signal for enabling the inverter 321, and an inverter that receives an output signal of the first reception control signal generator 240. A second reception control signal generator 250 for enabling 421, a reverse propagation prevention unit 260 for preventing data from being transferred back during transmission, and an enable signal An enable signal blocking prevention unit 270 outputs a signal for preventing a call from being blocked to the logic level signal detecting unit 230.

The link test pulse detector 210, the data detector 220, and the logic level signal detector 230 include retriggered multivibrators 211, 221, and 231, respectively.

The first reception control signal generator 240 includes a logic sum gate 241 for negating and logically combining the output signal of the link test pulse detector 210 and the output signal of the data detector 220, and the output signal and logic of the logic sum gate 241. And a logical sum gate 242 for ORing the output signal of the level signal detector 231 and an AND gate 243 for ANDing the output signal of the OR gate 242 and the output signal of the reverse transfer prevention unit 260. .

The second reception control signal generator 250 includes an inverter 141 for inverting the output signal of the first transmission control signal generator 240.

The reverse transfer prevention unit 260 is composed of one tri-state buffer.

The enable signal blocking prevention unit 270 is always enabled by ground, and the two input terminals are connected to a telephone line, and the output terminal is a three-state buffer 271 connected to the input terminal of the logic level signal detection unit 230. Is done.

The reception control signal generator of FIG. 2 having the structure as described above will be described below.

A control circuit is provided for providing an enable signal to inverters 321 and 421 to sense a signal on a telephone line and receive data and link test pulses.

The function of the reception control signal generator of FIG. 2 transmits a data signal and a link test pulse from a telephone line to the Rx terminal of the LAN card, and when transmitting data from the Tx terminal, prevents data sent directly to the Rx terminal from coming in immediately. Do not detect. As in the case of the transmission control signal generator described in FIG. 4, the length of a single pulse from each of the retrigger multivibrators 211, 221, and 231 is 300 ns, and the signal is triggered when the signal rises. The retrigger multivibrator 211 generates an enable signal so that the retrigger multivibrator 221 can receive a data signal. When a data signal comes in on a telephone line, if the signal level is small and smaller than the TTL level, the data signal continues to come in, but the retrigger multivibrator (211, 221, 231) cannot be triggered. The enable signal is disconnected at the output of 221. In this case, a transmission error occurs because the inverter does not pass the data. Thus, to prevent the enable signal from breaking due to the small data signal level, the inverter 271 is used to generate a TTL level signal for the signal on the telephone line, which is then used by another retrigger multivibrator. Make an enable signal. The enable signal obtained by logically combining the output signals of the retrigger multivibrators 211, 221, and 231 is transmitted to the inverters 321 and 421. In 10BaseT, when data is sent to Rx stage when data is sent from Tx stage, it is detected as a collision. By the way, although 10xT uses 4 wires, Tx and Rx are separated, but since the home telephone line is a 2-wire shared bus system, when the data is sent from the matching adapter to the telephone line as shown in FIG. It comes in. This results in false collision detection, which stops data transmission. In order to prevent this, the reception control signal generator of FIG. 5 prevents the data from returning to the Rx stage while transmitting data using the tri-state buffer 261. The output of the retriggered multivibrator 121 is low because the Tx- and Tx + signals are 180 ° out of phase and remain negative at Tx- when the link test pulse comes out, leaving the TTL level. Will be maintained. However, since the data signal is triggered, the signal is held high and the value of Q 'becomes low. At this time, the tri-state buffer connected to Q 'of the retrigger multivibrator 121 transmits a low value to the AND gate to block the enable signals supplied to the retrigger multivibrators 121 and 221.

FIG. 6 is a circuit diagram of an example of the first signal converter of FIG. 2.

As illustrated in FIG. 6, the first signal converter 300 of FIG. 2 is controlled by the transmission control signal to convert the LAN signal transmitted from the LAN card into a logic level signal to convert the LAN signal into a second signal converter ( The first logic level signal converting unit 310 to be transmitted to the 400 and the control signal controlled by the reception control signal, converts the logic level signal transmitted from the second signal converting unit 400 to a LAN signal to the LAN card It is provided with a LAN signal conversion unit 320 to transmit.

The first logic level signal converter 310 is composed of an inverter 311.

The LAN signal converter 320 is composed of an inverter 321.

The first signal converter of FIG. 2 having the structure as described above will be described in detail as follows.

The first signal converter of FIG. 2 performs a function of converting a LAN signal from the LAN card into a TTL level signal or converting a TTL level signal into a LAN signal.

Tx and Rx represent 4 pins used in LAN among 8 pins of RJ-45 (chip name). A 50Ω resistor connected to each of Tx + and Tx- prevents the trigger signal from the LAN card from floating. The LAN signal at the Tx stage passes through the receiver of the inverter 311 and is then converted into a TTL level signal and input to the second signal converter.

At the time of data reception, the TTL level signal transmitted from the second signal converter passes through the line driver of the inverter 321 and is transmitted to Rx + and Rx- which are reception terminals of the LAN card.

FIG. 7 is a circuit diagram of an example of the second signal converter of FIG. 2.

As shown in FIG. 7, the second signal converter of FIG. 2 is controlled by the transmission control signal to convert the logic level signal transmitted from the first logic level signal converter 310 into a telephone signal to convert the telephone line into a telephone line. And a second logic level signal converter 420 for converting the telephone signal input from the telephone line into a logic level signal.

The telephone signal conversion unit 410 is composed of an inverter 411.

The second logic level signal converter 420 includes an inverter 421.

The second signal converter of FIG. 2 having the structure as described above will be described in detail as follows.

It converts a signal on a telephone line (Phone +, Phone-) to a TTL level or converts a TTL level signal to a signal on a switching line. The TTL level signal on the left side of FIG. 7 passes through the line driver of the inverter 411 to be transmitted on the telephone line, and the signal input from the telephone lines Phone + and Phone- passes through the receiver of the inverter 411 and then TTL. The level signal is changed. The 60Ω resistors connected to Phone + and Phone- are used for impedance matching to avoid signal reflections on the phone line.

8A and 8B are characteristic diagrams of control signals inputted to the telephone signal converter, and FIGS. 9A and 9B are characteristic diagrams of control signals inputted to the LAN signal converter, and FIG. 10A is transmitted through the Tx terminal of the LAN card. 10B is a characteristic diagram of a link test pulse transmitted through a Tx end of a LAN card, FIG. 11A is a characteristic diagram of data received through an Rx end of a LAN card, and FIG. 11B is an Rx of a LAN card. 12A and 12B are output characteristic diagrams transmitted from the matching adapter of the present invention to the telephone line.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

As described above, the matching adapter for the implementation of the Ethernet LAN of the present invention can use an existing home telephone line as it is, and use existing low-cost Ethernet t LAN hardware as it is, and economically and quickly establish a home LAN. In addition, it is possible to connect and communicate with the information devices in the home, and in particular, it is possible to easily build the home network necessary for the next generation of high-speed information and communication network era, which can greatly contribute to advance the information society.

Claims (14)

A matching adapter for connecting a signal between a local area network circuit and a telephone line, Transmission control signal generation means for receiving a LAN signal from the LAN circuit and providing a transmission control signal; Reception control signal generation means for receiving a telephone signal from the telephone line and providing a reception control signal; First transmission signal conversion means controlled by the transmission control signal to convert the LAN signal into a logic level signal; Second transmission signal conversion means, controlled by the transmission control signal, for converting the logic level signal transmitted from the first signal conversion means and transmitting the converted logic level signal to the telephone line; First reception signal conversion means controlled by the reception control signal and converting a telephone signal from the telephone line into a logic level signal; And Second reception signal conversion means controlled by the reception control signal and converting the logic level signal transmitted from the first reception signal conversion means into the LAN signal and transmitting the signal to the LAN card; Matching adapter for Ethernet LAN implementation, including. The method of claim 1, The transmission control signal generating means, Link test pulse detection means for detecting and transmitting a link test pulse transmitted from the LAN circuit; Data detecting means for detecting and transmitting a data signal transmitted from said LAN circuit; A first transmission control signal generator which receives the output signal of the link test pulse detection means and the output signal of the data detection means and provides the transmission control signal for controlling the first transmission signal conversion means; And A second transmission control signal generator for receiving the output signal of the first transmission control signal generator and providing the transmission control signal for controlling the second transmission signal conversion means; Matching adapter for Ethernet ALN implementation made, including. The method of claim 2, The link test pulse detection means, Matching adapter for Ethernet LAN implementation, including retrigger multivibrator. The method of claim 2, The data detection means, Matching adapter for Ethernet LAN implementation, including retrigger multivibrator. The method of claim 2, The first transmission control signal generator, And a means for negating and logically combining the output signal of the link test pulse detection means and the output signal of the data detection means. The method of claim 2, The second transmission control signal generator, And a means for inverting an output signal of the first transmission control signal generator. The method of claim 1, The receiving signal generating means, Link test pulse detection means for detecting and transmitting a link test pulse transmitted from the telephone line; Data detecting means for detecting and transmitting a data signal transmitted from said telephone line; Logic level signal detecting means for detecting a logic level signal in the signal transmitted from the telephone line; A first reception for receiving an output signal of the link test pulse detection means, an output signal of the data detection means, and an output signal of the logic level signal detection means and providing a reception control signal for controlling the second reception signal conversion means; A control signal generator; A second reception control signal generator which receives an output signal of the first reception control signal generator and provides a reception control signal for controlling the first reception signal conversion means; Reverse propagation preventing means for preventing the data signal from being reversely transmitted during transmission; And Enable signal blocking prevention means for outputting a signal for preventing an enable signal from being blocked to said logic level signal detecting means; Matching adapter for Ethernet LAN implementation, including. The method of claim 7, wherein The link test pulse detection means, Retrigger Multivibrator Matching adapter for Ethernet LAN implementation, including. The method of claim 7, wherein The data detection means, Retrigger Multivibrator Matching adapter for Ethernet LAN implementation, including. Was in paragraph 7, The logic level signal detecting means Retrigger Multivibrator Matching adapter for Ethernet LAN implementation, including. The method of claim 7, wherein The first reception control signal generator, Means for negating and logically outputting the output signal of the link test pulse detecting means and the output signal of the data detecting means; Means for ORing the output signal of the data detecting means and the output signal of the logic level signal detecting means; And Means for logically multiplying the output signal of the logical sum means with the output signal of the reverse propagation preventing means; Matching adapter for Ethernet LAN implementation, including. The method of claim 7, wherein The second reception control signal generator, Means for inverting an output signal of the first reception control signal generator Matching adapter for Ethernet LAN implementation, including. Was in paragraph 7, The reverse transfer prevention means, 3-state buffer Matching adapter for Ethernet LAN implementation, including. The method of claim 7, wherein The enable signal blocking prevention means, 3-state buffer Matching adapter for Ethernet LAN implementation, including.

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