CN106301002A - A kind of variable-frequency variable-voltage becomes mode block and starts method - Google Patents
A kind of variable-frequency variable-voltage becomes mode block and starts method Download PDFInfo
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- CN106301002A CN106301002A CN201610875559.8A CN201610875559A CN106301002A CN 106301002 A CN106301002 A CN 106301002A CN 201610875559 A CN201610875559 A CN 201610875559A CN 106301002 A CN106301002 A CN 106301002A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M5/00—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases
- H02M5/40—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into dc
- H02M5/42—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into dc by static converters
- H02M5/44—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into dc by static converters using discharge tubes or semiconductor devices to convert the intermediate dc into ac
- H02M5/453—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into dc by static converters using discharge tubes or semiconductor devices to convert the intermediate dc into ac using devices of a triode or transistor type requiring continuous application of a control signal
- H02M5/458—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into dc by static converters using discharge tubes or semiconductor devices to convert the intermediate dc into ac using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M5/4585—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into dc by static converters using discharge tubes or semiconductor devices to convert the intermediate dc into ac using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only having a rectifier with controlled elements
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/36—Means for starting or stopping converters
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
- Rectifiers (AREA)
Abstract
The invention discloses a kind of variable-frequency variable-voltage and become mode block and startup method thereof, including: rectification unit, it is used for receiving alternating current, and converts alternating current to unidirectional current and export;Inversion unit, is provided with variable target frequency value, target voltage values or target waveform, and inversion unit receives unidirectional current, and unidirectional current is converted into the target alternating current consistent with target frequency value, target voltage values or target waveform;Filter unit, is connected with inversion unit to receive target alternating current, for being filtered exporting to the cloth that is energized to target alternating current.Advantages of the present invention and having the beneficial effects that: user can regulate target frequency value, target voltage values or target waveform according to demand, energising cloth is made to obtain different voltage, frequency or the alternating current of waveform, to form varying strength, frequency or the electric field of scope or magnetic field, for satisfied different treatment stages and the demand for the treatment of intensity, and reduce the toleration of patient, improve therapeutic effect, improve the Discussing Convenience that user uses.
Description
Technical field
The present invention relates to field of medical device, become mode block particularly to a kind of variable-frequency variable-voltage and start method.
Background technology
In naturopathy field, electric field therapy equipment is a kind of therapeutic equipments the most prevailing.It is dependent on
Around energising cloth, produce high pressure low-frequency alternating electric field and magnetic field, and indirectly acted on by high pressure low-frequency alternating electric field and magnetic field
With human body, in its human body, produce charge inducing, reach the purpose of health therapy.
The most electric field therapy equipments used in the market, are all to utilize voltage for AC220V, and frequency is
The alternating current generation high-voltage alternating electric field of 50Hz acts on human body and carries out health therapy, the high-voltage alternating therefore produced when treatment
The frequency of electric field and waveform are all changeless.Long-term therapeutic process finds, if use fixed frequency solid always
The high-voltage alternating electric field of standing wave shape treats some disease, and in use for some time, self can produce certain tolerance to patient
Property, curative effect is substantially reduced.
Summary of the invention
In order to solve the problems referred to above, the present invention provides a kind of variable-frequency variable-voltage to become mode block and startup method thereof.This technical side
Case is provided with variable target frequency value, target voltage values or target waveform, and user can regulate target frequency value, mesh according to demand
Mark magnitude of voltage or target waveform, and by rectification unit and the cooperation of inversion unit, make energising cloth obtain frequency, voltage or waveform
The target alternating current consistent with target frequency value, target voltage values or target waveform, and then make energising cloth obtain different voltage, frequently
Rate or the alternating current of waveform, to form electric field or the magnetic field of varying strength, frequency or scope, for meet different treatment stages and
The demand for the treatment of intensity, and reduce the toleration of patient, and then greatly improve therapeutic effect;Meanwhile, become by utilization
Frequently transformation become mode block startup method so that user start variable-frequency variable-voltage become mode block time, energising cloth can obtain frequency,
Voltage or the waveform specified alternating current consistent with rated frequency value, load voltage value or specified waveform, improve what user used
Discussing Convenience.
A kind of variable-frequency variable-voltage in the present invention becomes mode block, is connected with energising cloth, provides for described energising cloth and has difference
The alternating current of frequency, voltage or waveform, variable-frequency variable-voltage becomes mode block and includes:
Rectification unit, is used for receiving alternating current, and converts alternating current to unidirectional current and export, and described rectification unit has
For exporting the positive pole circuit of positive voltage and for exporting the negative pole circuit of negative voltage or no-voltage;
Inversion unit, is provided with variable target frequency value, target voltage values or target waveform, and with described positive pole circuit
With negative pole connection, described inversion unit receives described unidirectional current, and described unidirectional current is converted into frequency, voltage or waveform
The target alternating current consistent with described target frequency value, target voltage values or target waveform;
Filter unit, is connected with described inversion unit to receive described target alternating current, for described target alternating current
It is filtered output to described energising cloth.
In such scheme, described rectification unit includes fairing and protection device,
Described fairing includes that interconnective input P2 and commutator D5, described input P2 are used for receiving exchange
Electricity, and the alternating current received is converted into unidirectional current to commutator D5, described commutator D5 by alternating current output;Described input
The live wire of end P2 is connected with 03 contact of described commutator D5, the zero line of described input P2 and 02 contact of described commutator D5
Connect, 04 contact of described commutator D5 and described positive pole connection, 01 contact of described commutator D5 and described negative line
Road connects;
Described protection device includes resistance R15, relay K 1 and diode D1;One end of described resistance R15 is whole with described
Stream device D15 cathode output end connect, one end of described resistance R15 is connected with a contact of described relay K 1, described in continue
Another contact of electrical equipment K1 is connected with described cathode output end;The two ends of described diode respectively with the line of described relay K 1
The two ends of circle connect.
In such scheme, described inversion unit includes:
Control circuit, is provided with variable described target frequency value, target voltage values or target waveform, and according to described mesh
Mark frequency values, target voltage values or target waveform output control signal;Described control circuit is also connected with described protection device;
Performing circuit, be connected with described control circuit to receive described control signal, described execution circuit is also whole with described
Stream device connects to receive unidirectional current, and unidirectional current is converted into target alternating current according to described control signal by described execution circuit,
Described execution circuit includes the first inverter circuit, the second inverter circuit, the 3rd inverter circuit and the 4th inverter circuit.
In such scheme, described control circuit includes chip U1, U2, U3, U4 and U5;
16 feet of described chip U2 positive pole with the coil of described relay K 1 and described diode D1 respectively is connected, described
17 feet of chip U2 are connected with described second inverter circuit and the 4th inverter circuit respectively, 18 feet of described chip U2 respectively with institute
State the first inverter circuit and the 3rd inverter circuit connects;
08 foot of described chip U4 is connected with 03 foot of described chip U2, and 03 foot of described chip U4 is with described chip U2's
01 foot connects, and 06 foot of described chip U4 is connected with 02 foot of described chip U2;
04 foot of described chip U1 is connected with 02 foot of described chip U4, and 06 foot of described chip U1 is with described chip U4's
04 foot connects;
01 foot of described chip U5 is connected with 02 foot of described chip U1,12 feet of described chip U5 and 01 foot of chip U4
Connecting, 22 feet of described chip U5 are connected with 10 feet of described chip U4,26 feet of described chip U5 and the 05 of described chip U4
03 foot of foot and described chip U1 connects, described chip 28 foot respectively with 10 feet of described chip U2, described diode D1 negative
The coil of pole and described relay K 1 connects;
05 foot of described chip U3 is connected with 05 foot of described chip U5,06 foot of described chip U3 and 07 foot respectively with institute
08 foot stating chip U5 connects, and 08 foot of described chip U3 is connected with 04 foot of described chip U5, and 04 foot of described chip U3 is used
In receiving external level.
In such scheme, described control circuit also include resistance R1, R2, R3, R4, R5, R6, R9, R20, R21, R22,
R23, electric capacity C1, C2, C3, C4, C5, C6, C7, C19, C20, C21, C24, C29, C30, LED 1, diode D2,
D3, D4, induction coil L9, L10, line row X1, X3, X7, P6, crystal oscillator Y1;
03 foot of described chip U3 respectively with positive pole, one end of resistance R5, one end of resistance R3 and the electricity of diode D4
One end of resistance R1 connects, and the negative pole of described diode D4 is connected with negative pole, the negative pole of diode D3 of described diode D2, described
The plus earth of diode D2;One end ground connection of 03 foot of described resistance R5 the most described chip U3, described resistance R1 institute dorsad
02 contact of one end and the described line row X3 stating 03 foot of chip U3 is connected, described line arrange 01 contact of X3 respectively with described two poles
The negative pole of pipe D1, the coil of relay K 1,14 feet of described chip U1,14 feet of described chip U4,28 feet of described chip U5,
Described line row 01 contact of P6, described coil L10, resistance R9, described electric capacity C1, C2, C3, C4, C6, C7, C19 connect, described
One end ground connection of 01 contact of electric capacity C1, C2, C3, C4, C6, C7 the most described line row X3, the 04 foot ground connection of described line row P6;Institute
State 02 foot of chip U3 respectively with one end of 03 foot of the described the most described chip of resistance R3, one end of resistance R2, described two poles
The positive pole of pipe D3 connects, and 01 foot of described chip U3 is connected with described resistance R4, and described chip U3 is also with described resistance R4 dorsad
One end of 01 foot of described chip U3 connects;One end of 02 foot of described resistance R2 the most described chip U3 is with described line row X3's
03 contact connects, 04 contact ground of described line row;
02 contact 05 foot with 05 foot of described chip U3 and described chip U5 respectively of described line row P6 is connected, described line
03 contact 04 foot with 08 foot of described chip U3 and described chip U5 respectively of row P6 is connected;Described coil L10 is described dorsad
01 contact of one end and the described line row X7 of 01 contact of line row X3 is connected, described line arrange 01 contact of X7 the most respectively with described line
One end of circle L9 and described electric capacity C24, C29 connects, a termination of 01 contact of described electric capacity C24, C29 the most described line row X7
Ground, described line row X7 03 contact ground, described coil L9 the most described line row X7 01 contact one end respectively with described liter
04 contact of depressor U10,04 contact of U11,04 contact of U12,04 contact of U13, described resistance R20, R21, R22, R23,
And described electric capacity C5, C30 connect, described resistance R20, R21, R22, R23 the most respectively with 02 foot, the institute of described chip U6
State 02 foot of 02 foot U8 of chip U7,02 foot of U9 connects;
One end of 01 contact of described resistance R9 the most described line row X3 is connected with the positive pole of described LED 1,
The minus earth of described LED 1;One end of 01 contact of described electric capacity C19 the most described line row X3 and described core
03 foot of sheet U5 connects, and one end of 01 contact of described electric capacity C19 the most described line row X3 is also by described resistance R6 ground connection;
01 foot of described chip U1 is connected with 01 contact of described line row X1,03 contact ground of described line row X1;Described
The two ends of crystal oscillator Y1 are connected with 06 foot and 07 foot of described chip U5 respectively, and 06 foot of described chip U5 passes through described electricity
Holding C20 ground connection, 07 foot of described chip U5 passes through described electric capacity C21 ground connection.
In such scheme, described performance element also includes ac output end TP1, TP2, TP3, electric capacity C5, C30;
Described first inverter circuit includes chip U6, diode D6, D7, D8, D9, field effect transistor Q1, resistance R20, R33,
R37, electric capacity C8, C13, C31, booster U10;The positive pole of described diode D6 respectively with drain electrode and the institute of described field effect transistor Q1
Stating outfan TP3 to connect, the negative pole of described diode D6 and described positive pole connection, the negative pole of described diode D7 is with described
The source electrode of field effect transistor Q1 connects, and the positive pole of described diode D7 is respectively with the negative pole of described positive pole circuit and diode D6 even
Connect;Described diode D8, D9 are connected in parallel with described resistance R33 respectively, the negative pole of described diode D8 and described diode D9
Negative pole connect;
03 foot of described chip U6 is connected with 18 feet of described chip U2;05 foot of described chip U6 respectively with described boosting
02 contact of device U10, the positive pole of described diode D9, resistance R33, the source electrode of field effect transistor Q1, electric capacity C8, C13, C31, and
The negative pole of described diode D7 connects;06 foot of described chip U6 and 07 foot respectively by the positive pole of resistance R37 and diode D8,
The grid of resistance R33 and field effect transistor Q1 connects;08 foot of described chip U6 is connected with 01 contact of described booster U10,
One end with 05 foot of described electric capacity C8, C13, C31 the most described chip U6 respectively, 01 contact of described booster U10 is connected,
03 contact ground of described booster U10;
Described second inverter circuit includes chip U7, diode D10, D11, D12, D13, field effect transistor Q2, resistance R20,
R34, R38, electric capacity C22, C23, C32, booster U11;The positive pole of described diode D10 respectively with the leakage of described field effect transistor Q2
Pole and outfan TP2 connect, the negative pole of described diode D10 respectively with positive pole, described field effect transistor Q1 of described diode D6
Drain electrode and described outfan TP3 connect, the negative pole of described diode D11 is connected with the source electrode of described field effect transistor Q2, institute
State the positive pole of diode D11 respectively with the positive pole of described diode D6, the drain electrode of described field effect transistor Q1, diode D10 negative
Pole and described outfan TP3 connect;Described diode D12, D13 are connected in parallel with described resistance R34 respectively, described diode
The negative pole of D12 is connected with the negative pole of described diode D13;
03 foot of described chip U7 is connected with 17 feet of described chip U2;05 foot of described chip U7 respectively with described boosting
02 contact of device U11, the positive pole of described diode D13, resistance R34, the source electrode of field effect transistor Q2, electric capacity C22, C23, C32, with
And the negative pole of described diode D11 connects;06 foot of described chip U7 and 07 foot are respectively by resistance R38 and diode D12's
The grid of positive pole, resistance R34 and field effect transistor Q2 connects;08 foot of described chip U7 and 01 contact of described booster U11
Connect, 01 contact of described booster U11 respectively with one end of 05 foot of described electric capacity C22, C23, C32 the most described chip U7
Connect, 03 contact ground of described booster U11;
Described 3rd inverter circuit includes chip U8, diode D14, D15, D16, D17, field effect transistor Q3, resistance R20,
R35, R39, electric capacity C25;The positive pole of described diode D14 is connected with described outfan TP1, the negative pole of described diode D14 with
The drain electrode of described field effect transistor Q3 connects, the positive pole of described diode D15 and the source electrode of described field effect transistor Q3, outfan TP2,
The drain electrode of the positive pole of diode D10 and field effect transistor Q2 connects, the negative pole of described diode D15 respectively with described diode
Positive pole and described 4th inverter circuit of D14 connect;Described diode D16, D17 are connected in parallel with described resistance R35 respectively, institute
The negative pole of the negative pole and described diode D17 of stating diode D16 is connected,;
03 foot of described chip U8 is connected with 18 feet of described chip U2;05 foot of described chip U8 respectively with described boosting
02 contact of device U11, the positive pole of described diode D17, resistance R35, the source electrode of field effect transistor Q3, electric capacity C22, C23, C32, with
And the negative pole of described diode D15 connects;06 foot of described chip U8 and 07 foot are respectively by resistance R39 and diode D16's
The grid of positive pole, resistance R35 and field effect transistor Q3 connects;08 foot of described chip U8 passes through 08 foot and the institute of described chip U7
01 contact stating booster U11 connects, and the two ends of described electric capacity C25 are connected with 05 foot and 08 foot of described chip U8 respectively;
Described 4th inverter circuit includes chip U9, diode D18, D19, D20, D21, field effect transistor Q4, resistance R20,
R36, R40, electric capacity C26, C27, C33, booster U12;The negative pole of described diode D18 connects with the drain electrode of described field effect transistor Q4
Connect, the positive pole of described diode D18 respectively with described positive pole connection, the positive pole of described diode D19 respectively with described field
The source electrode of effect pipe Q4, the positive pole of diode D14, the negative pole of diode D15 and outfan TP1 connect, described diode D19
The positive pole of negative pole and described diode D18 and described positive pole connection;Described diode D20, D21 respectively with described resistance
R36 is connected in parallel, and the negative pole of described diode D20 is connected with the negative pole of described diode D21;
03 foot of described chip U9 is connected with 18 feet of described chip U2;05 foot of described chip U9 respectively with described boosting
02 contact of device U12, the positive pole of described diode D21, resistance R36, the source electrode of field effect transistor Q4, electric capacity C26, C27, C33, with
And the negative pole of described diode D19 connects;06 foot of described chip U9 and 07 foot are respectively by resistance R40 and diode D20's
The grid of positive pole, resistance R36 and field effect transistor Q4 connects;08 foot of described chip U9 and 01 contact of described booster U12
Connect, 01 contact of described booster U12 respectively with one end of 05 foot of described electric capacity C26, C27, C33 the most described chip U9
Connect, 03 contact ground of described booster U12.
In such scheme, described fairing also includes fuse F2, electric capacity C28, resistance T1 and resistance T2, fuse F2
Be connected on described negative pole circuit, the two ends of described electric capacity C28 respectively with described positive pole circuit and negative pole connection, described electricity
Resistance T1 two ends respectively with described positive pole circuit and negative pole connection, one end of described resistance T1 is also with described fuse F2's
One end connects;The two ends of described resistance T2 respectively with described positive pole circuit and negative pole connection, one end of described resistance T2 is also
It is connected with one end of described fuse F2 the most described resistance T1.
In such scheme, described chip U1 is hex inverter, and the model of described hex inverter is 74F04, described chip U2
For TDG2381 chip, described chip U3 is communication 485 chips, and described chip U4 is two inputs four and door chips, described two defeated
The model entering end four and door chip is 74F08, and described chip U5 is CPU, and described chip U6, U7, U8, U9 are respectively photoelectric coupling
Device, the model of described photoelectrical coupler is TLP351.
In such scheme, described filter unit includes coil L1, L2, L3, L4, L5, L6, L7, L8, electric capacity C9, C10,
C11, C12, C13, C14, C15, C16, C17, C18, resistance R16, R17, R18, R19, outfan P5;
Described coil L1, L2, L3, L4 are sequentially connected in series, and one end of described coil L1 the most described coil L2 is with described
Outfan TP1 connects, and one end of described coil L4 the most described coil L3 is connected with 01 contact of described outfan P5;Described line
Circle L5, L6, L7, L8 are sequentially connected in series, and one end of described coil L5 the most described coil L6 is connected with described outfan TP3,
One end of described coil L8 the most described coil L7 is connected with 03 contact of described outfan P5;
One end of described electric capacity C9 is connected between described coil L1 and L2, and the other end is connected with described outfan TP2;Institute
The one end stating electric capacity C10 is connected between described coil L2 and L3, and the other end is connected with described outfan TP2;Described electric capacity C11
One end be connected between described coil L3 and L4, the other end is connected with described outfan TP2;One end of described electric capacity C12 is even
Being connected between described coil L4 and outfan P5, the other end is connected with described outfan TP2;One end of described electric capacity C15 connects
Between described coil L5 and L6, the other end is connected with described outfan TP2;One end of described electric capacity C16 is connected to described line
Between circle L6 and L7, the other end is connected with described outfan TP2;One end of described electric capacity C17 is connected to described coil L7 and L8
Between, the other end is connected with described outfan TP2;One end of described electric capacity C18 be connected to described coil L8 and outfan P5 it
Between, the other end is connected with described outfan TP2;One end of described electric capacity C14 be connected to described coil L4 and described line row L5 it
Between, the other end is connected between described coil L8 and described outfan P5;
Described resistance R16 is connected between described coil L2 and L3, described resistance R18 be connected to described coil L6 and L7 it
Between, described resistance R17 is connected in parallel with described resistance R16, and described resistance R19 is connected in parallel with described resistance R18;Described output
End P5 is connected with described energising cloth.
A kind of variable-frequency variable-voltage becomes the startup method of mode block, is applied to a kind of frequency conversion according to any one of such scheme and becomes
Buckling mode block, comprises the following steps:
The most described chip U5 internal reservoir has rated frequency signal, nominal voltage signal or specified waveshape signal;
The most described chip U5 also has button and recognition by pressing keys function, and described chip U5 passes through recognition by pressing keys identification of function
Whether described button is pressed;If described button is pressed more than 3s, described chip U5 and is directly entered variable-frequency variable-voltage change wave mode;
S3., under variable-frequency variable-voltage becomes wave mode, described chip U5 sends described rated frequency to described chip U3 frequency conversion plate
Signal, nominal voltage signal or specified waveshape signal, described chip U3 is by the described rated frequency signal received, rated voltage
Signal or specified waveshape signal, successively through described resistance R4, resistance R2, line row X3, coil L10, line row X7 and coil L9, respectively
It is sent to described booster U10, U11, U12;
S4. described rated frequency signal, nominal voltage signal or the specified waveform that booster U10, U11, U12 will receive
After signal boosting, it is respectively sent to described chip U6, U7, U8, U9, after described chip U6, U7, U8, U9 are respectively according to boosting
Described rated frequency signal, nominal voltage signal or specified waveshape signal control described field effect transistor Q1, the unlatching of Q2, Q3, Q4
Time or open frequency, make described outfan P5 output have the specified alternating current of rated frequency, rated voltage or specified waveform;
The most described chip U5 controls described relay K 1 also by chip U1, U2, U4 and opens, and makes commutator D5 export
Unidirectional current short-circuit resistance R15, enters directly into described positive pole circuit, and then makes variable-frequency variable-voltage become mode block soft start;
If the most described button is not pressed, described chip U5 exits identification work and terminates.
Advantages of the present invention and having the beneficial effects that: the present invention provides a kind of variable-frequency variable-voltage to become mode block and startup side thereof
Method, user can regulate target frequency value, target voltage values or target waveform according to demand, make energising cloth obtain frequency, voltage or
The target alternating current that waveform is consistent with target frequency value, target voltage values or target waveform, and then make energising cloth obtain different electricity
Pressure, frequency or the alternating current of waveform, to form electric field or the magnetic field of varying strength, frequency or scope, for meeting difference treatment
Stage and the demand for the treatment of intensity, and reduce the toleration of patient, and then greatly improve therapeutic effect;Meanwhile, frequency conversion
Transformation change mode block is when starting variable-frequency variable-voltage and becoming mode block, and energising cloth can obtain frequency, voltage or waveform and rated frequency
The specified alternating current that value, load voltage value or specified waveform are consistent, improves the Discussing Convenience that user uses.
Accompanying drawing explanation
In order to be illustrated more clearly that the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
In having technology to describe, the required accompanying drawing used is briefly described, it should be apparent that, the accompanying drawing in describing below is only this
Some embodiments of invention, for those of ordinary skill in the art, on the premise of not paying creative work, also may be used
To obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the circuit diagram that a kind of variable-frequency variable-voltage of the present invention becomes mode block;
Fig. 2 is the flow chart that a kind of variable-frequency variable-voltage of the present invention becomes the startup method of mode block.
In figure: 1, rectification unit 2, inversion unit 3, filter unit
11, fairing 12, protection device 13, positive pole circuit 14, negative pole circuit
21, control circuit 22, execution circuit the 221, first inverter circuit
222, the second inverter circuit the 223, the 3rd inverter circuit the 224, the 4th inverter circuit
Detailed description of the invention
Below in conjunction with the accompanying drawings and embodiment, the detailed description of the invention of the present invention is further described.Following example are only
For technical scheme is clearly described, and can not limit the scope of the invention with this.
As it is shown in figure 1, the present invention is a kind of variable-frequency variable-voltage becomes mode block, it is connected with energising cloth (not shown), is logical
Electricity cloth provides the alternating current with different frequency, voltage or waveforms, and variable-frequency variable-voltage becomes mode block and includes:
Rectification unit 1, is used for receiving alternating current, and converts alternating current to unidirectional current and export, and rectification unit 1 has use
In the positive pole circuit 13 of output positive voltage with for exporting the negative pole circuit 14 of negative voltage or no-voltage;
Inversion unit 2, is provided with variable target frequency value, target voltage values or target waveform, and with positive pole circuit 13
Connecting with negative pole circuit 14, inversion unit 2 receives unidirectional current, and unidirectional current is converted into frequency, voltage or waveform and target frequency
The target alternating current that rate value, target voltage values or target waveform are consistent;
Filter unit 3, is connected to receive target alternating current with inversion unit 2, for being filtered defeated to target alternating current
Go out to energising cloth.
Concrete, rectification unit 1 includes fairing 11 and protection device 12,
Fairing 11 includes that interconnective input P2 and commutator D5, input P2 are used for receiving alternating current, and
The alternating current received is converted into unidirectional current to commutator D5, commutator D5 by alternating current output;The live wire of input P2 with
Commutator D5 03 contact connect, the zero line of input P2 is connected with 02 contact of commutator D5,04 contact of commutator D5 and
Positive pole circuit 13 connects, and 01 contact of commutator D5 is connected with negative pole circuit 14;
Protection device 12 includes resistance R15, relay K 1 and diode D1;One end of resistance R15 is with commutator D15 just
Pole outfan connects, and one end of resistance R15 is connected with a contact of relay K 1, another contact of relay K 1 and positive pole
Outfan connects;Two ends with the coil of relay K 1 respectively, the two ends of diode are connected.
Preferably, inversion unit 2 includes:
Control circuit 21, is provided with variable target frequency value, target voltage values or target waveform, and according to target frequency
Value, target voltage values or target waveform output control signal;Control circuit 21 is also connected with protection device 12;
Perform circuit 22, be connected to receive control signal with control circuit 21, perform circuit 22 also with fairing 11 even
Receive unidirectional current, perform circuit 22, according to control signal, unidirectional current is converted into target alternating current, perform circuit 22 and include
First inverter circuit the 221, second inverter circuit the 222, the 3rd inverter circuit 223 and the 4th inverter circuit 224.
Concrete, control circuit 21 includes chip U1, U2, U3, U4 and U5;
16 feet of chip U2 are connected with the coil of relay K 1 and the positive pole of diode D1 respectively, and 17 feet of chip U2 are respectively
Be connected with the second inverter circuit 222 and the 4th inverter circuit 224,18 feet of chip U2 respectively with the first inverter circuit 221 and
Three inverter circuits 223 connect;
08 foot of chip U4 is connected with 03 foot of chip U2, and 03 foot of chip U4 is connected with 01 foot of chip U2, chip U4
06 foot be connected with 02 foot of chip U2;
04 foot of chip U1 is connected with 02 foot of chip U4, and 06 foot of chip U1 is connected with 04 foot of chip U4;
01 foot of chip U5 is connected with 02 foot of chip U1, and 12 feet of chip U5 are connected with 01 foot of chip U4, chip U5
22 feet be connected with 10 feet of chip U4,26 feet of chip U5 are connected with 03 foot of 05 foot of chip U4 and chip U1, chip 28
Foot coil with 10 feet, the negative pole of diode D1 and the relay K 1 of chip U2 respectively is connected;
05 foot of chip U3 is connected with 05 foot of chip U5, and 06 foot of chip U3 and 07 foot are respectively with 08 foot of chip U5 even
Connecing, 08 foot of chip U3 is connected with 04 foot of chip U5, and 04 foot of chip U3 is used for receiving external level.
Further, control circuit 21 also includes resistance R1, R2, R3, R4, R5, R6, R9, R20, R21, R22, R23, electricity
Appearance C1, C2, C3, C4, C5, C6, C7, C19, C20, C21, C24, C29, C30, LED 1, diode D2, D3, D4,
Induction coil L9, L10, line row X1, X3, X7, P6, crystal oscillator Y1;
03 foot of chip U3 respectively with positive pole, one end of resistance R5, one end of resistance R3 and the resistance R1 of diode D4
One end connect, the negative pole of diode D4 is connected with negative pole, the negative pole of diode D3 of diode D2, and the positive pole of diode D2 connects
Ground;One end ground connection of 03 foot of resistance R5 chip U3 dorsad, one end of 03 foot of resistance R1 chip U3 dorsad and the 02 of line row X3
Contact connects, 01 contact of line row X3 respectively with the negative pole of diode D1, the coil of relay K 1,14 feet of chip U1, chip
14 feet of U4,28 feet of chip U5, line row 01 contact of P6, coil L10, resistance R9, electric capacity C1, C2, C3, C4, C6, C7, C19
Connect, one end ground connection of 01 contact of electric capacity C1, C2, C3, C4, C6, C7 line dorsad row X3, the 04 foot ground connection of line row P6;Chip
02 foot of U3 is connected with one end of 03 foot of resistance R3 chip dorsad, one end of resistance R2, the positive pole of diode D3 respectively, chip
01 foot of U3 is connected with resistance R4, and chip U3 also one end with 01 foot of resistance R4 chip U3 dorsad is connected;Resistance R2 core dorsad
One end of 02 foot of sheet U3 is connected with 03 contact of line row X3,04 contact ground of line row;
02 contact of line row P6 is connected with 05 foot of chip U3 and 05 foot of chip U5 respectively, and 03 contact of line row P6 is respectively
It is connected with 08 foot of chip U3 and 04 foot of chip U5;One end of 01 contact of coil L10 line dorsad row X3 and the 01 of line row X7
Contact connects, and one end with coil L9 and electric capacity C24, C29 the most respectively, 01 contact of line row X7 is connected, and electric capacity C24, C29 are dorsad
One end ground connection of 01 contact of line row X7,03 contact ground of line row X7, one end of 01 contact of coil L9 line dorsad row X7 is divided
Not and 04 contact of booster U10,04 contact of U11,04 contact of U12,04 contact of U13, resistance R20, R21, R22,
R23, and electric capacity C5, C30 connect, resistance R20, R21, R22, R23 the most respectively with 02 foot of chip U6, the 02 of chip U7
02 foot of foot U8,02 foot of U9 connect;
One end of 01 contact of resistance R9 line dorsad row X3 is connected with the positive pole of LED 1, light emitting diode
The minus earth of LED1;One end of 01 contact of electric capacity C19 line dorsad row X3 is connected with 03 foot of chip U5, and electric capacity C19 is dorsad
One end of 01 contact of line row X3 is also by resistance R6 ground connection;
01 foot of chip U1 is connected with 01 contact of line row X1,03 contact ground of line row X1;The two of crystal oscillator Y1
End is connected with 06 foot and 07 foot of chip U5 respectively, and 06 foot of chip U5 passes through electric capacity C20 ground connection, and 07 foot of chip U5 is by electricity
Hold C21 ground connection.
Further, performance element also includes ac output end TP1, TP2, TP3, electric capacity C5, C30;
First inverter circuit 221 includes chip U6, diode D6, D7, D8, D9, field effect transistor Q1, resistance R20, R33,
R37, electric capacity C8, C13, C31, booster U10;The positive pole of diode D6 respectively with drain electrode and the outfan TP3 of field effect transistor Q1
Connecting, the negative pole of diode D6 is connected with positive pole circuit 13, and the negative pole of diode D7 is connected with the source electrode of field effect transistor Q1, two poles
The positive pole of pipe D7 negative pole with positive pole circuit 13 and diode D6 respectively is connected;Diode D8, D9 are in parallel with resistance R33 respectively to be connected
Connecing, the negative pole of diode D8 is connected with the negative pole of diode D9;
03 foot of chip U6 is connected with 18 feet of chip U2;05 foot of chip U6 respectively with 02 contact of booster U10, two
The negative pole of the positive pole of pole pipe D9, resistance R33, the source electrode of field effect transistor Q1, electric capacity C8, C13, C31, and diode D7 connects;
06 foot of chip U6 and 07 foot are respectively by resistance R37 and the positive pole of diode D8, resistance R33 and the grid of field effect transistor Q1
Connect;08 foot of chip U6 is connected with 01 contact of booster U10,01 contact of booster U10 respectively with electric capacity C8, C13,
One end of 05 foot of C31 chip U6 dorsad connects, 03 contact ground of booster U10;
Second inverter circuit 222 includes chip U7, diode D10, D11, D12, D13, field effect transistor Q2, resistance R20,
R34, R38, electric capacity C22, C23, C32, booster U11;The positive pole of diode D10 respectively with drain electrode and the output of field effect transistor Q2
End TP2 connects, and the negative pole of diode D10 is respectively with the positive pole of diode D6, the drain electrode of field effect transistor Q1 and outfan TP3 even
Connecing, the negative pole of diode D11 is connected with the source electrode of field effect transistor Q2, the positive pole of diode D11 respectively with the positive pole of diode D6,
The drain electrode of field effect transistor Q1, the negative pole of diode D10 and outfan TP3 connect;Diode D12, D13 respectively with resistance R34
Being connected in parallel, the negative pole of diode D12 is connected with the negative pole of diode D13;
03 foot of chip U7 is connected with 17 feet of chip U2;05 foot of chip U7 respectively with 02 contact of booster U11, two
The negative pole of the positive pole of pole pipe D13, resistance R34, the source electrode of field effect transistor Q2, electric capacity C22, C23, C32, and diode D11 is even
Connect;06 foot of chip U7 and 07 foot are respectively by resistance R38 and the positive pole of diode D12, resistance R34 and field effect transistor Q2
Grid connects;08 foot of chip U7 is connected with 01 contact of booster U11,01 contact of booster U11 respectively with electric capacity C22,
One end of 05 foot of C23, C32 chip U7 dorsad connects, 03 contact ground of booster U11;
3rd inverter circuit 223 includes chip U8, diode D14, D15, D16, D17, field effect transistor Q3, resistance R20,
R35, R39, electric capacity C25;The positive pole of diode D14 is connected with outfan TP1, the negative pole of diode D14 and field effect transistor Q3
Drain electrode connects, the positive pole of diode D15 and the source electrode of field effect transistor Q3, outfan TP2, the positive pole of diode D10 and field effect
Should pipe Q2 drain electrode connect, the negative pole of diode D15 is connected with positive pole and the 4th inverter circuit 224 of diode D14 respectively;Two
Pole pipe D16, D17 are connected in parallel with resistance R35 respectively, and the negative pole of diode D16 is connected with the negative pole of diode D17,;
03 foot of chip U8 is connected with 18 feet of chip U2;05 foot of chip U8 respectively with 02 contact of booster U11, two
The negative pole of the positive pole of pole pipe D17, resistance R35, the source electrode of field effect transistor Q3, electric capacity C22, C23, C32, and diode D15 is even
Connect;06 foot of chip U8 and 07 foot are respectively by resistance R39 and the positive pole of diode D16, resistance R35 and field effect transistor Q3
Grid connects;08 foot of chip U8 is connected with 01 contact of booster U11 by 08 foot of chip U7, and the two ends of electric capacity C25 are divided
It is not connected with 05 foot and 08 foot of chip U8;
4th inverter circuit 224 includes chip U9, diode D18, D19, D20, D21, field effect transistor Q4, resistance R20,
R36, R40, electric capacity C26, C27, C33, booster U12;The negative pole of diode D18 is connected with the drain electrode of field effect transistor Q4, two poles
The positive pole of pipe D18 is connected with positive pole circuit 13 respectively, the positive pole of diode D19 respectively with source electrode, the diode of field effect transistor Q4
The positive pole of D14, the negative pole of diode D15 and outfan TP1 connect, the positive pole of the negative pole of diode D19 and diode D18 and
Positive pole circuit 13 connects;Diode D20, D21 are connected in parallel with resistance R36 respectively, the negative pole of diode D20 and diode D21
Negative pole connect;
03 foot of chip U9 is connected with 18 feet of chip U2;05 foot of chip U9 respectively with 02 contact of booster U12, two
The negative pole of the positive pole of pole pipe D21, resistance R36, the source electrode of field effect transistor Q4, electric capacity C26, C27, C33, and diode D19 is even
Connect;06 foot of chip U9 and 07 foot are respectively by resistance R40 and the positive pole of diode D20, resistance R36 and field effect transistor Q4
Grid connects;08 foot of chip U9 is connected with 01 contact of booster U12,01 contact of booster U12 respectively with electric capacity C26,
One end of 05 foot of C27, C33 chip U9 dorsad connects, 03 contact ground of booster U12.
Further, fairing 11 also includes fuse F2, electric capacity C28, resistance T1 and resistance T2, and fuse F2 connects
On negative pole circuit 14, the two ends of electric capacity C28 are connected with positive pole circuit 13 and negative pole circuit 14 respectively, and the two ends of resistance T1 are respectively
Being connected with positive pole circuit 13 and negative pole circuit 14, also one end with fuse F2, one end of resistance T1 is connected;The two ends of resistance T2
Being connected with positive pole circuit 13 and negative pole circuit 14 respectively, one end of resistance T2 is also with one end of fuse F2 resistance T1 dorsad even
Connect.
Preferably, chip U1 is hex inverter, and the model of hex inverter is 74F04, and chip U2 is TDG2381 chip, core
Sheet U3 is communication 485 chips, and chip U4 is two inputs four and door chip, and two inputs four are 74F08 with the model of door chip,
Chip U5 is CPU, and chip U6, U7, U8, U9 are respectively photoelectrical coupler, and the model of photoelectrical coupler is TLP351.
Concrete, filter unit 3 includes coil L1, L2, L3, L4, L5, L6, L7, L8, electric capacity C9, C10, C11, C12,
C13, C14, C15, C16, C17, C18, resistance R16, R17, R18, R19, outfan P5;
Coil L1, L2, L3, L4 are sequentially connected in series, and one end of coil L1 coil L2 dorsad is connected with outfan TP1, line
One end of circle L4 coil L3 dorsad is connected with 01 contact of outfan P5;Coil L5, L6, L7, L8 are sequentially connected in series, coil L5
One end of coil L6 is connected with outfan TP3 dorsad, and one end of coil L8 coil L7 dorsad is connected with 03 contact of outfan P5;
One end of electric capacity C9 is connected between coil L1 and L2, and the other end is connected with outfan TP2;One end of electric capacity C10
Being connected between coil L2 and L3, the other end is connected with outfan TP2;One end of electric capacity C11 is connected between coil L3 and L4,
The other end is connected with outfan TP2;One end of electric capacity C12 is connected between coil L4 and outfan P5, the other end and outfan
TP2 connects;One end of electric capacity C15 is connected between coil L5 and L6, and the other end is connected with outfan TP2;One end of electric capacity C16
Being connected between coil L6 and L7, the other end is connected with outfan TP2;One end of electric capacity C17 is connected between coil L7 and L8,
The other end is connected with outfan TP2;One end of electric capacity C18 is connected between coil L8 and outfan P5, the other end and outfan
TP2 connects;One end of electric capacity C14 be connected to coil L4 and line row L5 between, the other end be connected to coil L8 and outfan P5 it
Between;
Resistance R16 is connected between coil L2 and L3, and resistance R18 is connected between coil L6 and L7, resistance R17 and resistance
R16 is connected in parallel, and resistance R19 is connected in parallel with resistance R18;Outfan P5 is connected with energising cloth.
The operation principle of technique scheme is:
Input P2 input voltage be 220V frequency be the alternating current of 50Hz, the AC conversion that commutator D5 will receive
For unidirectional current;Chip U5 is provided with variable target frequency value, target voltage values or target waveform, and user can regulate according to demand
Target frequency value, target voltage values or target waveform;
Chip U5 is transmitted according to target frequency value, target voltage values or target waveform shape to chip U2 by chip U1 and U4
The control signal become, chip U2 is to sending control signal to chip U7, U8, U9 respectively, and chip U7, U8, U9 are according to control signal
Control field effect transistor Q1, Q2, Q3, Q4 opening time, open frequency respectively or open aperture;
When field effect transistor Q1 and Q3 open, the cathode voltage of positive pole circuit 13 passes through control output end through field effect transistor Q1
TP3 coils L5, L6, L7, L8, transmit electric current to 03 contact of outfan P5, and electric current is back to from 01 contact of outfan P5
Field effect transistor Q3, and it flow to negative pole circuit through field effect transistor Q3, wherein, field effect transistor Q1 and Q3 are respectively used to control the arteries and veins of electric current
Width and voltage, and the waveform of electric current;
When field effect transistor Q2 and Q4 open, when field effect transistor Q2 and Q4 open, the cathode voltage warp of positive pole circuit 13
Field effect transistor Q4 passes through control output end TP1 coils L1, L2, L3, L4, transmits electric current, electric current to 01 contact of outfan P5
It is back to field effect transistor Q2 from 03 contact of outfan P5, and flow to negative pole circuit, wherein, field effect transistor Q2 through field effect transistor Q2
It is respectively used to control pulsewidth and the voltage of electric current, and the waveform of electric current with Q4;
By aforesaid operations, outfan P5 will obtain frequency, voltage or waveform and target frequency value, target voltage values or mesh
The target alternating current that mark waveform is consistent, and target alternating current is sent to the cloth that is energized, make energising cloth be obtained in that different frequency, electricity
Pressure or the alternating current of waveform.
As in figure 2 it is shown, present invention also offers a kind of variable-frequency variable-voltage to become the startup method of mode block, above-mentioned variable-frequency variable-voltage becomes
Mode block, comprises the following steps:
S1. chip U5 internal reservoir has rated frequency signal, nominal voltage signal or specified waveshape signal;
The most described chip U5 also has button and recognition by pressing keys function, and described chip U5 passes through recognition by pressing keys identification of function
Whether described button is pressed;If described button is pressed more than 3s, described chip U5 and is directly entered variable-frequency variable-voltage change wave mode;
S3., under variable-frequency variable-voltage becomes wave mode, chip U5 sends rated frequency signal, rated voltage to chip U3 frequency conversion plate
Signal or specified waveshape signal, chip U3, by the rated frequency signal received, nominal voltage signal or specified waveshape signal, depends on
Secondary through resistance R4, resistance R2, line row X3, coil L10, line row X7 and coil L9, it is respectively sent to booster U10, U11, U12;
S4. booster U10, U11, U12 is by the rated frequency signal received, nominal voltage signal or specified waveshape signal
After boosting, being respectively sent to chip U7, U8, U9, chip U7, U8, U9 are respectively according to the rated frequency signal after boosting, specified electricity
Pressure signal or specified waveshape signal control field effect transistor Q1, the opening time of Q2, Q3, Q4 or open frequency, make outfan P5 defeated
Go out to have the specified alternating current of rated frequency, rated voltage or specified waveform;
S5. chip U5 opens also by chip U1, U2, U4 control relay K 1, and the unidirectional current making commutator D5 export is short
Road resistance R15, enters directly into positive pole circuit 13, and then makes variable-frequency variable-voltage become mode block soft start;
If S6. button is not pressed, chip U5 exits identification work.
The foregoing is only presently preferred embodiments of the present invention, not in order to limit the present invention, all essences in the present invention
Within god and principle, any modification, equivalent substitution and improvement etc. made, should be included within the scope of the present invention.
Claims (10)
1. variable-frequency variable-voltage becomes a mode block, is connected with energising cloth, for the offer of described energising cloth have different frequency, voltage or
The alternating current of waveform, it is characterised in that variable-frequency variable-voltage becomes mode block and includes:
Rectification unit, is used for receiving alternating current, and converts alternating current to unidirectional current and export, described rectification unit have for
Export the positive pole circuit of positive voltage and for exporting the negative pole circuit of negative voltage or no-voltage;
Inversion unit, is provided with variable target frequency value, target voltage values or target waveform, and with described positive pole circuit and negative
Pole connection, described inversion unit receives described unidirectional current, and described unidirectional current is converted into frequency, voltage or waveform and institute
State the target alternating current that target frequency value, target voltage values or target waveform are consistent;
Filter unit, is connected with described inversion unit to receive described target alternating current, for carrying out described target alternating current
Filtering output is to described energising cloth.
A kind of variable-frequency variable-voltage the most according to claim 1 becomes mode block, it is characterised in that described rectification unit includes rectification
Device and protection device,
Described fairing includes that interconnective input P2 and commutator D5, described input P2 are used for receiving alternating current,
And the alternating current received is converted into unidirectional current to commutator D5, described commutator D5 by alternating current output;Described input
The live wire of P2 is connected with 03 contact of described commutator D5, and the zero line of described input P2 connects with 02 contact of described commutator D5
Connect, 04 contact of described commutator D5 and described positive pole connection, 01 contact of described commutator D5 and described negative pole circuit
Connect;
Described protection device includes resistance R15, relay K 1 and diode D1;One end of described resistance R15 and described commutator
The cathode output end of D15 connects, and one end of described resistance R15 is connected with a contact of described relay K 1, described relay
Another contact of K1 is connected with described cathode output end;The two ends of described diode respectively with the coil of described relay K 1
Two ends connect.
A kind of variable-frequency variable-voltage the most according to claim 1 becomes mode block, it is characterised in that described inversion unit includes:
Control circuit, is provided with variable described target frequency value, target voltage values or target waveform, and according to described target frequency
Rate value, target voltage values or target waveform output control signal;Described control circuit is also connected with described protection device;
Performing circuit, be connected with described control circuit to receive described control signal, described execution circuit also fills with described rectification
Putting and connect to receive unidirectional current, unidirectional current is converted into target alternating current according to described control signal by described execution circuit, described
Perform circuit and include the first inverter circuit, the second inverter circuit, the 3rd inverter circuit and the 4th inverter circuit.
4. become mode block according to a kind of variable-frequency variable-voltage described in Claims 2 or 3, it is characterised in that described control circuit includes
Chip U1, U2, U3, U4 and U5;
16 feet of described chip U2 positive pole with the coil of described relay K 1 and described diode D1 respectively is connected, described chip
17 feet of U2 are connected with described second inverter circuit and the 4th inverter circuit respectively, and 18 feet of described chip U2 are respectively with described
One inverter circuit and the 3rd inverter circuit connect;
08 foot of described chip U4 is connected with 03 foot of described chip U2,03 foot of described chip U4 and 01 foot of described chip U2
Connecting, 06 foot of described chip U4 is connected with 02 foot of described chip U2;
04 foot of described chip U1 is connected with 02 foot of described chip U4,06 foot of described chip U1 and 04 foot of described chip U4
Connect;
01 foot of described chip U5 is connected with 02 foot of described chip U1, and 12 feet of described chip U5 connect with 01 foot of chip U4
Connecing, 22 feet of described chip U5 are connected with 10 feet of described chip U4,26 feet of described chip U5 and 05 foot of described chip U4
With described chip U1 03 foot connect, described chip 28 foot respectively with 10 feet of described chip U2, the negative pole of described diode D1
Connect with the coil of described relay K 1;
05 foot of described chip U3 is connected with 05 foot of described chip U5,06 foot of described chip U3 and 07 foot respectively with described core
08 foot of sheet U5 connects, and 08 foot of described chip U3 is connected with 04 foot of described chip U5, and 04 foot of described chip U3 is used for connecing
Receive external level.
A kind of variable-frequency variable-voltage the most according to claim 4 becomes mode block, it is characterised in that described control circuit also includes electricity
Resistance R1, R2, R3, R4, R5, R6, R9, R20, R21, R22, R23, electric capacity C1, C2, C3, C4, C5, C6, C7, C19, C20, C21,
C24, C29, C30, LED 1, diode D2, D3, D4, induction coil L9, L10, line row X1, X3, X7, P6, crystal
Agitator Y1;
03 foot of described chip U3 respectively with positive pole, one end of resistance R5, one end of resistance R3 and the resistance R1 of diode D4
One end connect, the negative pole of described diode D4 is connected with negative pole, the negative pole of diode D3 of described diode D2, described two poles
The plus earth of pipe D2;One end ground connection of 03 foot of described resistance R5 the most described chip U3, the described the most described core of resistance R1
02 contact of one end of 03 foot of sheet U3 and described line row X3 is connected, described line arrange 01 contact of X3 respectively with described diode D1
Negative pole, the coil of relay K 1,14 feet of described chip U1,14 feet of described chip U4,28 feet of described chip U5, described
Line row 01 contact of P6, described coil L10, resistance R9, described electric capacity C1, C2, C3, C4, C6, C7, C19 connect, described electric capacity
One end ground connection of 01 contact of C1, C2, C3, C4, C6, C7 the most described line row X3, the 04 foot ground connection of described line row P6;Described core
02 foot of sheet U3 respectively with one end of 03 foot of the described the most described chip of resistance R3, one end of resistance R2, described diode D3
Positive pole connect, 01 foot of described chip U3 is connected with described resistance R4, described chip U3 also with described resistance R4 dorsad described in
One end of 01 foot of chip U3 connects;One end of 02 foot of described resistance R2 the most described chip U3 is touched with the 03 of described line row X3
Point connects, 04 contact ground of described line row;
02 contact 05 foot with 05 foot of described chip U3 and described chip U5 respectively of described line row P6 is connected, and P6 arranged by described line
03 contact 04 foot with 08 foot of described chip U3 and described chip U5 respectively be connected;The described the most described line of coil L10 is arranged
01 contact of one end of 01 contact of X3 and described line row X7 is connected, described line arrange 01 contact of X7 the most respectively with described coil L9
Connect with one end of described electric capacity C24, C29, one end ground connection of 01 contact of described electric capacity C24, C29 the most described line row X7,
Described line row X7 03 contact ground, described coil L9 the most described line row X7 01 contact one end respectively with described booster
04 contact of U10,04 contact of U11,04 contact of U12,04 contact of U13, described resistance R20, R21, R22, R23, and
Described electric capacity C5, C30 connect, described resistance R20, R21, R22, R23 the most respectively with 02 foot, the described core of described chip U6
02 foot of 02 foot U8 of sheet U7,02 foot of U9 connect;
One end of 01 contact of described resistance R9 the most described line row X3 is connected with the positive pole of described LED 1, described
The minus earth of LED 1;One end of 01 contact of described electric capacity C19 the most described line row X3 and described chip U5
03 foot connect, one end of 01 contact of described electric capacity C19 the most described line row X3 is also by described resistance R6 ground connection;
01 foot of described chip U1 is connected with 01 contact of described line row X1,03 contact ground of described line row X1;Described crystal
The two ends of agitator Y1 are connected with 06 foot and 07 foot of described chip U5 respectively, and 06 foot of described chip U5 passes through described electric capacity
C20 ground connection, 07 foot of described chip U5 passes through described electric capacity C21 ground connection.
A kind of variable-frequency variable-voltage the most according to claim 4 becomes mode block, it is characterised in that described performance element also includes handing over
Stream outfan TP1, TP2, TP3, electric capacity C5, C30;
Described first inverter circuit includes chip U6, diode D6, D7, D8, D9, field effect transistor Q1, resistance R20, R33, R37,
Electric capacity C8, C13, C31, booster U10;The positive pole of described diode D6 respectively with the drain electrode of described field effect transistor Q1 and described defeated
Going out and hold TP3 to connect, the negative pole of described diode D6 and described positive pole connection, the negative pole of described diode D7 is imitated with described field
Should the source electrode of pipe Q1 connect, the positive pole of described diode D7 negative pole with described positive pole circuit and diode D6 respectively is connected;Institute
State diode D8, D9 to be connected in parallel with described resistance R33 respectively, the negative pole of described diode D8 and the negative pole of described diode D9
Connect;
03 foot of described chip U6 is connected with 18 feet of described chip U2;05 foot of described chip U6 respectively with described booster
02 contact of U10, the positive pole of described diode D9, resistance R33, the source electrode of field effect transistor Q1, electric capacity C8, C13, C31, Yi Jisuo
The negative pole stating diode D7 connects;06 foot of described chip U6 and 07 foot are respectively by resistance R37 and the positive pole of diode D8, electricity
The grid of resistance R33 and field effect transistor Q1 connects;08 foot of described chip U6 is connected with 01 contact of described booster U10, institute
State one end respectively with 05 foot of described electric capacity C8, C13, C31 the most described chip U6,01 contact of booster U10 to be connected, institute
State 03 contact ground of booster U10;
Described second inverter circuit includes chip U7, diode D10, D11, D12, D13, field effect transistor Q2, resistance R20, R34,
R38, electric capacity C22, C23, C32, booster U11;The positive pole of described diode D10 respectively with the drain electrode of described field effect transistor Q2 and
Outfan TP2 connects, the negative pole of described diode D10 respectively with positive pole, the leakage of described field effect transistor Q1 of described diode D6
Pole and described outfan TP3 connect, and the negative pole of described diode D11 is connected with the source electrode of described field effect transistor Q2, and described two
The positive pole of pole pipe D11 respectively with the positive pole of described diode D6, the drain electrode of described field effect transistor Q1, diode D10 negative pole with
And described outfan TP3 connects;Described diode D12, D13 are connected in parallel with described resistance R34 respectively, described diode D12
Negative pole be connected with the negative pole of described diode D13;
03 foot of described chip U7 is connected with 17 feet of described chip U2;05 foot of described chip U7 respectively with described booster
02 contact of U11, the positive pole of described diode D13, resistance R34, the source electrode of field effect transistor Q2, electric capacity C22, C23, C32, and
The negative pole of described diode D11 connects;06 foot of described chip U7 and 07 foot are respectively by resistance R38 and diode D12 just
The grid of pole, resistance R34 and field effect transistor Q2 connects;08 foot of described chip U7 connects with 01 contact of described booster U11
Connecing, 01 contact of described booster U11 is respectively with one end of 05 foot of described electric capacity C22, C23, C32 the most described chip U7 even
Connect, 03 contact ground of described booster U11;
Described 3rd inverter circuit includes chip U8, diode D14, D15, D16, D17, field effect transistor Q3, resistance R20, R35,
R39, electric capacity C25;The positive pole of described diode D14 is connected with described outfan TP1, and the negative pole of described diode D14 is with described
The drain electrode of field effect transistor Q3 connects, the positive pole of described diode D15 and the source electrode of described field effect transistor Q3, outfan TP2, two poles
The positive pole of pipe D10 and the drain electrode of field effect transistor Q2 connect, and the negative pole of described diode D15 is respectively with described diode D14's
Positive pole and described 4th inverter circuit connect;Described diode D16, D17 are connected in parallel with described resistance R35 respectively, and described two
The negative pole of pole pipe D16 is connected with the negative pole of described diode D17;
03 foot of described chip U8 is connected with 18 feet of described chip U2;05 foot of described chip U8 respectively with described booster
02 contact of U11, the positive pole of described diode D17, resistance R35, the source electrode of field effect transistor Q3, electric capacity C22, C23, C32, and
The negative pole of described diode D15 connects;06 foot of described chip U8 and 07 foot are respectively by resistance R39 and diode D16 just
The grid of pole, resistance R35 and field effect transistor Q3 connects;08 foot of described chip U8 passes through 08 foot of described chip U7 with described
01 contact of booster U11 connects, and the two ends of described electric capacity C25 are connected with 05 foot and 08 foot of described chip U8 respectively;
Described 4th inverter circuit includes chip U9, diode D18, D19, D20, D21, field effect transistor Q4, resistance R20, R36,
R40, electric capacity C26, C27, C33, booster U12;The negative pole of described diode D18 is connected with the drain electrode of described field effect transistor Q4,
The positive pole of described diode D18 respectively with described positive pole connection, the positive pole of described diode D19 respectively with described field effect
The source electrode of pipe Q4, the positive pole of diode D14, the negative pole of diode D15 and outfan TP1 connect, and described diode D19's is negative
The positive pole of pole and described diode D18 and described positive pole connection;Described diode D20, D21 respectively with described resistance R36
Being connected in parallel, the negative pole of described diode D20 is connected with the negative pole of described diode D21;
03 foot of described chip U9 is connected with 18 feet of described chip U2;05 foot of described chip U9 respectively with described booster
02 contact of U12, the positive pole of described diode D21, resistance R36, the source electrode of field effect transistor Q4, electric capacity C26, C27, C33, and
The negative pole of described diode D19 connects;06 foot of described chip U9 and 07 foot are respectively by resistance R40 and diode D20 just
The grid of pole, resistance R36 and field effect transistor Q4 connects;08 foot of described chip U9 connects with 01 contact of described booster U12
Connecing, 01 contact of described booster U12 is respectively with one end of 05 foot of described electric capacity C26, C27, C33 the most described chip U9 even
Connect, 03 contact ground of described booster U12.
A kind of variable-frequency variable-voltage the most according to claim 2 becomes mode block, it is characterised in that described fairing also includes melting
Disconnected device F2, electric capacity C28, resistance T1 and resistance T2, fuse F2 are connected on described negative pole circuit, the two ends of described electric capacity C28
Respectively with described positive pole circuit and negative pole connection, the two ends of described resistance T1 respectively with described positive pole circuit and negative pole circuit
Connecting, also one end with described fuse F2, one end of described resistance T1 is connected;The two ends of described resistance T2 respectively with described just
Polar curve road and negative pole connection, one end of described resistance T2 is also with one end of described fuse F2 the most described resistance T1 even
Connect.
A kind of variable-frequency variable-voltage the most according to claim 6 becomes mode block, it is characterised in that described chip U1 is six anti-phase
Device, the model of described hex inverter is 74F04, and described chip U2 is TDG2381 chip, and described chip U3 is communication 485 chips,
Described chip U4 is two inputs four and door chip, and described two inputs four are 74F08 with the model of door chip, described chip U5
For CPU, described chip U6, U7, U8, U9 are respectively photoelectrical coupler, and the model of described photoelectrical coupler is TLP351.
A kind of variable-frequency variable-voltage the most according to claim 6 becomes mode block, it is characterised in that described filter unit includes coil
L1, L2, L3, L4, L5, L6, L7, L8, electric capacity C9, C10, C11, C12, C13, C14, C15, C16, C17, C18, resistance R16,
R17, R18, R19, outfan P5;
Described coil L1, L2, L3, L4 are sequentially connected in series, one end of described coil L1 the most described coil L2 and described output
End TP1 connects, and one end of described coil L4 the most described coil L3 is connected with 01 contact of described outfan P5;Described coil
L5, L6, L7, L8 are sequentially connected in series, and one end of described coil L5 the most described coil L6 is connected with described outfan TP3, institute
03 contact of one end and described outfan P5 of stating coil L8 the most described coil L7 is connected;
One end of described electric capacity C9 is connected between described coil L1 and L2, and the other end is connected with described outfan TP2;Described electricity
The one end holding C10 is connected between described coil L2 and L3, and the other end is connected with described outfan TP2;The one of described electric capacity C11
End is connected between described coil L3 and L4, and the other end is connected with described outfan TP2;One end of described electric capacity C12 is connected to
Between described coil L4 and outfan P5, the other end is connected with described outfan TP2;One end of described electric capacity C15 is connected to institute
Stating between coil L5 and L6, the other end is connected with described outfan TP2;One end of described electric capacity C16 is connected to described coil L6
With between L7, the other end is connected with described outfan TP2;One end of described electric capacity C17 is connected between described coil L7 and L8,
The other end is connected with described outfan TP2;One end of described electric capacity C18 is connected between described coil L8 and outfan P5, separately
One end is connected with described outfan TP2;One end of described electric capacity C14 is connected between described coil L4 and described line row L5, separately
One end is connected between described coil L8 and described outfan P5;
Described resistance R16 is connected between described coil L2 and L3, and described resistance R18 is connected between described coil L6 and L7,
Described resistance R17 is connected in parallel with described resistance R16, and described resistance R19 is connected in parallel with described resistance R18;Described outfan
P5 is connected with described energising cloth.
10. variable-frequency variable-voltage becomes a startup method for mode block, is applied to a kind of frequency conversion according to any one of claim 1-9
Transformation becomes mode block, it is characterised in that comprise the following steps:
The most described chip U5 internal reservoir has rated frequency signal, nominal voltage signal or specified waveshape signal;
The most described chip U5 also has button and recognition by pressing keys function, and described chip U5 is by described in recognition by pressing keys identification of function
Whether button is pressed;If described button is pressed more than 3s, described chip U5 and is directly entered variable-frequency variable-voltage change wave mode;
S3. become under wave mode at variable-frequency variable-voltage, described chip U5 to described chip U3 frequency conversion plate send described rated frequency signal,
Nominal voltage signal or specified waveshape signal, described chip U3 is by the described rated frequency signal received, nominal voltage signal
Or specified waveshape signal, successively through described resistance R4, resistance R2, line row X3, coil L10, line row X7 and coil L9, it is respectively transmitted
To described booster U10, U11, U12;
S4. described rated frequency signal, nominal voltage signal or the specified waveshape signal that booster U10, U11, U12 will receive
After boosting, be respectively sent to described chip U6, U7, U8, U9, described chip U6, U7, U8, U9 respectively according to boosting after described in
Rated frequency signal, nominal voltage signal or specified waveshape signal control described field effect transistor Q1, the opening time of Q2, Q3, Q4
Or open frequency, make described outfan P5 output have the specified alternating current of rated frequency, rated voltage or specified waveform;
The most described chip U5 controls described relay K 1 also by chip U1, U2, U4 and opens, and makes the direct current that commutator D5 exports
Electrical short resistance R15, enters directly into described positive pole circuit, and then makes variable-frequency variable-voltage become mode block soft start;
If the most described button is not pressed, described chip U5 exits identification work and terminates.
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CN2016103648212 | 2016-05-27 | ||
CN201610364821.2A CN105871223A (en) | 2016-05-27 | 2016-05-27 | Variable-frequency, variable-voltage and variable-wave module and starting method thereof |
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CN106301002A true CN106301002A (en) | 2017-01-04 |
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CN201610364821.2A Withdrawn CN105871223A (en) | 2016-05-27 | 2016-05-27 | Variable-frequency, variable-voltage and variable-wave module and starting method thereof |
CN201610875559.8A Pending CN106301002A (en) | 2016-05-27 | 2016-09-30 | A kind of variable-frequency variable-voltage becomes mode block and starts method |
CN201621103775.2U Active CN206180860U (en) | 2016-05-27 | 2016-09-30 | Variable voltage variable frequency becomes mode piece |
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CN109754567A (en) * | 2019-01-23 | 2019-05-14 | 福建师范大学 | A kind of flame detector operating circuit |
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- 2016-09-30 CN CN201610875559.8A patent/CN106301002A/en active Pending
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