CN208548831U - A kind of ultrasonic power - Google Patents
A kind of ultrasonic power Download PDFInfo
- Publication number
- CN208548831U CN208548831U CN201821133677.2U CN201821133677U CN208548831U CN 208548831 U CN208548831 U CN 208548831U CN 201821133677 U CN201821133677 U CN 201821133677U CN 208548831 U CN208548831 U CN 208548831U
- Authority
- CN
- China
- Prior art keywords
- capacitor
- resistance
- pin
- chip
- driving chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Landscapes
- Inverter Devices (AREA)
Abstract
The utility model provides a kind of ultrasonic power, comprising: power factor regulation unit, matching network and load impedance tracking cell;The power factor regulation unit, is connected with the matching network, for exporting pulse electrical signal to the matching network;The matching network is connect with the ultrasonic transducer, for exporting the pulse electrical signal after power amplification to the ultrasonic transducer;The load impedance tracking cell, it is connected with ultrasonic transducer and the matching network, it is acquired in real time for the current demand signal waveform to the ultrasonic transducer, and the control signal for being used to control pulse electrical signal frequency of generation is sent to the matching network.The utility model can be improved the output power of ultrasonic transducer.
Description
Technical field
The utility model relates to electronic technology field more particularly to a kind of ultrasonic powers.
Background technique
Ultrasonic power is a kind of for generating and providing the device of ultrasonic energy to ultrasonic transducer.Ultrasonic wave electricity
The effect in source is that the electric signal of the inputs such as alternating current is converted to the high-frequency ac electric signal to match with ultrasonic transducer, by this
High-frequency ac electric signal drives ultrasonic transducer to work as driving signal.
When the frequency of the driving signal of ultrasonic power output is equal with the resonance frequency of ultrasonic transducer, ultrasonic waves
The output power of energy device is just maximum.Ultrasonic transducer at work because the rigidity of institute's loading and vibrational system itself,
Temperature etc. changes, and will cause the drift of resonance frequency, if driving signal cannot be with the resonance frequency of ultrasonic transducer
The variation of rate and change, then, the output power of ultrasonic transducer will reduce.In the prior art, ultrasonic power
The frequency of driving signal is generally fixed and invariable, in this way, will make the output power of ultrasonic transducer reduces.
Utility model content
The utility model embodiment provides a kind of ultrasonic power, can be improved the output power of ultrasonic transducer.
The utility model embodiment provides a kind of ultrasonic power, comprising:
Power factor regulation unit, matching network and load impedance tracking cell;
The power factor regulation unit, is connected with the matching network, for the alternating current of input to be converted to pulse
Electric signal is exported to the matching network;
The matching network, connect with ultrasonic transducer, for exporting the pulse electrical signal after power amplification to institute
State ultrasonic transducer;
The load impedance tracking cell, is connected with the ultrasonic transducer and the matching network, for described
The current demand signal waveform of ultrasonic transducer is acquired in real time, and by the control for being used to control pulse electrical signal frequency of generation
Signal is sent to the matching network.
Further,
The power factor regulation unit, comprising: current rectifying and wave filtering circuit, DC/DC translation circuit, power factor regulation circuit
And full bridge inverter;
The current rectifying and wave filtering circuit is connected with the DC/DC translation circuit, for will rectify to the alternating current of input
The direct current electricity output generated after filtering gives the DC/DC translation circuit;
The DC/DC translation circuit is connected with the full bridge inverter, for the direct current electricity output after converting the voltage into
To the full bridge inverter;
The full bridge inverter is connected with the matching network, straight for that will input to the DC/DC translation circuit
The pulse electrical signal that galvanic electricity generate after inversion processing is exported to the matching network;
The power factor regulation circuit is connected with the DC/DC translation circuit, for that will adjust the pulse electrical signal
The control signal of power factor is sent to the DC/DC translation circuit.
Further,
The current rectifying and wave filtering circuit, comprising:
The drain electrode of first metal-oxide-semiconductor connects the first end of alternating current, the positive phase of the first metal-oxide-semiconductor source electrode and first diode
Even, the cathode of the first diode is connected with the anode of the first end of the first inductance and the second diode respectively, and described second
The cathode of diode is connected with the cathode of the second end of the alternating current and third diode respectively, and the third diode is just
Pole ground connection, the cathode ground connection of the 4th diode, the anode of the 4th diode are connected with the first end of the alternating current.
Further,
The power factor regulation circuit, comprising: power factor regulation chip;
The DC/DC translation circuit, comprising: DC/DC converts chip;
The second end of first inductance with insurance resistance first end be connected, it is described insure resistance second end respectively with
The first end of first capacitor, the first end of the second capacitor, the drain electrode of the second metal-oxide-semiconductor, the first end of first resistor, second resistance
First end, the first end of 3rd resistor are connected, the second end ground connection of the second end of the first capacitor and second capacitor;
The grid of second metal-oxide-semiconductor is connected with the output pin of DC/DC transformation chip, second metal-oxide-semiconductor
Source electrode is connected with the first end of the second inductance, and the second end of the first resistor is connected with the cathode of the 5th diode, and described
The anode of five diodes is connected with the cathode of the first zener diode, the plus earth of first zener diode;
The second end of the second resistance is connected with the energization pins of the power factor regulation chip, the 3rd resistor
Second end be connected with the input pin of the power factor regulation chip;The first end of 4th resistance and the rate factor adjust
The input pin of chip is connected, and the second end ground connection of the 4th resistance, the first end of third capacitor and the rate factor adjust chip
Input pin be connected, the second end of third capacitor ground connection, the first end of the 4th capacitor and the power factor regulation core
The energization pins of piece are connected, the second end ground connection of the 4th capacitor, the current detecting pin of the power factor regulation chip
Be connected with the first end of the 5th resistance, the second end of the 5th resistance respectively with the first end of the 6th resistance, the 7th resistance
First end, the first end of the 8th resistance are connected, the second end ground connection of the 6th resistance, the second termination of the 7th resistance
Ground, the second end of the 8th resistance are connected with the first end of the 9th resistance respectively, the grid of third metal-oxide-semiconductor, the 9th electricity
The second end of resistance is connected with the gate driving pin of the power factor regulation chip, the source electrode of the third metal-oxide-semiconductor with it is described
The first end of 7th resistance is connected, and the drain electrode of the third metal-oxide-semiconductor is connected with the second end of second inductance, the power because
The zero passage pins that number adjusts chips are connected with the first end of the tenth resistance, the second end of the tenth resistance and eleventh resistor
First end, the first end of the 5th capacitor are connected, and the second end of the eleventh resistor is connected with the anode of the 5th diode,
The second end of 5th capacitor is connected with the input pin of DC/DC transformation chip, the first termination of the 5th capacitor
The output pin on ground, the power factor regulation chip is connected with the first end of the 6th capacitor, the first end of the 7th capacitor respectively,
The second end of 6th capacitor is connected with the first end of twelfth resistor, the second end of the twelfth resistor respectively with it is described
The second end of 7th capacitor, the feedback pin of DC/DC transformation chip are connected;
The feedback pin of DC/DC transformation chip respectively with the first end of the thirteenth resistor, the 14th resistance
First end is connected;The second end of the thirteenth resistor is connected with the second end of second inductance, the 14th resistance
Second end ground connection, the plus earth of the second zener diode, the cathode of second zener diode and second inductance
First end is connected, the first end ground connection of the 8th capacitor, the second end and the second end phase of second inductance of the 8th capacitor
Even.
Further,
The full bridge inverter, comprising:
The first end of first side of transformer respectively with the anode of third zener diode, the 4th zener diode it is negative
Pole, the first end of the 15th resistance, the first end of the 9th capacitor, the 4th metal-oxide-semiconductor source electrode, the 5th metal-oxide-semiconductor drain electrode be connected;
The second end of first side of transformer respectively with the anode of the 5th zener diode, the 6th zener diode it is negative
Pole, the first end of the 16th resistance, the first end of the tenth capacitor, the 6th metal-oxide-semiconductor source electrode, the 7th metal-oxide-semiconductor drain electrode be connected;
The cathode of the third zener diode is connected with the second end of second inductance, the 4th zener diode
Plus earth, the second end of the 15th resistance is connected with the first end of the 11st capacitor, the of the 11st capacitor
Two ends ground connection, the second end of the 9th capacitor are connected with the first end of the 17th resistance, the second end of the 17th resistance
It is connected with the second end of second inductance, the grid of the 4th metal-oxide-semiconductor is connected with the first end of the matching network, described
The drain electrode of 4th metal-oxide-semiconductor is connected with the second end of second inductance, grid and the matching network of the 5th metal-oxide-semiconductor
Second end is connected, the source electrode ground connection of the 5th metal-oxide-semiconductor;
The cathode of 5th zener diode is connected with the second end of second inductance, the 6th zener diode
Plus earth, the second end of the 16th resistance is connected with the first end of the 12nd capacitor, the of the 12nd capacitor
Two ends ground connection, the second end of the tenth capacitor are connected with the first end of the 18th resistance, the second end of the 18th resistance
It is connected with the second end of second inductance, the grid of the 6th metal-oxide-semiconductor is connected with the third end of the matching network, described
The drain electrode of 6th metal-oxide-semiconductor is connected with the second end of second inductance, grid and the matching network of the 7th metal-oxide-semiconductor
4th end is connected, the source electrode ground connection of the 7th metal-oxide-semiconductor;
The first end of second side of the transformer is connected with the first end of crystal oscillator, second end and the third electricity of the crystal oscillator
The first end of sense is connected, the second end of second side of the second end and transformer of the third inductance.
Further,
The matching network, comprising:
The high-end input pin of first driving chip is connected with the first output end of the load impedance tracking cell, described
The high-end input pin of first driving chip is connected with the low side input pin of the second driving chip;
The high-end input pin of second driving chip is connected with the second output terminal of the load impedance tracking cell, described
The high-end input pin of second driving chip is connected with the low side input pin of the first driving chip;
The first end of 19th resistance is connected with the low side input pin of first driving chip, the 19th resistance
Second end be connected with the first end of the 20th resistance, the second end of the 20th resistance is low with second driving chip
Input pin is held to be connected, the second termination first voltage of the 19th resistance;
First end and the power factor of the high-end output pin of first driving chip as the matching network
It adjusts unit to be connected, second end and the power of the low side output pin of first driving chip as the matching network
Factor adjusts unit and is connected;
The high-end floating power pin of first driving chip is connected with the cathode of the 6th diode, the six or two pole
The anode of pipe connects second voltage;The high-end floating power feedback pin of first driving chip and the ultrasonic transducer phase
Even, the low side feedback pin of first driving chip connects tertiary voltage;The low side energization pins of first driving chip connect
The second voltage;The anode of 7th diode is connected with the high-end floating power feedback pin of first driving chip, institute
The cathode for stating the 7th diode is connected with the high-end output pin of first driving chip;The plus earth of 8th diode,
The cathode of 8th diode is connected with the low side output pin of first driving chip;The first end of 13rd capacitor with it is described
The high-end floating power feedback pin of first driving chip is connected, the second end of the 13rd capacitor and the first driving core
The high-end floating power pin of piece is connected;The low side energization pins phase of the first end of 14th capacitor and first driving chip
Even, the second termination tertiary voltage of the 14th capacitor;
Third end and the power factor of the high-end output pin of second driving chip as the matching network
It adjusts unit to be connected, fourth end and the power of the low side output pin of second driving chip as the matching network
Factor adjusts unit and is connected;
The high-end floating power pin of second driving chip is connected with the cathode of the 9th diode, the 9th 2 pole
The anode of pipe connects the second voltage;The high-end floating power feedback pin of second driving chip and the ultrasonic wave transducer
Device is connected, and the low side feedback pin of second driving chip connects the tertiary voltage;The low side of second driving chip supplies
Electric pin connects the second voltage;The high-end floating power feedback pin of the anode and second driving chip of tenth diode
It is connected, the cathode of the tenth diode is connected with the high-end output pin of second driving chip;11st diode
Plus earth, the cathode of the 11st diode are connected with the low side output pin of second driving chip;15th capacitor
First end is connected with the high-end floating power feedback pin of second driving chip, the second end of the 15th capacitor and institute
The high-end floating power pin for stating the second driving chip is connected;The first end of 16th capacitor is low with second driving chip
Energization pins are held to be connected, the second termination tertiary voltage of the 16th capacitor.
Further,
The load impedance tracking cell, comprising:
Acquisition Circuit and load impedance handle chip;
The Acquisition Circuit is acquired in real time for the current demand signal waveform to the ultrasonic transducer, will be acquired
To the current demand signal waveform be sent to load impedance processing chip;
The load impedance handles chip, is connected with the Acquisition Circuit and matching network, and being used for will be according to described current
The control signal for controlling pulse electrical signal frequency that signal waveform generates is sent to the matching network.
Further,
The Acquisition Circuit, comprising:
The input terminal of filter is connected with the ultrasonic transducer, the output end of the filter and the 17th capacitor
First end is connected, and the second end of the 17th capacitor is connected with the first end of the 21st resistance, the 21st resistance
Second end be connected respectively with the first end of the 18th capacitor, the non-inverting input terminal of the first operational amplifier, it is described 18th electricity
The second end of appearance is grounded, the output end of first operational amplifier anti-phase input with first operational amplifier respectively
End, the non-inverting input terminal of second operational amplifier are connected, the reverse inter-input-ing ending grounding of the second operational amplifier, and described second
The output end of operational amplifier is connected with the first input end of load impedance processing chip;
The first end of 22nd resistance is connected with the ultrasonic transducer, the second end point of the 22nd resistance
It is not connected with the first end of the 23rd resistance, the first end of the 19th capacitor, the second end ground connection of the 23rd resistance is described
The second end of 19th capacitor is connected with the first end of the 24th resistance, and the second end of the 24th resistance is respectively with
First end, the non-inverting input terminal of third operational amplifier of 20 capacitors are connected, the second end ground connection of the 20th capacitor, institute
State the output end of third operational amplifier respectively with the inverting input terminal of the third operational amplifier, four-operational amplifier
Non-inverting input terminal is connected, the reverse inter-input-ing ending grounding of the four-operational amplifier, the output end of the four-operational amplifier
It is connected with the second input terminal of load impedance processing chip.
Further,
The load impedance handles chip, described determines the ultrasonic wave transducer according to the current demand signal waveform executing
When the corresponding present load impedance of device, it is specifically used for:
Fourier transformation is carried out to the current demand signal waveform of Acquisition Circuit input, obtains the of Fourier transformation
One result;
Digital filtering processing is carried out to first result, the harmonic frequency components in first result is filtered out, obtains number
The second result after filtering processing;
According to described second as a result, determining the corresponding present load impedance of the ultrasonic transducer.
Further,
Further comprise: display unit;
The display unit is connected with the load impedance tracking cell, for showing the current work of the ultrasonic power
Make state.
In the utility model embodiment, power factor regulation unit provides pulse electrical signal, pulse electricity to matching network
After matching network, driving ultrasonic transducer work, matching network matches with ultrasonic transducer, ensure that super signal
The stable output power of acoustic wave transducer is in a higher level, in addition, load impedance tracking cell can be in real time to ultrasound
Wave transducer is tracked, and is adjusted according to frequency of the state of ultrasonic transducer to pulse electrical signal, so that pulse is electric
The frequency of signal and the current resonance frequency of ultrasonic transducer match, and further improve the output work of ultrasonic transducer
Rate.
Detailed description of the invention
Fig. 1 is a kind of schematic diagram of ultrasonic power provided by the embodiment of the utility model;
Fig. 2 is a kind of circuit diagram of power factor regulation unit provided by the embodiment of the utility model;
Fig. 3 is a kind of circuit diagram of matching network provided by the embodiment of the utility model;
Fig. 4 is a kind of circuit diagram of load impedance tracking cell provided by the embodiment of the utility model.
Specific embodiment
It is practical new below in conjunction with this to keep the objectives, technical solutions, and advantages of the embodiments of the present invention clearer
Attached drawing in type embodiment, the technical scheme in the utility model embodiment is clearly and completely described, it is clear that is retouched
The embodiment stated is a part of the embodiment of the utility model, instead of all the embodiments.Based on the reality in the utility model
Apply example, those of ordinary skill in the art's every other embodiment obtained without making creative work, all
Belong to the range of the utility model protection.
As shown in Figure 1, the utility model embodiment provides a kind of ultrasonic power, comprising:
Power factor regulation unit 101, matching network 102 and load impedance tracking cell 103;
The power factor regulation unit 101 is connected with the matching network 102, the matching network 102 and outside
Ultrasonic transducer be connected, the load impedance tracking cell 103 respectively with the ultrasonic transducer and the matching network
102 are connected;The matching network 102 matches with the ultrasonic transducer;
The power factor regulation unit 101, for carrying out rectifying and wave-filtering to the alternating current of input, generation direct current is right
The direct current carries out voltage conversion, carries out inversion processing to the direct current after voltage conversion, generates pulse electrical signal, Xiang Suoshu
Matching network 102 exports the pulse electrical signal, and controls the power factor of the pulse electrical signal;
The matching network 102, for carrying out power amplification processing to the pulse electrical signal, by the arteries and veins after power amplification
Electric signal is rushed after the load matched for the ultrasonic transducer, is exported to the ultrasonic transducer;
The load impedance tracking cell 103 carries out real-time for the current demand signal waveform to the ultrasonic transducer
Acquisition, determines the corresponding present load impedance of the ultrasonic transducer according to the current demand signal waveform, according to described current
The target frequency that the determining current resonance frequency with the ultrasonic transducer of load impedance matches, controls the matching network
102 to the ultrasonic transducer output frequency be the target frequency pulse electrical signal.
In the utility model embodiment, power factor regulation unit provides pulse electrical signal, pulse electricity to matching network
After matching network, driving ultrasonic transducer work, matching network matches with ultrasonic transducer, ensure that super signal
The stable output power of acoustic wave transducer is in a higher level, in addition, load impedance tracking cell can be in real time to ultrasound
Wave transducer is tracked, and is adjusted according to frequency of the state of ultrasonic transducer to pulse electrical signal, so that pulse is electric
The frequency of signal and the current resonance frequency of ultrasonic transducer match, and further improve the output work of ultrasonic transducer
Rate.
In an embodiment of the utility model, the power factor regulation unit, comprising: current rectifying and wave filtering circuit, DC/DC become
Change circuit, power factor regulation circuit and full bridge inverter;
The current rectifying and wave filtering circuit is connected with the DC/DC translation circuit, the DC/DC translation circuit respectively with the function
Rate factor adjustment circuits are connected with the full bridge inverter;
The current rectifying and wave filtering circuit generates direct current, by the straight of generation for carrying out rectifying and wave-filtering to the alternating current of input
Galvanic electricity is exported to the DC/DC translation circuit;
The DC/DC translation circuit, the direct current for inputting to the current rectifying and wave filtering circuit carry out voltage conversion, will be electric
Direct current electricity output after pressure conversion gives the full bridge inverter;
The full bridge inverter, the direct current for inputting to the DC/DC translation circuit carry out inversion processing, generate
Pulse electrical signal, Xiang Suoshu matching network export the pulse electrical signal;
The power factor regulation circuit, for adjusting the pulse electrical signal by controlling the DC/DC translation circuit
Power factor.Such as the control signal of the adjustable pulse electrical signal power factor is sent to DC/DC translation circuit.
In the utility model embodiment, the alternating current that can be 220v of the alternating current of input.DC/DC translation circuit can be with
It boosts, can also be depressured, specific boosting or decompression can according to need to be arranged.
Power factor regulation circuit can be adjusted the power factor of pulse electrical signal, increase power factor, improve
The utilization rate of the alternating current of input.It specifically, can be by power by the power factor regulation circuit of the utility model embodiment
Factor is adjusted to required target value, may be adjusted to the electricity reduced in route in total current and power supply system close to 1
Gas element, such as the capacity of transformer, electrical equipment, conducting wire, reduce investment cost, and reduce the loss of electric energy, subtract
The loss of voltage in few power supply system, can make load voltage more stable, improve the quality of electric energy, can increase the abundant of system
Degree, has excavated the potentiality of power supply equipment.
Such as: power factor regulation circuit can be by power factor regulation to 0.99,0.98,0.97,0.96,0.95,0.9
It is equivalent.
In an embodiment of the utility model, the current rectifying and wave filtering circuit, comprising:
The drain electrode of first metal-oxide-semiconductor Q1 connects the first end of alternating current, the first metal-oxide-semiconductor source electrode Q1 and first diode D1's
Anode is connected, the cathode of the first diode D1 positive phase with the first end of the first inductance L1 and the second diode D2 respectively
Even, the cathode of the second diode D2 is connected with the cathode of the second end of the alternating current and third diode D3 respectively, institute
State the plus earth of third diode D3, the cathode ground connection of the 4th diode D4, the anode of the 4th diode D4 with it is described
The first end of alternating current is connected.
In an embodiment of the utility model, the power factor regulation circuit, comprising: power factor regulation chip;
The DC/DC translation circuit, comprising: DC/DC converts chip;
The second end of the first inductance L1 is connected with the first end of insurance resistance F, the second end point of the insurance resistance F
Not with the first end of first capacitor C1, the first end of the second capacitor C2, the drain electrode of the second metal-oxide-semiconductor Q2, first resistor R1 first
End, the first end of second resistance R2, the first end of 3rd resistor R3 are connected, the second end of the first capacitor C1 and described second
The second end of capacitor C2 is grounded;
The grid of the second metal-oxide-semiconductor Q2 is connected with the output pin (OUT pin) of DC/DC transformation chip U1, institute
The source electrode for stating the second metal-oxide-semiconductor Q2 is connected with the first end of the second inductance L2, the first resistor R1 second end and the 5th diode
The cathode of D5 is connected, and the anode of the 5th diode D5 is connected with the cathode of the first zener diode W1, first pressure stabilizing
The plus earth of diode W1;
Energization pins (VCC pin) phase of the second end of the second resistance R2 and the power factor regulation chip U2
Even, the second end of the 3rd resistor R3 is connected with the input pin (MULTI pin) of the power factor regulation chip U2;The
The first end of four resistance R4 is connected with the input pin (MULTI pin) of rate factor adjustment chip U2, the 4th resistance R4's
Second end ground connection, the first end of third capacitor C3 are connected with the input pin (MULTI pin) of rate factor adjustment chip U2,
The second end of the third capacitor C3 is grounded, and the first end of the 4th capacitor C4 and the power supply of the power factor regulation chip U2 are drawn
Foot (VCC pin) is connected, and the second end ground connection of the 4th capacitor C4, the current detecting of the power factor regulation chip U2 is drawn
Foot (CS pin) is connected with the first end of the 5th resistance R5, the second end of the 5th resistance R5 respectively with the 6th resistance R6
One end, the first end of the 7th resistance R7, the first end of the 8th resistance R8 are connected, the second end ground connection of the 6th resistance R6, institute
State the second end ground connection of the 7th resistance R7, the second end of the 8th resistance R8 and respectively first end, the third of the 9th resistance R9
The grid of metal-oxide-semiconductor Q3 is connected, and the second end of the 9th resistance R9 and the gate driving of the power factor regulation chip U2 are drawn
Foot (GD pin) is connected, and the source electrode of the third metal-oxide-semiconductor Q3 is connected with the first end of the 7th resistance R7, the 3rd MOS
The drain electrode of pipe Q3 is connected with the second end of the second inductance L2, and (ZCO draws the zero passage pin of the power factor regulation chip U2
Foot) it is connected with the first end of the tenth resistance R10, the first end of the second end of the tenth resistance R10 and eleventh resistor R11,
The first end of 5th capacitor C5 is connected, and the second end of the eleventh resistor R11 is connected with the anode of the 5th diode D5,
The second end of the 5th capacitor C5 is connected with the input pin (VIN pin) of DC/DC transformation chip U1, the 5th electricity
Hold the first end ground connection of C5, the output pin (COMP pin) of the power factor regulation chip U2 is respectively with the 6th capacitor C6's
First end, the first end of the 7th capacitor C7 are connected, the second end and the first end phase of twelfth resistor R12 of the 6th capacitor C6
Even, the second end of the twelfth resistor R12 converts chip U1 with the second end of the 7th capacitor C7, the DC/DC respectively
Feedback pin (FB pin) be connected;
The feedback pin (FB pin) of DC/DC transformation chip U1 respectively with the first end of the thirteenth resistor R13,
The first end of 14th resistance R14 is connected;The second end phase of the second end of the thirteenth resistor R13 and the second inductance L2
Even, the second end ground connection of the 14th resistance R14, the plus earth of the second zener diode W2, two pole of the second pressure stabilizing
The cathode of pipe W2 is connected with the first end of the second inductance L2, the first end ground connection of the 8th capacitor C8, the 8th capacitor C8
Second end be connected with the second end of the second inductance L2.
In the utility model embodiment, power factor regulation chip can be realized by chip UCC28019.
DC/DC transformation chip can be realized by chip LM2576D2T-5.
First capacitor C1 can be polarized capacitor, and anode is connected with the second end of insurance resistance F, cathode ground connection.5th
Capacitor C5 can be polarized capacitor, and anode is connected with the input pin (VIN pin) of DC/DC transformation chip U1, cathode ground connection.
8th capacitor C8 can be polarized capacitor, and anode is connected with the second end of the second inductance L2, cathode ground connection.
DC/DC converts the ON/OFF pin ground connection in chip.
In an embodiment of the utility model, the full bridge inverter, comprising:
The first end of the first side of transformer T respectively with the anode of third zener diode W3, the 4th zener diode W4
Cathode, the first end of the 15th resistance R15, the first end of the 9th capacitor C9, the 4th metal-oxide-semiconductor Q4 source electrode, the 5th metal-oxide-semiconductor Q5
Drain electrode be connected;
The second end of the first side of transformer T respectively with the anode of the 5th zener diode W5, the 6th zener diode W6
Cathode, the first end of the 16th resistance R16, the first end of the tenth capacitor C10, the 6th metal-oxide-semiconductor Q6 source electrode, the 7th metal-oxide-semiconductor
The drain electrode of Q7 is connected;
The cathode of the third zener diode W3 is connected with the second end of the second inductance L2, the 4th pressure stabilizing two
The second end of the plus earth of pole pipe W4, the 15th resistance R15 is connected with the first end of the 11st capacitor C11, and described
The second end of 11 capacitor C11 is grounded, and the second end of the 9th capacitor C9 is connected with the first end of the 17th resistance R17, institute
The second end for stating the 17th resistance R17 is connected with the second end of the second inductance L2, the grid of the 4th metal-oxide-semiconductor Q4 and institute
The first end for stating matching network is connected, and the drain electrode of the 4th metal-oxide-semiconductor Q4 is connected with the second end of the second inductance L2, described
The grid of 5th metal-oxide-semiconductor Q5 is connected with the second end of the matching network, the source electrode ground connection of the 5th metal-oxide-semiconductor Q5;
The cathode of the 5th zener diode W5 is connected with the second end of the second inductance L2, the 6th pressure stabilizing two
The second end of the plus earth of pole pipe W6, the 16th resistance R16 is connected with the first end of the 12nd capacitor C12, and described
The second end of 12 capacitor C12 is grounded, and the second end of the tenth capacitor C10 is connected with the first end of the 18th resistance R18, institute
The second end for stating the 18th resistance R18 is connected with the second end of the second inductance L2, the grid of the 6th metal-oxide-semiconductor Q6 and institute
The third end for stating matching network is connected, and the drain electrode of the 6th metal-oxide-semiconductor Q6 is connected with the second end of the second inductance L2, described
The grid of 7th metal-oxide-semiconductor Q7 is connected with the 4th end of the matching network, the source electrode ground connection of the 7th metal-oxide-semiconductor Q7;
The first end of second side of the transformer T is connected with the first end of crystal oscillator Y, the second end of the crystal oscillator Y and the
The first end of three inductance L3 is connected, the second end of second side of the second end and transformer T of the third inductance L3.
First metal-oxide-semiconductor Q1, the second metal-oxide-semiconductor Q2, third metal-oxide-semiconductor Q3, the 4th metal-oxide-semiconductor Q4, the 5th metal-oxide-semiconductor Q5, the 6th metal-oxide-semiconductor
Q6, the 7th metal-oxide-semiconductor Q7 can use P-channel metal-oxide-semiconductor.
As shown in Fig. 2, the utility model embodiment provides a kind of circuit diagram of power factor regulation unit.It is shown in figure
Current rectifying and wave filtering circuit, power factor regulation circuit, DC/DC translation circuit and full bridge inverter, and corresponding adaptation electricity
Road.
In an embodiment of the utility model, the matching network, comprising:
First output of the high-end input pin (HIN pin) and the load impedance tracking cell of the first driving chip U3
End is connected, and the high-end input pin (HIN pin) of the first driving chip U3 draws with the low side input of the second driving chip U4
Foot (LIN pin) is connected;
Second output of the high-end input pin (HIN pin) and the load impedance tracking cell of the second driving chip U4
End is connected, and the high-end input pin (HIN pin) of the second driving chip U4 draws with the low side input of the first driving chip U3
Foot (LIN pin) is connected;
The first end of 19th resistance R19 is connected with the low side input pin of the first driving chip U3, and the described tenth
The second end of nine resistance R19 is connected with the first end of the 20th resistance R20, the second end of the 20th resistance R20 with it is described
The low side input pin of second driving chip U4 is connected, the second termination first voltage of the 19th resistance R19;
First end and institute of the high-end output pin (HO pin) of the first driving chip U3 as the matching network
It states power factor regulation unit to be connected, the low side output pin (LO pin) of the first driving chip U3 is used as the pair net
The second end of network is connected with the power factor regulation unit;
The high-end floating power pin (VB pin) of the first driving chip U3 is connected with the cathode of the 6th diode D6,
The anode of the 6th diode D6 connects second voltage;The high-end floating power feedback pin (VS of the first driving chip U3
Pin) it is connected with the ultrasonic transducer, the low side feedback pin (COM pin) of the first driving chip U3 connects third electricity
Pressure;The low side energization pins (VCC pin) of the first driving chip U3 connect the second voltage;The anode of 7th diode D7
It is connected with the high-end floating power feedback pin (VS pin) of the first driving chip U3, the cathode of the 7th diode D7
It is connected with the high-end output pin (HO pin) of the first driving chip U3;The plus earth of 8th diode D8, the eight or two
The cathode of pole pipe D8 is connected with the low side output pin (LO pin) of the first driving chip U3;The of 13rd capacitor C13
One end is connected with the high-end floating power feedback pin (VS pin) of the first driving chip U3, the 13rd capacitor C13
Second end be connected with the high-end floating power pin (VB pin) of the first driving chip U3;The of 14th capacitor C14
One end is connected with the low side energization pins (VCC pin) of the first driving chip U3, the second end of the 14th capacitor C14
Connect the tertiary voltage;
Third end and institute of the high-end output pin (HO pin) of the second driving chip U4 as the matching network
It states power factor regulation unit to be connected, the low side output pin (LO pin) of the second driving chip U4 is used as the pair net
4th end of network is connected with the power factor regulation unit;
The high-end floating power pin (VB pin) of the second driving chip U4 is connected with the cathode of the 9th diode D9,
The anode of the 9th diode D9 connects the second voltage;The high-end floating power feedback pin of the second driving chip U4
(VS pin) is connected with the ultrasonic transducer, and the low side feedback pin (COM pin) of the second driving chip U4 meets institute
State tertiary voltage;The low side energization pins (VCC pin) of the second driving chip U4 connect the second voltage;Tenth diode
The anode of D10 is connected with the high-end floating power feedback pin (VS pin) of the second driving chip U4, the 12nd pole
The cathode of pipe D10 is connected with the high-end output pin (HO pin) of the second driving chip U4;11st diode D11 is just
Pole ground connection, the cathode of the 11st diode D11 are connected with the low side output pin (LO pin) of the second driving chip U4;The
The first end of 15 capacitor C15 is connected with the high-end floating power feedback pin (VS pin) of the second driving chip U4, institute
The second end for stating the 15th capacitor C15 is connected with the high-end floating power pin (VB pin) of the second driving chip U4;The
The first end of 16 capacitor C16 is connected with the low side energization pins (VCC pin) of the second driving chip U4, and the described 16th
The second termination tertiary voltage of capacitor C16.
In the utility model embodiment, the first driving chip can be realized by chip I R2113, the second driving core
Piece can be realized by chip I R2113.
First voltage can be+3.3v, and second voltage can be+12v, and tertiary voltage can be -12v.
In addition, the VSS pin of the first driving chip connects tertiary voltage, the VDD pin of the first driving chip connects second voltage.
The VSS pin of second driving chip connects tertiary voltage, and the VDD pin of the second driving chip connects second voltage.
The size of 19th resistance R19 can be 10k Ω, and the size of the 20th resistance R20 can be 10k Ω.
As shown in figure 3, a kind of circuit diagram of matching network provided by the embodiment of the utility model.
In an embodiment of the utility model, the load impedance tracking cell, comprising:
Acquisition Circuit and load impedance handle chip;
The Acquisition Circuit is acquired in real time for the current demand signal waveform to the ultrasonic transducer, will be acquired
To the current demand signal waveform be sent to load impedance processing chip;
The load impedance handles chip, for determining that the ultrasonic transducer is corresponding according to the current demand signal waveform
Present load impedance, according to the present load impedance is determining and the current resonance frequency of the ultrasonic transducer matches
Target frequency, control the matching network to the ultrasonic transducer output frequency be the target frequency pulse telecommunications
Number.
In the utility model embodiment, load impedance tracking cell carries out the load impedance of ultrasonic transducer real-time
Tracking determines frequency, duty ratio, voltage and and the time control of ultrasonic power by the load impedance of ultrasonic transducer in real time
The output for making these parameters keeps whole system in optimal working condition, makes ultrasonic power and ultrasonic transducer phase
Match, improves the working efficiency of ultrasonic transducer.
In an embodiment of the utility model, the Acquisition Circuit, comprising:
The input terminal of filter U5 is connected with the ultrasonic transducer, the output end of the filter U5 and the 17th electricity
The first end for holding C17 is connected, and the second end of the 17th capacitor C17 is connected with the first end of the 21st resistance R21, described
The second end of the 21st resistance R21 homophase input with the first end of the 18th capacitor C18, the first operational amplifier U6 respectively
End is connected, the second end of the 18th capacitor C18 ground connection, and the output end of the first operational amplifier U6 is respectively with described the
Inverting input terminal, the non-inverting input terminal of second operational amplifier U7 of one operational amplifier U6 is connected, second operation amplifier
The reverse inter-input-ing ending grounding of device U7, the output end of the second operational amplifier U7 and load impedance processing chip U10's
First input end is connected;
The first end of 22nd resistance R22 is connected with the ultrasonic transducer, and the of the 22nd resistance R22
Two ends are connected with the first end of the 23rd resistance R23, the first end of the 19th capacitor C19 respectively, the 23rd resistance R23's
Second end ground connection, the second end of the 19th capacitor C19 are connected with the first end of the 24th resistance R24, and the described 20th
The second end of the four resistance R24 non-inverting input terminal phase with the first end of the 20th capacitor C20, third operational amplifier U8 respectively
Even, the second end ground connection of the 20th capacitor C20, the output end of the third operational amplifier U8 are transported with the third respectively
Calculate the inverting input terminal of amplifier U8, the non-inverting input terminal of four-operational amplifier U9 is connected, the four-operational amplifier U9
Reverse inter-input-ing ending grounding, the second of the output end of the four-operational amplifier U9 and load impedance processing chip U10
Input terminal is connected.
In the utility model embodiment, the size of the 17th capacitor C17 can be 0.1uf, and the 18th capacitor C18's is big
Small can be 0.33uf, and the size of the 19th capacitor C19 can be 0.1uf, and the size of the 20th capacitor C20 can be
0.33uf。
The size of 21st resistance R21 can be 51k Ω, and the size of the 22nd resistance R22 can be 300k Ω, the
The size of 23 resistance R23 can be 2.5k Ω, and the size of the 24th resistance R24 can be 51k Ω.
Load impedance processing chip can be realized by ARM, specifically, can by chip STM32F103VET6 come
It realizes.
As shown in figure 4, a kind of circuit diagram of load impedance tracking cell provided by the embodiment of the utility model, shown in figure
Acquisition Circuit and load impedance handle chip U10.
In addition, the VCC pin of filter is connected with the first end of the 21st capacitor C21, the of the 21st capacitor C21
Two ends ground connection, the VCC pin of filter connect+5v voltage.The FILTER pin of filter and the first end of the 22nd capacitor C22
It is connected, the second end ground connection of the 22nd capacitor C22.
The size of 21st capacitor C21 can be 0.33f, and the size of the 22nd capacitor C22 can be 1nf.
In the utility model embodiment, what load impedance processing chip was exported to matching network is used to control pulse telecommunications
The control signal of number frequency can be PWM (Pulse WidthModulation, pulse width modulation) signal.Such as this is used for
The control signal for controlling pulse electrical signal frequency includes the first pwm signal and the second pwm signal, wherein the first pwm signal is by bearing
The first output end for carrying impedance processing chip, which is exported to the high-end input pin of the first driving chip U3 (HIN pin) and second, to be driven
The low side input pin (LIN) of dynamic chip U4, the second pwm signal are exported by the second output terminal of load impedance processing chip to the
The high-end input pin (HIN pin) of two driving chip U4 and the low side input pin (LIN) of the first driving chip U4.This is used for
The control signal of control pulse electrical signal frequency makes match circuit output frequency be the pulse electrical signal of target frequency.
In an embodiment of the utility model, the load impedance handles chip, described according to the current letter executing
When number waveform determines the ultrasonic transducer corresponding present load impedance, it is specifically used for:
Fourier transformation is carried out to the current demand signal waveform of Acquisition Circuit input, obtains the of Fourier transformation
One result;
Digital filtering processing is carried out to first result, the harmonic frequency components in first result is filtered out, obtains number
The second result after filtering processing;
According to described second as a result, determining the corresponding present load impedance of the ultrasonic transducer.
In the utility model embodiment, current demand signal waveform may include voltage signal, current signal.Specifically, may be used
To acquire current signal by the input terminal of filter, pass through the first end collection voltages signal of the 22nd resistance R22.
In the utility model embodiment, by carrying out Fourier transformation to collected current demand signal waveform, then carry out
Frequency point extracts, and effectively ensures precision, keeps the frequency captured more acurrate.
The current demand signal waveform of ultrasonic transducer includes the current flow signal waveform of ultrasonic transducer, ultrasonic waves
The current voltage waveform of energy device.
In an embodiment of the utility model, ultrasonic power further comprises: display unit;
The display unit is connected with the load impedance tracking cell;
The load impedance tracking cell is further used for determining the current working status of ultrasonic power, control in real time
The display unit shows the current working status of the ultrasonic power.
In the utility model embodiment, display unit can handle chip with load impedance and be connected, and show load impedance
The content that processing chip is sent.
The each embodiment of the utility model at least has the following beneficial effects:
1, in the utility model embodiment, power factor regulation unit provides pulse electrical signal, pulse to matching network
After matching network, driving ultrasonic transducer work, matching network matches with ultrasonic transducer, ensure that electric signal
The stable output power of ultrasonic transducer is in a higher level, in addition, load impedance tracking cell can be in real time to super
Acoustic wave transducer is tracked, and is adjusted according to frequency of the state of ultrasonic transducer to pulse electrical signal, so that pulse
The frequency of electric signal and the current resonance frequency of ultrasonic transducer match, and further improve the output of ultrasonic transducer
Power.
2, in the utility model embodiment, power factor regulation circuit can be carried out the power factor of pulse electrical signal
Adjustment, increase power factor improve the utilization rate of the alternating current of input, reduce the electricity in route in total current and power supply system
Gas element, such as the capacity of transformer, electrical equipment, conducting wire, reduce investment cost, and reduce the loss of electric energy, subtract
The loss of voltage in few power supply system, can make load voltage more stable, improve the quality of electric energy, can increase the abundant of system
Degree, has excavated the potentiality of power supply equipment.
3, in the utility model embodiment, load impedance tracking cell carries out the load impedance of ultrasonic transducer real
When track, by the load impedance of ultrasonic transducer, determine the frequency of ultrasonic power, duty ratio, voltage and timely in real time
The output for controlling these parameters keeps whole system in optimal working condition, makes ultrasonic power and ultrasonic transducer phase
Matching, improves the working efficiency of ultrasonic transducer.
Finally, it should be noted that above embodiments are only to illustrate the technical solution of the utility model, rather than its limitations;
Although the utility model is described in detail with reference to the foregoing embodiments, those skilled in the art should understand that:
It is still possible to modify the technical solutions described in the foregoing embodiments, or part of technical characteristic is carried out etc.
With replacement;And these are modified or replaceed, various embodiments of the utility model technology that it does not separate the essence of the corresponding technical solution
The spirit and scope of scheme.
Claims (9)
1. a kind of ultrasonic power characterized by comprising
Power factor regulation unit, matching network and load impedance tracking cell;
The power factor regulation unit, is connected with the matching network, for the alternating current of input to be converted to pulse telecommunications
Number output to the matching network;
The matching network is connect with ultrasonic transducer, for exporting the pulse electrical signal after power amplification to the ultrasound
Wave transducer;
The load impedance tracking cell, is connected with the ultrasonic transducer and the matching network, for the ultrasound
The current demand signal waveform of wave transducer is acquired in real time, and by the control signal for being used to control pulse electrical signal frequency of generation
It is sent to the matching network.
2. ultrasonic power according to claim 1, which is characterized in that
The power factor regulation unit, comprising: current rectifying and wave filtering circuit, DC/DC translation circuit, power factor regulation circuit and complete
Bridge inverter circuit;
The current rectifying and wave filtering circuit is connected with the DC/DC translation circuit, for that will carry out rectifying and wave-filtering to the alternating current of input
The direct current electricity output generated afterwards gives the DC/DC translation circuit;
The DC/DC translation circuit is connected with the full bridge inverter, for the direct current electricity output after converting the voltage into institute
State full bridge inverter;
The full bridge inverter is connected with the matching network, the direct current for will input to the DC/DC translation circuit
The pulse electrical signal generate after inversion processing is exported to the matching network;
The power factor regulation circuit is connected with the DC/DC translation circuit, for that will adjust the pulse electrical signal power
The control signal of factor is sent to the DC/DC translation circuit.
3. ultrasonic power according to claim 2, which is characterized in that
The current rectifying and wave filtering circuit, comprising:
The drain electrode of first metal-oxide-semiconductor connects the first end of alternating current, and the first metal-oxide-semiconductor source electrode is connected with the anode of first diode,
The cathode of the first diode is connected with the anode of the first end of the first inductance and the second diode respectively, the two or two pole
The cathode of pipe is connected with the cathode of the second end of the alternating current and third diode respectively, and the anode of the third diode connects
Ground, the cathode ground connection of the 4th diode, the anode of the 4th diode are connected with the first end of the alternating current.
4. ultrasonic power according to claim 3, which is characterized in that
The power factor regulation circuit, comprising: power factor regulation chip;
The DC/DC translation circuit, comprising: DC/DC converts chip;
The second end of first inductance is connected with the first end of insurance resistance, and the second end for insuring resistance is respectively with first
The first end of capacitor, the first end of the second capacitor, the drain electrode of the second metal-oxide-semiconductor, the first end of first resistor, second resistance first
End, the first end of 3rd resistor are connected, the second end ground connection of the second end of the first capacitor and second capacitor;
The grid of second metal-oxide-semiconductor is connected with the output pin of DC/DC transformation chip, the source electrode of second metal-oxide-semiconductor
It is connected with the first end of the second inductance, the second end of the first resistor is connected with the cathode of the 5th diode, and the described 5th 2
The anode of pole pipe is connected with the cathode of the first zener diode, the plus earth of first zener diode;
The second end of the second resistance is connected with the energization pins of the power factor regulation chip, and the of the 3rd resistor
Two ends are connected with the input pin of the power factor regulation chip;The first end of 4th resistance and the rate factor adjust chip
Input pin be connected, the second end of the 4th resistance ground connection, the first end of third capacitor and the rate factor adjust the defeated of chip
Enter pin to be connected, the second end ground connection of the third capacitor, the first end of the 4th capacitor and the power factor regulation chip
Energization pins are connected, the second end of the 4th capacitor ground connection, the current detecting pin of the power factor regulation chip and the
The first ends of five resistance is connected, the second end of the 5th resistance respectively with the first end of the 6th resistance, the 7th resistance first
End, the first end of the 8th resistance are connected, the second end ground connection of the 6th resistance, the second end ground connection of the 7th resistance, institute
It states the second end of the 8th resistance to be connected with the first end of the 9th resistance respectively, the grid of third metal-oxide-semiconductor, the of the 9th resistance
Two ends are connected with the gate driving pin of the power factor regulation chip, the source electrode of the third metal-oxide-semiconductor and the 7th electricity
The first end of resistance is connected, and the drain electrode of the third metal-oxide-semiconductor is connected with the second end of second inductance, the power factor regulation
The zero passage pin of chip is connected with the first end of the tenth resistance, and the first of the second end of the tenth resistance and eleventh resistor
End, the first end of the 5th capacitor are connected, and the second end of the eleventh resistor is connected with the anode of the 5th diode, described
The second end of 5th capacitor is connected with the input pin of DC/DC transformation chip, the first end ground connection of the 5th capacitor, institute
The output pin for stating power factor regulation chip is connected with the first end of the 6th capacitor, the first end of the 7th capacitor respectively, described
The second end of 6th capacitor is connected with the first end of twelfth resistor, and the second end of the twelfth resistor is respectively with the described 7th
The second end of capacitor, the feedback pin of DC/DC transformation chip are connected;
The feedback pin of the DC/DC transformation chip first end phase with the first end of thirteenth resistor, the 14th resistance respectively
Even;The second end of the thirteenth resistor is connected with the second end of second inductance, the second termination of the 14th resistance
Ground, the plus earth of the second zener diode, the first end phase of the cathode of second zener diode and second inductance
Even, the first end ground connection of the 8th capacitor, the second end of the 8th capacitor are connected with the second end of second inductance.
5. ultrasonic power according to claim 4, which is characterized in that
The full bridge inverter, comprising:
The first end of first side of transformer respectively with the anode of third zener diode, the cathode of the 4th zener diode,
The first end of 15 resistance, the first end of the 9th capacitor, the 4th metal-oxide-semiconductor source electrode, the 5th metal-oxide-semiconductor drain electrode be connected;
The second end of first side of transformer respectively with the anode of the 5th zener diode, the cathode of the 6th zener diode,
The first end of 16 resistance, the first end of the tenth capacitor, the 6th metal-oxide-semiconductor source electrode, the 7th metal-oxide-semiconductor drain electrode be connected;
The cathode of the third zener diode is connected with the second end of second inductance, and the 4th zener diode is just
Pole ground connection, the second end of the 15th resistance are connected with the first end of the 11st capacitor, the second end of the 11st capacitor
Ground connection, the second end of the 9th capacitor are connected with the first end of the 17th resistance, the second end of the 17th resistance and institute
The second end for stating the second inductance is connected, and the grid of the 4th metal-oxide-semiconductor is connected with the first end of the matching network, and the described 4th
The drain electrode of metal-oxide-semiconductor is connected with the second end of second inductance, the grid of the 5th metal-oxide-semiconductor and the second of the matching network
End is connected, the source electrode ground connection of the 5th metal-oxide-semiconductor;
The cathode of 5th zener diode is connected with the second end of second inductance, and the 6th zener diode is just
Pole ground connection, the second end of the 16th resistance are connected with the first end of the 12nd capacitor, the second end of the 12nd capacitor
Ground connection, the second end of the tenth capacitor are connected with the first end of the 18th resistance, the second end of the 18th resistance and institute
The second end for stating the second inductance is connected, and the grid of the 6th metal-oxide-semiconductor is connected with the third end of the matching network, and the described 6th
The drain electrode of metal-oxide-semiconductor is connected with the second end of second inductance, the grid of the 7th metal-oxide-semiconductor and the 4th of the matching network
End is connected, the source electrode ground connection of the 7th metal-oxide-semiconductor;
The first end of second side of the transformer is connected with the first end of crystal oscillator, second end and the third inductance of the crystal oscillator
First end is connected, the second end of second side of the second end and transformer of the third inductance.
6. ultrasonic power according to claim 1, which is characterized in that
The matching network, comprising:
The high-end input pin of first driving chip is connected with the first output end of the load impedance tracking cell, and described first
The high-end input pin of driving chip is connected with the low side input pin of the second driving chip;
The high-end input pin of second driving chip is connected with the second output terminal of the load impedance tracking cell, and described second
The high-end input pin of driving chip is connected with the low side input pin of the first driving chip;
The first end of 19th resistance is connected with the low side input pin of first driving chip, and the of the 19th resistance
Two ends are connected with the first end of the 20th resistance, and the second end of the 20th resistance and the low side of second driving chip are defeated
Enter pin to be connected, the second termination first voltage of the 19th resistance;
First end and the power factor regulation of the high-end output pin of first driving chip as the matching network
Unit is connected, second end and the power factor of the low side output pin of first driving chip as the matching network
Unit is adjusted to be connected;
The high-end floating power pin of first driving chip is connected with the cathode of the 6th diode, the 6th diode
Anode connects second voltage;The high-end floating power feedback pin of first driving chip is connected with the ultrasonic transducer,
The low side feedback pin of first driving chip connects tertiary voltage;The low side energization pins of first driving chip connect described
Second voltage;The anode of 7th diode is connected with the high-end floating power feedback pin of first driving chip, and described the
The cathode of seven diodes is connected with the high-end output pin of first driving chip;The plus earth of 8th diode, the 8th
The cathode of diode is connected with the low side output pin of first driving chip;The first end of 13rd capacitor and described first
The high-end floating power feedback pin of driving chip is connected, second end and first driving chip of the 13rd capacitor
High-end floating power pin is connected;The first end of 14th capacitor is connected with the low side energization pins of first driving chip,
The second termination tertiary voltage of the 14th capacitor;
Third end and the power factor regulation of the high-end output pin of second driving chip as the matching network
Unit is connected, fourth end and the power factor of the low side output pin of second driving chip as the matching network
Unit is adjusted to be connected;
The high-end floating power pin of second driving chip is connected with the cathode of the 9th diode, the 9th diode
Anode connects the second voltage;The high-end floating power feedback pin of second driving chip and the ultrasonic transducer phase
Even, the low side feedback pin of second driving chip connects the tertiary voltage;The low side power supply of second driving chip is drawn
Foot connects the second voltage;The high-end floating power feedback pin phase of the anode and second driving chip of tenth diode
Even, the cathode of the tenth diode is connected with the high-end output pin of second driving chip;11st diode is just
Pole ground connection, the cathode of the 11st diode are connected with the low side output pin of second driving chip;The of 15th capacitor
One end is connected with the high-end floating power feedback pin of second driving chip, the second end of the 15th capacitor with it is described
The high-end floating power pin of second driving chip is connected;The low side of the first end of 16th capacitor and second driving chip
Energization pins are connected, the second termination tertiary voltage of the 16th capacitor.
7. ultrasonic power according to claim 1, which is characterized in that
The load impedance tracking cell, comprising:
Acquisition Circuit and load impedance handle chip;
The Acquisition Circuit is acquired in real time for the current demand signal waveform to the ultrasonic transducer, will be collected
The current demand signal waveform is sent to the load impedance processing chip;
The load impedance handles chip, is connected with the Acquisition Circuit and matching network, and being used for will be according to the current demand signal
The control signal for controlling pulse electrical signal frequency that waveform generates is sent to the matching network.
8. ultrasonic power according to claim 7, which is characterized in that
The Acquisition Circuit, comprising:
The input terminal of filter is connected with the ultrasonic transducer, and the first of the output end of the filter and the 17th capacitor
End is connected, and the second end of the 17th capacitor is connected with the first end of the 21st resistance, and the of the 21st resistance
Two ends are connected with the first end of the 18th capacitor, the non-inverting input terminal of the first operational amplifier respectively, the 18th capacitor
Second end ground connection, the output end of first operational amplifier respectively with the inverting input terminal of first operational amplifier, the
The non-inverting input terminal of two operational amplifiers is connected, the reverse inter-input-ing ending grounding of the second operational amplifier, second operation
The output end of amplifier is connected with the first input end of load impedance processing chip;
The first end of 22nd resistance is connected with the ultrasonic transducer, the second end of the 22nd resistance respectively with
First end, the first end of the 19th capacitor of 23rd resistance are connected, the second end ground connection of the 23rd resistance, and the described tenth
The second end of nine capacitors is connected with the first end of the 24th resistance, and the second end of the 24th resistance is respectively with the 20th
The first end of capacitor, the non-inverting input terminal of third operational amplifier are connected, the second end ground connection of the 20th capacitor, and described the
The output end of three operational amplifiers respectively with the inverting input terminal of the third operational amplifier, the same phase of four-operational amplifier
Input terminal is connected, the reverse inter-input-ing ending grounding of the four-operational amplifier, the output end of the four-operational amplifier and institute
The second input terminal for stating load impedance processing chip is connected.
9. any ultrasonic power in -8 according to claim 1, which is characterized in that
Further comprise: display unit;
The display unit is connected with the load impedance tracking cell, for showing the work at present shape of the ultrasonic power
State.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201821133677.2U CN208548831U (en) | 2018-07-16 | 2018-07-16 | A kind of ultrasonic power |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201821133677.2U CN208548831U (en) | 2018-07-16 | 2018-07-16 | A kind of ultrasonic power |
Publications (1)
Publication Number | Publication Date |
---|---|
CN208548831U true CN208548831U (en) | 2019-02-26 |
Family
ID=65424795
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201821133677.2U Active CN208548831U (en) | 2018-07-16 | 2018-07-16 | A kind of ultrasonic power |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN208548831U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108649788A (en) * | 2018-07-16 | 2018-10-12 | 哈尔滨天达控制股份有限公司 | A kind of ultrasonic power |
-
2018
- 2018-07-16 CN CN201821133677.2U patent/CN208548831U/en active Active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108649788A (en) * | 2018-07-16 | 2018-10-12 | 哈尔滨天达控制股份有限公司 | A kind of ultrasonic power |
CN108649788B (en) * | 2018-07-16 | 2024-03-26 | 哈尔滨天达控制股份有限公司 | Ultrasonic power supply |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN102520241B (en) | Three-phase charge-controlled electric energy meter based on resistance-capacitance voltage reduction and low-voltage direct-current/direct-current (DC/DC) power supply | |
CN108649788A (en) | A kind of ultrasonic power | |
CN205081705U (en) | Hierarchical supersound plastic welding power of pressure regulating frequency conversion | |
CN209030101U (en) | A kind of energy back feed device based on Boost flyback booster circuit | |
CN105226984A (en) | The ultrasonic plastic tool power supply of pressure regulation frequency conversion grading control | |
CN104901333A (en) | Three-phase inverter without parallel signal interconnection lines and carrier signal synchronizing method thereof | |
CN106452102B (en) | A kind of frequency converter | |
CN208548831U (en) | A kind of ultrasonic power | |
CN206211874U (en) | A kind of high-frequency inverter and its short-circuit protection circuit | |
Elnaghi et al. | Development and implementation of two-stage boost converter for single-phase inverter without transformer for PV systems. | |
CN103001579B (en) | Direct-current active filter based on bidirectional DC-DC (direct current to direct current) converter | |
CN201726309U (en) | Power mosfet power factor corrector | |
CN111446874A (en) | Single-phase boost common-mode inverter and modulation method thereof | |
CN108696161A (en) | One kind being suitable for the mass spectrometric radio-frequency power supply circuit of level four bars | |
CN109217689A (en) | Single-phase step-up circuit and universal frequency converter | |
CN101860318A (en) | Alternating current governing system for twin-stage matrix converter having anti-losing capability | |
CN105098781A (en) | Hybrid type active power filter compensation system used for three-phase network | |
CN206024180U (en) | A kind of LED lamp tube power driving circuit | |
CN208548830U (en) | A kind of power factor regulation unit of ultrasonic power | |
CN107482930A (en) | A kind of double inductance twin voltage DC output circuits | |
CN208461785U (en) | A kind of load impedance tracking cell of ultrasonic power | |
CN205844375U (en) | A kind of high voltage pulse generation device for Cable fault examination | |
CN103441665B (en) | A kind of method that crisscross parallel type power factor correcting is controlled | |
CN209001859U (en) | A kind of variable-frequency power sources based on photovoltaic power generation | |
CN208369489U (en) | A kind of isolated adjustable three phase inverter |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant |