CN106298536B - Rf-ldmos semiconductor and its manufacturing method - Google Patents
Rf-ldmos semiconductor and its manufacturing method Download PDFInfo
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- CN106298536B CN106298536B CN201510319622.5A CN201510319622A CN106298536B CN 106298536 B CN106298536 B CN 106298536B CN 201510319622 A CN201510319622 A CN 201510319622A CN 106298536 B CN106298536 B CN 106298536B
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 37
- 238000004519 manufacturing process Methods 0.000 title abstract description 5
- 239000000758 substrate Substances 0.000 claims abstract description 76
- 238000000034 method Methods 0.000 claims abstract description 31
- 238000005530 etching Methods 0.000 claims abstract description 24
- 239000002184 metal Substances 0.000 claims description 31
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 16
- 229920002120 photoresistant polymer Polymers 0.000 claims description 12
- 238000001312 dry etching Methods 0.000 claims description 11
- 239000000377 silicon dioxide Substances 0.000 claims description 8
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 6
- 229910044991 metal oxide Inorganic materials 0.000 claims description 5
- 150000004706 metal oxides Chemical class 0.000 claims description 5
- 238000009792 diffusion process Methods 0.000 claims description 4
- 235000012239 silicon dioxide Nutrition 0.000 claims description 4
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 3
- 230000015572 biosynthetic process Effects 0.000 claims description 2
- 230000003628 erosive effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 15
- 150000002500 ions Chemical class 0.000 description 12
- 229920005591 polysilicon Polymers 0.000 description 3
- 239000000243 solution Substances 0.000 description 3
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 238000000151 deposition Methods 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66681—Lateral DMOS transistors, i.e. LDMOS transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
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- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
The present invention relates to a kind of rf-ldmos semiconductor and its manufacturing methods, wherein method includes: by body area to be generated, source region, the region of the dense substrate of drift region and drain region performs etching, form trench region, lightly doped epitaxial layer is grown in trench region, ion implanting is carried out to lightly doped epitaxial layer, generate body area, source region, drain region and drift region, the source region positioned at dense substrate top is allowed directly to guide the bottom of dense substrate by dense substrate, reduce the resistance between the positive back side of rf-ldmos semiconductor, to reduce the conducting resistance of rf-ldmos semiconductor, improve the performance of rf-ldmos semiconductor.
Description
Technical field
The present invention relates to technical field of semiconductors more particularly to a kind of rf-ldmos semiconductor and
Its manufacturing method.
Background technique
Rf-ldmos semiconductor (Radio Frequency Laterally Diffused
Metal Oxide Semiconductor, RF LDMOS) it is different from the most typically feature of other power devices, it is its source electrode
It draws from the back side, can be improved in this way to avoid binding line (Bond wires) bring source electrode parasitic inductance when encapsulating
RFLDMOS operating rate.In traditional handicraft, the method that source electrode is drawn from the back side, generally by the injection of large dosage of big energy,
Then it is promoted by long-time high temperature, allows ion penetration epitaxial layer to the dense substrate of lower layer, formation sinking layer will by sinking layer
Positive source region guides the back side into.
However in traditional handicraft, positive source region into is guided in the back side using the method that long-time high temperature promotes, causes just to carry on the back
Resistance between face increases, and improves the conducting resistance of device, reduces the performance of device.
Summary of the invention
The present invention provides a kind of rf-ldmos semiconductor and its manufacturing method, existing for solving
The conducting resistance of rf-ldmos semiconductor is high in technology, the problem of performance difference.
The first aspect of the invention is to provide a kind of rf-ldmos method for making semiconductor,
Include:
The deposited hard mask on dense substrate forms hard mask layer；
The hard mask layer is performed etching using dry etching method, removes adult area, source region, drift region and drain region to be generated
The dense substrate on hard mask；
The region of the dense substrate in body area to be generated, source region, drift region and drain region is performed etching, trench area is formed
Domain；
Lightly doped epitaxial layer is grown in the trench region；
The hard mask layer is removed using dry etching method, grows gate oxide in the lightly doped epitaxial layer；
The gate oxide is performed etching, formed grid region, by the grid region to the lightly doped epitaxial layer carry out from
Son injection, generates body area, source region, drain region and drift region；
Dielectric layer and metal layer in the lightly doped epitaxial layer, in the dense substrate bottom deposit metal layer, shape
At rf-ldmos semiconductor.
Further, described the hard mask layer to be performed etching using dry etching method, remove adult area to be generated, source
Hard mask on the dense substrate in area, drift region and drain region, comprising:
It is coated with photoresist on the hard mask layer, forms photoresist layer；
The photoresist layer is exposed and is developed, is removed described dense on adult area to be generated, source region, drift region and drain region
Photoresist on substrate；
It is performed etching using dry etching method, on the dense substrate for removing adult area to be generated, source region, drift region and drain region
Hard mask；
Remove removing photoresistance layer.
Further, described that the gate oxide is handled, grid region is formed, is lightly doped by the grid region to described
Epitaxial layer carries out ion implanting, generates body area, source region, drain region and drift region, comprising:
The deposit polycrystalline silicon layer on the gate oxide, using the mask with grid region pattern to the gate oxide into
Row etching, forms grid region；
Ion implanting is carried out to the lightly doped epitaxial layer by the grid region and high temperature drives in, forms body area；
Ion implanting is carried out to the lightly doped epitaxial layer by the grid region, is respectively formed source region, drain region and drift region.
Further, dielectric layer and the metal layer in the lightly doped epitaxial layer, in the dense substrate bottom
Deposited metal layer forms rf-ldmos semiconductor, comprising:
The dielectric layer in the lightly doped epitaxial layer performs etching the dielectric layer, forms metal aperture；
The deposited metal in the metal aperture forms metallic pattern；
The bottom of the dense substrate is carried out thinned；
In the bottom deposit metal layer of the dense substrate, rf-ldmos semiconductor is formed.
Further, the hard mask layer with a thickness of 20000-40000 angstroms.
Further, the hard mask layer is silicon dioxide layer or silicon nitride layer.
Further, the gate oxide is polysilicon layer.
Further, the trench region with a thickness of 6-15um, the inclined side wall and dense substrate of the trench region
Substrate surface is in 85-90 degree angle.
The second aspect of the invention provides a kind of rf-ldmos semiconductor, comprising:
The trench region on the dense substrate is arranged in dense substrate, be successively set on grid oxide layer on the trench region,
The metal layer of the dense substrate bottom is arranged in dielectric layer and metal layer；
Body area, source region, drain region and drift layer are provided in the trench region；
It is provided with protrusion, the protrusion and the source contact on the dense substrate, guides source region into institute
State the bottom of dense substrate.
In the present invention, performed etching by the region of the dense substrate to body area to be generated, source region, drift region and drain region, shape
At trench region, lightly doped epitaxial layer is grown in trench region, ion implanting is carried out to lightly doped epitaxial layer, generates body area, source
Area, drain region and drift region allow the source region positioned at dense substrate top directly to guide the bottom of dense substrate, drop by dense substrate
Resistance between the low positive back side of rf-ldmos semiconductors, to reduce radio frequency transverse direction double diffusion
The conducting resistance of metal-oxide semiconductor (MOS) improves the performance of rf-ldmos semiconductor.
Detailed description of the invention
Fig. 1 is a kind of rf-ldmos method for making semiconductor embodiment provided by the invention
Flow chart；
Fig. 2 is the deposited hard mask on dense substrate, forms structural schematic diagram when hard mask layer；
Structural representation when Fig. 3 is the hard mask on the dense substrate in removal adult area to be generated, source region, drift region and drain region
Figure；
Fig. 4 is structural schematic diagram when forming trench region；
Fig. 5 is the structural schematic diagram when the trench region grows lightly doped epitaxial layer；
Fig. 6 make a living adult area, source region, drain region and drift region when structural schematic diagram；
Fig. 7 is the structural schematic diagram in dielectric layer in the lightly doped epitaxial layer and metal layer；
Fig. 8 is a kind of rf-ldmos semiconductor structure schematic diagram provided by the invention.
Specific embodiment
In order to make the object, technical scheme and advantages of the embodiment of the invention clearer, below in conjunction with the embodiment of the present invention
In attached drawing, technical scheme in the embodiment of the invention is clearly and completely described, it is clear that described embodiment is
A part of the embodiment of the present invention, instead of all the embodiments.Based on the embodiments of the present invention, those of ordinary skill in the art
Every other embodiment obtained without making creative work, shall fall within the protection scope of the present invention.
Fig. 1 is a kind of rf-ldmos method for making semiconductor embodiment provided by the invention
Flow chart, as shown in Figure 1, comprising:
101, the deposited hard mask on dense substrate 1 forms hard mask layer 2.
The deposited hard mask on dense substrate, structural schematic diagram when forming hard mask layer can with as shown in Fig. 2, Fig. 2 be
Deposited hard mask on dense substrate forms structural schematic diagram when hard mask layer.Wherein, the thickness of hard mask layer can be 20000-
40000 angstroms.Hard mask layer can be silicon dioxide layer or silicon nitride layer.
Since selection ratio of the silica to dense substrate is very high, that is to say, that in the etching process of silica, etching
Gas is very high to the etching rate of silica, after silica has etched, hardly etches following substrate.Therefore, excellent
Choosing, hard mask layer can be silicon dioxide layer.
102, hard mask layer 2 is performed etching using dry etching method, removes adult area 5 to be generated, source region 6,7 and of drift region
Hard mask on the dense substrate 1 in drain region 8.
Schematic diagram when removing the hard mask on the dense substrate in adult area to be generated, source region, drift region and drain region can be such as Fig. 3
Shown, when Fig. 3 is the hard mask on the dense substrate in removal adult area to be generated, source region, drift region and drain region structural schematic diagram.
Wherein, step 102 can specifically include: being coated with photoresist on hard mask layer, forms photoresist layer；Photoresist layer is carried out
Exposure and imaging removes the photoresist on the dense substrate on adult area to be generated, source region, drift region and drain region；Using dry etching method
It performs etching, removes the hard mask on the dense substrate in adult area to be generated, source region, drift region and drain region；Remove removing photoresistance layer.
103, the region of the dense substrate in body area 5 to be generated, source region 6, drift region 7 and drain region 8 is performed etching, forms groove
Region 11.
Specifically, the shape of trench region can be as shown in figure 4, Fig. 4 be structural schematic diagram when forming trench region.Its
In, the thickness of trench region can be 6-15um, and the inclined side wall of trench region and dense substrate base surface are in 85-90 degree
Angle, as shown in Figure 4.
104, lightly doped epitaxial layer 3 is grown in trench region.
Specifically, can using selective external pressure growth technique (Selective Epitaxial Growth process,
SEG) one layer of lightly doped epitaxial layer is grown in trench region.The resistivity of lightly doped epitaxial layer is between 3-20 ohm/cm.Its
In, as shown in figure 5, Fig. 5 is the structural schematic diagram when trench region grows lightly doped epitaxial layer.
105, hard mask layer 2 is removed using dry etching method, gate oxide 4 is grown in lightly doped epitaxial layer 3.
Wherein, gate oxide is polysilicon layer.
106, gate oxide 4 is handled, forms grid region, ion implanting is carried out to lightly doped epitaxial layer by grid region,
Generate body area 5, source region 6, drain region 8 and drift region 7.
Wherein, step 106 can specifically include: the deposit polycrystalline silicon layer on gate oxide 4, using with grid region pattern
Mask performs etching polysilicon layer, forms grid region；Ion implanting is carried out to lightly doped epitaxial layer by grid region and high temperature drives
Enter, forms body area；Ion implanting is carried out to lightly doped epitaxial layer by grid region, is respectively formed source region, drain region and drift region.Such as figure
Shown in 6, Fig. 6 make a living adult area, source region, drain region and drift region when structural schematic diagram.
Specifically, the process for forming body area is specifically as follows: implanting ions into the left side of lightly doped epitaxial layer, passes through height
Temperature drives in, and ion is driven into the right side of lightly doped epitaxial layer, to form body area.
107, dielectric layer 9 and metal layer 10 in lightly doped epitaxial layer 3, in dense substrate bottom deposit metal layer 10,
Form rf-ldmos semiconductor.
Specifically, step 107 may include: the dielectric layer in lightly doped epitaxial layer, perform etching to dielectric layer, shape
At metal aperture；The deposited metal in metal aperture forms metallic pattern；The bottom of dense substrate is carried out thinned；At the bottom of dense substrate
Portion's deposited metal layer forms rf-ldmos semiconductor.As shown in fig. 7, Fig. 7 is in lightly doped epitaxial layer
Structural schematic diagram when upper dielectric layer and metal layer.
Wherein, the thickness of dense substrate is generally between 625~675 microns, and for RFLDMOS, source electrode draws from the back side
Out, in front, blocked up dense substrate will increase the conducting resistance between source and drain for drain electrode.So in the bottom deposit metal of dense substrate
It is needed before layer by dense substrate thinning between 100~300 microns, to reduce conducting resistance.It is not only RFLDMOS, for institute
There are power device, such as VDMOS, the devices such as TVS, CRD require to be thinned.As long as a namely pole is in front, another pole is overleaf
It requires to be thinned.All electrodes all front there is no need to.
In the present invention, performed etching by the region of the dense substrate to body area to be generated, source region, drift region and drain region, shape
At trench region, lightly doped epitaxial layer is grown in trench region, ion implanting is carried out to lightly doped epitaxial layer, generates body area, source
Area, drain region and drift region allow the source region positioned at dense substrate top directly to guide the bottom of dense substrate, drop by dense substrate
Resistance between the low positive back side of rf-ldmos semiconductors, to reduce radio frequency transverse direction double diffusion
The conducting resistance of metal-oxide semiconductor (MOS) improves the performance of rf-ldmos semiconductor.
Those of ordinary skill in the art will appreciate that: realize that all or part of the steps of above-mentioned each method embodiment can lead to
The relevant hardware of program instruction is crossed to complete.Program above-mentioned can be stored in a computer readable storage medium.The journey
When being executed, execution includes the steps that above-mentioned each method embodiment to sequence；And storage medium above-mentioned include: ROM, RAM, magnetic disk or
The various media that can store program code such as person's CD.
Fig. 8 is a kind of rf-ldmos semiconductor structure schematic diagram provided by the invention, such as Fig. 8
It is shown, comprising:
The trench region 11 on dense substrate is arranged in dense substrate 1, is successively set on grid oxide layer 4 on trench region 11, is situated between
The metal layer 10 of dense 1 bottom of substrate is arranged in electric layer 9 and metal layer 10；
Protrusion is provided on dense substrate 1, protrusion is contacted with source region 6, and source region 6 is guided into the bottom of dense substrate 1
Portion.
Wherein, the growth of each layer or deposition method embodiment shown in Figure 1, are no longer described in detail herein.
In the present invention, performed etching by the region of the dense substrate to body area to be generated, source region, drift region and drain region, shape
At trench region, lightly doped epitaxial layer is grown in trench region, ion implanting is carried out to lightly doped epitaxial layer, generates body area, source
Area, drain region and drift region allow the source region positioned at dense substrate top directly to guide the bottom of dense substrate, drop by dense substrate
Resistance between the low positive back side of rf-ldmos semiconductors, to reduce radio frequency transverse direction double diffusion
The conducting resistance of metal-oxide semiconductor (MOS) improves the performance of rf-ldmos semiconductor.
Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention., rather than its limitations；To the greatest extent
Pipe present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that: its according to
So be possible to modify the technical solutions described in the foregoing embodiments, or to some or all of the technical features into
Row equivalent replacement；And these are modified or replaceed, various embodiments of the present invention technology that it does not separate the essence of the corresponding technical solution
The range of scheme.
Claims (8)
1. a kind of rf-ldmos method for making semiconductor characterized by comprising
The deposited hard mask on dense substrate forms hard mask layer；
The hard mask layer is performed etching using dry etching method, removes the institute of adult area to be generated, source region, drift region and drain region
State the hard mask on dense substrate；
The region of the dense substrate in body area to be generated, source region, drift region and drain region is performed etching, trench region is formed；
Lightly doped epitaxial layer is grown in the trench region；
The hard mask layer is removed using dry etching method, grows gate oxide in the lightly doped epitaxial layer；
The gate oxide is handled, grid region is formed, ion note is carried out to the lightly doped epitaxial layer by the grid region
Enter, generates body area, source region, drain region and drift region；
Dielectric layer and metal layer in the lightly doped epitaxial layer, in the dense substrate bottom deposit metal layer, formation is penetrated
Frequency lateral double diffusion metal oxide semiconductor.
2. the method according to claim 1, wherein described carry out the hard mask layer using dry etching method
Etching removes the hard mask on the dense substrate in adult area to be generated, source region, drift region and drain region, comprising:
It is coated with photoresist on the hard mask layer, forms photoresist layer；
The photoresist layer is exposed and is developed, the dense substrate on adult area to be generated, source region, drift region and drain region is removed
On photoresist；
It is performed etching, is removed hard on the dense substrate in adult area to be generated, source region, drift region and drain region using dry etching method
Mask；
Remove removing photoresistance layer.
3. grid region is formed the method according to claim 1, wherein described handle the gate oxide,
Ion implanting is carried out to the lightly doped epitaxial layer by the grid region, generates body area, source region, drain region and drift region, comprising:
The deposit polycrystalline silicon layer on the gate oxide carves the gate oxide using the mask with grid region pattern
Erosion forms grid region；
Ion implanting is carried out to the lightly doped epitaxial layer by the grid region and high temperature drives in, forms body area；
Ion implanting is carried out to the lightly doped epitaxial layer by the grid region, is respectively formed source region, drain region and drift region.
4. the method according to claim 1, wherein the dielectric layer in the lightly doped epitaxial layer and
Metal layer forms rf-ldmos semiconductor in the dense substrate bottom deposit metal layer, comprising:
The dielectric layer in the lightly doped epitaxial layer performs etching the dielectric layer, forms metal aperture；
The deposited metal in the metal aperture forms metallic pattern；
The bottom of the dense substrate is carried out thinned；
In the bottom deposit metal layer of the dense substrate, rf-ldmos semiconductor is formed.
5. the method according to claim 1, wherein
The hard mask layer with a thickness of 20000-40000 angstroms.
6. the method according to claim 1, wherein
The hard mask layer is silicon dioxide layer or silicon nitride layer.
7. the method according to claim 1, wherein
The trench region with a thickness of 6-15um, the inclined side wall of the trench region and dense substrate base surface are in 85-
An angle of 90 degrees.
8. a kind of rf-ldmos semiconductor characterized by comprising dense substrate is arranged described dense
Trench region on substrate, grid oxide layer, dielectric layer and the metal layer being successively set on the trench region are arranged described dense
The metal layer of substrate bottom；
Body area, source region, drain region and drift layer are provided in the trench region；
It is provided with protrusion, the protrusion and the source contact on the dense substrate, source region is guided into described dense
The bottom of substrate.
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| DE10131705B4 (en) * | 2001-06-29 | 2010-03-18 | Atmel Automotive Gmbh | Method for producing a DMOS transistor |
| CN101783295B (en) * | 2009-01-19 | 2011-11-09 | 中芯国际集成电路制造(上海)有限公司 | High-voltage LDMOS device and manufacturing method thereof |
| CN102376618B (en) * | 2010-08-26 | 2013-10-23 | 上海华虹Nec电子有限公司 | Manufacturing method of polysilicon P type well in N type radio frequency LDMOS(laterally-diffused metal oxide semiconductor) |
| CN104659031B (en) * | 2013-11-20 | 2018-02-06 | 上海华虹宏力半导体制造有限公司 | The mos capacitance integrated morphology and manufacture method of different capacitance densities in RFLDMOS techniques |
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Effective date of registration: 20220718 Address after: 518116 founder Microelectronics Industrial Park, No. 5, Baolong seventh Road, Baolong Industrial City, Longgang District, Shenzhen, Guangdong Province Patentee after: SHENZHEN FOUNDER MICROELECTRONICS Co.,Ltd. Address before: 100871, Beijing, Haidian District, Cheng Fu Road, No. 298, Zhongguancun Fangzheng building, 9 floor Patentee before: PEKING UNIVERSITY FOUNDER GROUP Co.,Ltd. Patentee before: SHENZHEN FOUNDER MICROELECTRONICS Co.,Ltd. |