CN106250622B - A kind of FET microwave noise method for establishing model - Google Patents
A kind of FET microwave noise method for establishing model Download PDFInfo
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- G06F30/36—Circuit design at the analogue level
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Abstract
The present invention relates to semiconductor integrated circuit manufacturing fields, disclose a kind of FET microwave noise method for establishing model, it include: that FET electrode is divided into four regions, grid input structure, drain electrode export structure, source electrode ground structure, active area electrode, using transmission characteristic of the full-wave electromagnetic field method analogue microwave signal in FET electrode, the S parameter of each region is obtained；FET active area electrode is converted into equivalent-circuit model, the S parameter of the S parameter of the grid input structure of acquisition, the S parameter for the export structure that drains and source electrode ground structure is respectively connected to three connectivity ports, obtains FET passive electrode model；On-wafer measurement is carried out to FET, small signal and noise testing data is obtained, and be based on test data, is handled by De- embedding, obtain the small-signal parameter and noise source of FET intrinsic part；Small-signal parameter and noise source are accessed in FET passive electrode model according to port corresponding relationship, obtain the microwave noise model of FET.
Description
Technical field
The present invention relates to semiconductor integrated circuit manufacturing field more particularly to a kind of FET microwave noise method for establishing model.
Background technique
Device model plays a crucial role in circuit design, plays between circuit design and technological design
Bridge beam action, as circuit work frequency enters microwave and higher frequency section, traditional design method based on experience is got over
It is not able to satisfy the requirement of circuit design, thus obtains accurate device model to become more and more important.
The microwave noise model of field effect transistor (FET) is mainly used for designing microwave low-noise amplifier, accurate FET
Small-signal model be establish the basis of noise model, but traditional small signal equivalent circuit model using lumped parameter network come mould
The ectoparasitism parameter and intrinsic parameters of quasi- FET needs in equivalent circuit network parameter extraction process in a variety of bias conditions
Then extracting parameter initial value after lower progress DC and RF measurement also needs to carry out successive ignition and optimization to network parameter, extracts stream
Journey is complicated, and parameter is easy to fall into local minimum, leads to mistake or the value without physical significance, to modeling personnel's
Professional standing and experience requires very high.
Therefore, the Establishing process of device model is complicated and inaccurate in the prior art, influences the accuracy of circuit design
The technical issues of.
Summary of the invention
The embodiment of the present invention solves device in the prior art by providing a kind of FET microwave noise method for establishing model
The technical issues of Establishing process of model is complicated, and inaccurate, influences the accuracy of circuit design.
In order to solve the above-mentioned technical problem, the embodiment of the invention provides a kind of FET microwave noise method for establishing model, packets
Include following content:
FET electrode is divided into four regions, respectively grid input structure, drain electrode export structure, source electrode ground connection by S101
Structure, active area electrode are obtained using transmission characteristic of the full-wave electromagnetic field method analogue microwave signal in the FET electrode
The S parameter of each region；
FET active area electrode is converted to equivalent-circuit model by S102, and the equivalent-circuit model includes and external connection
Three connectivity ports, by the S parameter of the grid input structure obtained in S101, drain export structure S parameter and source electrode
The S parameter of ground structure is respectively connected to three connectivity ports of equivalent-circuit model, obtains FET passive electrode model；
S103 carries out On-wafer measurement to FET, obtains small signal and noise testing data, and be based on the test data, warp
De- embedding processing is crossed, the small-signal parameter and noise source of FET intrinsic part are obtained；
The small-signal parameter obtained in S103 and noise source are accessed S102 and obtained by S104 according to port corresponding relationship
In FET passive electrode model, the microwave noise model of FET is obtained.
Further, in S101, grid input structure, drain electrode export structure and the active area electricity of the FET electrode
Pole is reduced to a two-port network respectively.
Further, it is specifically included before S102:
According to the S parameter that active area electrode in S101 obtains, the S parameter is converted into Z parameter；
Based on the Z parameter, the parasitic parameter of the active area electrode is calculated；
According to the parasitic parameter, S102 is executed.
Further, after S102, further includes:
Circuit simulating software is calculated the small signal transmission characteristics of the FET passive electrode model, and by the small letter
Number transmission characteristic is compared with the Two-port netwerk full-wave electromagnetic field of entire FET electrode emulation data, verifies the FET passive electrode
The accuracy of model.
Further, S103 is specifically included:
Source impedance pull test is carried out to FET, obtains four noise parameters of FET；
Based on four noise parameters, the transmitted noise correlation matrix of FET is obtained；
According to FET On-wafer measurement obtain small signal testing data, successively to grid input structure, drain electrode export structure,
Source electrode ground structure and active area electrode do De- embedding processing by matrixing, obtain the small-signal parameter of FET intrinsic part；
According to the transmitted noise correlation matrix of FET, successively to grid input structure, drain electrode export structure, source electrode ground junction
Structure and active area electrode are converted by transmitted noise correlation matrix does De- embedding processing, obtains the transmission of the intrinsic active part of FET
Noise correlation matrix；
According to the transmitted noise correlation matrix of the intrinsic active part of FET, the noise for obtaining the intrinsic active part of FET is calculated
Source.
Further, after S104, the microwave noise model of the FET is brought into circuit simulating software, simulates FET
Small-signal parameter and four noise parameters, and will in simulation result and S103 test obtain FET electrode small-signal parameter and
Four noise parameters compare, and verify the accuracy of the FET microwave noise model.
Further, after S104, further includes:
The FET microwave noise model that S104 is obtained carries out equal proportion extension, obtains different sizes and different laying out pattern
FET microwave noise model.
Using one or more technical solution in the present invention, have the following beneficial effects:
1, traditional equivalent circuit network parameter is replaced using full-wave electromagnetic emulation data, to describe analog signal in FET
Transmission characteristic in electrode；The value for going out each model parameter by program calculation avoids complicated in traditional equivalent-circuit model
Parameter testing, extraction and Optimal Fitting process, local minimum points can be fallen into avoid parameter, and mistake occur or do not meet
The value of physical significance.
2, the method emulated using full-wave electromagnetic field, can more accurate simulation electrode ghost effect small signal and noise are joined
Several influences, such as grounding through hole, interelectrode coupling, metal loss, model accuracy are higher.
3, the model that this method is established can also be used in FET size expansion, in the base for establishing single scale device noise model
On plinth, the small signal and noiseproof feature of the FET of different sizes and different laying out pattern can be predicted.
Detailed description of the invention
Fig. 1 is the flow diagram of the FET microwave noise method for establishing model in the embodiment of the present invention；
Fig. 2 is the subregion schematic diagram of the FET passive electrode of the embodiment of the present invention；
Fig. 3 is the schematic diagram that multiport network is converted to two-port network in the embodiment of the present invention；
Fig. 4 is the schematic diagram of FET active region parasitic parameter equivalent circuit network in the embodiment of the present invention；
Fig. 5 is the schematic diagram of FET passive electrode model in the embodiment of the present invention；
Fig. 6 is the intrinsic active part model schematic of FET in the embodiment of the present invention.
Specific embodiment
The embodiment of the present invention solves device in the prior art by providing a kind of FET microwave noise method for establishing model
The technical issues of Establishing process of model is complicated, and inaccurate, influences the accuracy of circuit design.
In order to solve the above-mentioned technical problem, in conjunction with appended figures and specific embodiments to of the invention
Technical solution is described in detail.
The embodiment of the invention provides a kind of FET microwave noise method for establishing model, step flow chart as shown in Figure 1,
Specifically:
S101, as shown in Fig. 2, FET electrode is divided into four regions, grid input structure (region I), drain electrode output knot
Structure (region II), active area electrode (region IV), source electrode ground structure (region III), dotted line frame indicates regional scope in figure,
In, region I and region II are respectively the path that outputs and inputs of FET signal, and region III connects active region and back-side ground gold
Belong to, region IV is the active area electrode of FET, is mainly referred to by grid, source electrode air bridges are constituted.
It is special using the transmission in full-wave electromagnetic method analogue microwave signal scene effect pipe (FET) electrode in the S101
Property, which includes MOSFET, MESFET, HEMT etc., and the material of the FET includes Si, GaAs, GaN etc., the full-wave electromagnetic field side
Method is the numerical solution based on Maxwell equation, calculates the S parameter of multiport passive structures, can select the quotient of current maturation
It is completed with software (such as HFSS or CST).
The multiport S parameter for emulating each region respectively using full-wave electromagnetic field method carrys out analogue microwave signal in FET electricity
Transmission characteristic in extremely, using the method for this full-wave electromagnetic numerical simulation compared to the outside in traditional equivalent-circuit model
Parasitic parameter representation method, can more accurate simulation electrode ghost effect influence, such as grounding through hole, it is interelectrode coupling,
Metal loss etc., and avoid complicated parasitic parameter Test extraction process.
After emulating each electrode zone using full-wave electromagnetic field method, the S parameter of each region is obtained, wherein I He of region
Region II is respectively two (N+1) port S parameters, and region III is single port S parameter, and region IV is 2*N port S parameter, wherein N
For the grid index mesh of FET.
Therefore, in order to reduce FET model complexity, the region IV of FET can be reduced to a two-port network, together
Sample needs equally to be converted to region I and region II into a two-port network, can be with according to the definition of multiport network Y matrix
Obtain multiport network be converted to two-port network relational expression it is as follows:
(1) in formula, YCIndicate the Y matrix of two-port network after converting, yi,jIndicate the parameter of former multiport network Y matrix,
It is obtained according to the multiport S parameter that emulation obtains according to matrix transformation theory, K expression group is combined into 1 port of two-port network
Port number, L expression group are combined into the port number of 2 ports of two-port network, as shown in figure 3, to be reduced to two-port network
Schematic diagram, wherein for region I, K=1, L=N；For region II, K=N, L=1；For region IV, K=N, L=N.
Next, executing S102, FET active area electrode is converted into equivalent-circuit model, as shown in figure 4, the equivalent electricity
Road model includes three connectivity ports with external connection, and the S parameter of the grid input structure obtained in the S101, drain electrode is defeated
The S parameter of structure and the S parameter of source electrode ground structure are respectively connected to three connectivity ports of equivalent-circuit model out, to obtain
Obtain FET passive electrode model.
In specific embodiment, which is converted into equivalent-circuit model and specifically needs to obtain the FET active area
Therefore the parasitic parameter of domain electrode further includes following steps before S102, firstly, being obtained according to active area electrode in S101
S parameter, which is converted into Z parameter.Then, according to following relational expression:
In (2) formula, ZⅣFor the Z parameter matrix for emulating obtained region IV；And Cg、Cd、CsWith Cgd、Cgs、CdsPass
System are as follows:
It can be calculated by (2) formula
Rs=mean { Re (z12)}…………………………………………………….(4)
In (4) formula function mean () expression average to all Frequency points in model frequency range, can according to (5) formula,
L is calculated by linear back off techniquesAnd CsValue, work as Rs、Ls、CsValue determine after, the value of remaining parameter can be in (2) formula
It is obtained by identical method, finally calculates C further according to (3) formulags、Cgd、CdsValue.Therefore, according to above-mentioned Z parameter matrix,
The parasitic parameter of active area electrode can be obtained, finally according to the parasitic parameter of acquisition, can obtain FET active area electrode etc.
Imitate circuit model.
Then, in S102, in the equivalent-circuit model of acquisition, three parasitic capacitance (C in parallelgd、Cgs, Cds) be used to
Between simulation grid refer to and grid refer to the electromagnetic coupling between air bridges, concatenated resistance and inductance (Rg、Lg、Rd、Ld、Rs、Ls)
Refer to and the port in air bridges due to signal transmission and the ghost effect introduced that decays, in the equivalent-circuit model for simulating grid
Gex、DexAnd SexRespectively indicate the connectivity port with external region I, region II, region III, port Gin、DinAnd SinIndicate with
The connectivity port of the intrinsic channel network of FET.
When specifically executing S102, the S of the S parameter of the grid input structure obtained in S101, the export structure that drains is joined
Several and source electrode ground structure S parameter is respectively connected to three connectivity port (namely port G of equivalent-circuit modelex、Dex
And Sex), to obtain FET passive electrode model as shown in Figure 5.
After the S102, the small signal transmission characteristics of the FET passive electrode model are calculated by circuit simulating software,
And be compared the small signal transmission characteristics with the Two-port netwerk full-wave electromagnetic field of entire FET electrode emulation data, to verify
The accuracy of the FET passive electrode model.
Then, S103 is executed, On-wafer measurement is carried out to FET, obtains small signal and noise testing data, and be based on the survey
Data are tried, are handled by De- embedding, the small-signal parameter and noise source of FET intrinsic part are obtained；.
Specifically, under grid and drain electrode operating bias voltage, On-wafer measurement is carried out to FET, the S parameter of FET is measured, adopts
With Focus noise measuring system, source impedance pull test is carried out to FET, measurement obtains four noise parameters of FET, specifically
Four noise parameters are respectively Minimum noises coefficients (NFmin), equivalent noise resistance (Rn), optimum noise source conductivity (Gopt) and
Optimum noise source susceptance (Bopt), the then transmitted noise correlation matrix of available FET:
In (6) formula, optimum noise source admittance Yopt=Gopt+jBopt.The intrinsic active part of the FET can be expressed as one
A noiseless network and two noise sources, two of them noise source are respectively grid noise current sourceWith drain electrode noise current sourceIts correlation is expressed asAs shown in fig. 6, intrinsic noiseless network can according to small signal matrix network theory, by
The small signal testing data of FET are obtained in piece measurement, matrixing successively is passed through to region I, region II, region III and region IV
De- embedding processing is done, the small-signal parameter of the intrinsic noiseless network of FET is finally obtained, and two of the intrinsic active part of FET make an uproar
Sound source, can be according to the transmitted noise correlation matrix for the FET that formula (6) obtain, successively to gate input region domain I, region II, region
III, De- embedding processing is done by similar transmitted noise correlation matrix transformation in region IV, obtains the transmission of the intrinsic active part of FET
Noise correlation matrixThen the noise source expression formula of the intrinsic active part of FET is calculated by following formula:
(7) in formula,Wherein, subscript " IN " indicates the parameter of the intrinsic active part of FET.
As a result, in the S103, the small-signal parameter and noise source of the intrinsic active part of FET are obtained.
Then, S104 is executed, the small-signal parameter and noise source that obtain in the S103 are connect according to port corresponding relationship
In the FET passive electrode model for entering S102 acquisition, the microwave noise model of FET is obtained.
After the S104, the microwave noise model of FET is brought into circuit simulating software, simulates the small signal ginseng of FET
Several and four noise parameters, and by the small-signal parameter and four noise parameters of the FET tested in simulation result and S103
It is compared, verifies the accuracy of the FET microwave noise model.
Therefore, FET microwave noise model is obtained using aforesaid way, is using computer program programming (MATLAB) come real
Existing above-mentioned parameter extracts process can without parameter testing complicated in traditional equivalent-circuit model, extraction and Optimal Fitting process
Local minimum points are fallen into avoid parameter, and mistake occurs or does not meet the value of physical significance.In addition, adopting in step s101
The method emulated with full-wave electromagnetic field, can more accurately simulate influence of the FET electrode ghost effect to small signal and noise parameter,
Such as grounding through hole, interelectrode coupling, metal loss etc., so that finally obtained FET microwave noise model accuracy is higher.This
Method can also be using the transmission line effect (source electrode between the intrinsic active area source electrode of full-wave electromagnetic field emulation FET and grounding through hole
Negative-feedback) influence to FET small signal and noiseproof feature.
After the microwave noise model for obtaining the FET, further includes: the microwave noise model of the FET is carried out equal proportion
Extension, obtains the FET microwave noise model of different sizes and different laying out pattern.
Specifically, it is assumed that grid width is W in the FET of above-mentioned acquisition, and the grid width of new size FET is Wnew, through the above steps
S101, S102 obtain the model of the passive electrode part of new size FET, then, the intrinsic active part of new size FET
Small-signal parameter and noise source parameter can be obtained by the method that equal proportion extends, shown in following chart, wherein N=Wnew/ W,
Y indicates small signal admittance matrix.
Therefore, according to the S104 step, different sizes, the FET microwave noise model of different laying out pattern can be obtained.
Although preferred embodiments of the present invention have been described, it is created once a person skilled in the art knows basic
Property concept, then additional changes and modifications may be made to these embodiments.So it includes excellent that the following claims are intended to be interpreted as
It selects embodiment and falls into all change and modification of the scope of the invention.
Obviously, various changes and modifications can be made to the invention without departing from essence of the invention by those skilled in the art
Mind and range.In this way, if these modifications and changes of the present invention belongs to the range of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to include these modifications and variations.
Claims (7)
1. a kind of FET microwave noise method for establishing model, which is characterized in that including following content:
FET electrode is divided into four regions, respectively grid input structure, drain electrode export structure, source electrode ground junction by S101
Structure, active area electrode are obtained each using transmission characteristic of the full-wave electromagnetic field method analogue microwave signal in the FET electrode
The S parameter in a region；
FET active area electrode is converted to equivalent-circuit model by S102, and the equivalent-circuit model includes three with external connection
The S parameter of the grid input structure obtained in S101, the S parameter for the export structure that drains and source electrode are grounded by a connectivity port
The S parameter of structure is respectively connected to three connectivity ports of equivalent-circuit model, obtains FET passive electrode model；
S103 carries out On-wafer measurement to FET, small signal and noise testing data is obtained, and be based on the test data, through the past
Insertion processing, obtains the small-signal parameter and noise source of FET intrinsic part；
S104, by the small-signal parameter obtained in S103 and noise source, according to port corresponding relationship, access S102 obtain FET without
In source electrode model, the microwave noise model of FET is obtained.
2. FET microwave noise method for establishing model according to claim 1, which is characterized in that in S101, the FET
Grid input structure, drain electrode export structure and the active area electrode of electrode are reduced to a two-port network respectively.
3. FET microwave noise method for establishing model according to claim 1, which is characterized in that specifically included before S102:
According to the S parameter that active area electrode in S101 obtains, the S parameter is converted into Z parameter；
Based on the Z parameter, the parasitic parameter of the active area electrode is calculated；
According to the parasitic parameter, S102 is executed.
4. FET microwave noise method for establishing model according to claim 1, which is characterized in that after S102, also wrap
It includes:
The small signal transmission characteristics of the FET passive electrode model are calculated in circuit simulating software, and the small signal is passed
Defeated characteristic is compared with the Two-port netwerk full-wave electromagnetic field of entire FET electrode emulation data, verifies the FET passive electrode model
Accuracy.
5. FET microwave noise method for establishing model according to claim 1, which is characterized in that S103 is specifically included:
Source impedance pull test is carried out to FET, obtains four noise parameters of FET；
Based on four noise parameters, the transmitted noise correlation matrix of FET is obtained；
According to the small signal testing data for carrying out On-wafer measurement acquisition to FET, successively to grid input structure, drain electrode output knot
Structure, source electrode ground structure and active area electrode do De- embedding processing by matrixing, obtain the small signal ginseng of FET intrinsic part
Number；
According to the transmitted noise correlation matrix of FET, successively to grid input structure, drain electrode export structure, source electrode ground structure and
Active area electrode does De- embedding processing by the transformation of transmitted noise correlation matrix, obtains the transmitted noise of the intrinsic active part of FET
Correlation matrix；
According to the transmitted noise correlation matrix of the intrinsic active part of FET, the noise source for obtaining the intrinsic active part of FET is calculated.
6. FET microwave noise method for establishing model according to claim 1, which is characterized in that
After S104, the microwave noise model of the FET is brought into circuit simulating software, the small-signal parameter of FET is simulated
With four noise parameters, and test the small-signal parameter and four noise parameters of FET electrode will be obtained in simulation result and S103
It compares, verifies the accuracy of the FET microwave noise model.
7. FET microwave noise method for establishing model according to claim 1, which is characterized in that after S104, also wrap
It includes:
The FET microwave noise model that S104 is obtained carries out equal proportion extension, obtains the FET of different sizes and different laying out pattern
Microwave noise model.
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