CN106250622A - A kind of FET microwave noise method for establishing model - Google Patents

Abstract

The present invention relates to semiconductor integrated circuit and manufacture field, disclose a kind of FET microwave noise method for establishing model, including: FET electrode is divided into four regions, grid input structure, drain electrode export structure, source ground structure, active area electrode, use full-wave electromagnetic field method analogue microwave signal transmission characteristic in FET electrode, it is thus achieved that the S parameter of regional；FET active area electrode is converted to equivalent-circuit model, the S parameter of the S parameter of the grid input structure of acquisition, the S parameter of drain electrode export structure and source ground structure is respectively connected to three connectivity ports, it is thus achieved that FET passive electrode model；FET is carried out On-wafer measurement, it is thus achieved that small-signal and noise testing data, and based on test data, process through De-embedding, it is thus achieved that the small-signal parameter of FET intrinsic part and noise source；By small-signal parameter and noise source, according to port corresponding relation, access in FET passive electrode model, it is thus achieved that the microwave noise model of FET.

Description

A kind of FET microwave noise method for establishing model

Technical field

The present invention relates to semiconductor integrated circuit and manufacture field, particularly relate to a kind of FET microwave noise method for establishing model.

Background technology

Device model plays vital effect in circuit design, plays between circuit design and technological design Bridge beam action, along with circuit work frequency enters microwave and higher frequency section, traditional method for designing based on experience is more More can not meet the requirement of circuit design, thus obtain accurate device model and will seem more and more important.

The microwave noise model of field-effect transistor (FET) is mainly used in designing microwave low-noise amplifier, accurate FET Small-signal model is to set up the basis of noise model, but traditional small signal equivalent circuit model uses lumped parameter network to carry out mould Intend ectoparasitism parameter and the intrinsic parameters of FET, in equivalent circuit network parameter extraction process, need at multiple bias condition Under carry out extracting parameter initial value after DC and RF measures, then also need to network parameter is carried out successive ignition and optimization, extract stream Journey is complicated, and parameter is easy to fall into local minimum, causes mistake or does not have the value of physical significance, to modeling personnel's Professional standing and experience requires the highest.

Therefore, in prior art, the Establishing process of device model is complicated, and accurate not, affects the accuracy of circuit design Technical problem.

Summary of the invention

The embodiment of the present invention, by providing a kind of FET microwave noise method for establishing model, solves device in prior art The Establishing process of model is complicated, and accurate not, affects the technical problem of the accuracy of circuit design.

In order to solve above-mentioned technical problem, embodiments provide a kind of FET microwave noise method for establishing model, bag Include following content:

S101, is divided into four regions, respectively grid input structure, drain electrode export structure, source ground by FET electrode Structure, active area electrode, use full-wave electromagnetic field method analogue microwave signal transmission characteristic in described FET electrode, it is thus achieved that The S parameter of regional；

S102, is converted to equivalent-circuit model by FET active area electrode, and described equivalent-circuit model includes and external connection Three connectivity ports, by the S parameter of the grid input structure that obtains in S101, the S parameter of drain electrode export structure and source electrode The S parameter of ground structure is respectively connected to three connectivity ports of equivalent-circuit model, it is thus achieved that FET passive electrode model；

S103, carries out On-wafer measurement to FET, it is thus achieved that small-signal and noise testing data, and based on described test data, warp Cross De-embedding to process, it is thus achieved that the small-signal parameter of FET intrinsic part and noise source；

S104, by the small-signal parameter obtained in S103 and noise source, according to port corresponding relation, accesses S102 and obtains In FET passive electrode model, it is thus achieved that the microwave noise model of FET.

Further, in S101, the grid input structure of described FET electrode, drain electrode export structure and active area electricity Pole is reduced to a two-port network respectively.

Further, specifically include before S102:

The S parameter obtained according to active area electrode in S101, is converted to Z parameter by described S parameter；

Based on described Z parameter, calculate the parasitic parameter of described active area electrode；

According to described parasitic parameter, perform S102.

Further, after S102, also include:

Circuit simulating software is calculated the small-signal transmission characteristic of described FET passive electrode model, and by described little letter The Two-port netwerk full-wave electromagnetic field of number transmission characteristic and whole FET electrode emulates data and compares, and verifies described FET passive electrode The accuracy of model.

Further, S103 specifically includes:

FET is carried out source impedance pull test, it is thus achieved that four noise parameters of FET；

Based on described four noise parameters, it is thus achieved that the transmitted noise correlation matrix of FET；

According to FET On-wafer measurement obtain small-signal test data, successively to grid input structure, drain electrode export structure, Source ground structure and active area electrode do De-embedding by matrixing and process, it is thus achieved that the small-signal parameter of FET intrinsic part；

Transmitted noise correlation matrix according to FET, successively to grid input structure, drain electrode export structure, source ground knot Structure and active area electrode do De-embedding by the conversion of transmitted noise correlation matrix and process, it is thus achieved that the transmission of FET intrinsic active part Noise correlation matrix；

According to the transmitted noise correlation matrix of FET intrinsic active part, calculate the noise obtaining FET intrinsic active part Source.

Further, after S104, the microwave noise model of described FET is brought in circuit simulating software, simulate FET Small-signal parameter and four noise parameters, and test in simulation result and S103 is obtained FET electrode small-signal parameter and Four noise parameters contrast, and verify the accuracy of described FET microwave noise model.

Further, after S104, also include:

The FET microwave noise model obtained by S104 carries out equal proportion extension, obtains different size and different laying out pattern FET microwave noise model.

Use one or more technical scheme in the present invention, have the advantages that

1, use full-wave electromagnetic emulation data to replace traditional equivalent circuit network parameter, describe analogue signal at FET Transmission characteristic in electrode；The value of each model parameter is gone out, it is to avoid complicated in traditional equivalent-circuit model by program calculation Parameter testing, extraction and Optimal Fitting process, parameter can be avoided to be absorbed in local minimum points, and mistake occurs or does not meets The value of physical significance.

2, the method using full-wave electromagnetic field emulation, can join small-signal and noise in more accurate simulation electrode ghost effect The impact of number, such as grounding through hole, interelectrode coupling, metal loss etc., model accuracy is higher.

3, the model that the method is set up can be additionally used in FET size expansion, at the base setting up single scale device noise model On plinth, small-signal and the noiseproof feature of the FET of different size and different laying out pattern can be predicted.

Accompanying drawing explanation

Fig. 1 is the schematic flow sheet of the FET microwave noise method for establishing model in the embodiment of the present invention；

Fig. 2 is the subregion schematic diagram of the FET passive electrode of the embodiment of the present invention；

Fig. 3 is the schematic diagram that in the embodiment of the present invention, multiport network is converted to two-port network；

Fig. 4 is the schematic diagram of FET active region parasitic parameter equivalent circuit network in the embodiment of the present invention；

Fig. 5 is the schematic diagram of FET passive electrode model in the embodiment of the present invention；

Fig. 6 is FET intrinsic active part model schematic in the embodiment of the present invention.

Detailed description of the invention

The embodiment of the present invention, by providing a kind of FET microwave noise method for establishing model, solves device in prior art The Establishing process of model is complicated, and accurate not, affects the technical problem of the accuracy of circuit design.

In order to solve above-mentioned technical problem, below in conjunction with Figure of description and specific embodiment to the present invention's Technical scheme is described in detail.

Embodiments provide a kind of FET microwave noise method for establishing model, flow chart of steps as shown in Figure 1, Specifically:

S101, as in figure 2 it is shown, FET electrode to be divided into four regions, grid input structure (region I), drain electrode output knot Structure (region II), active area electrode (region IV), source ground structure (region III), empty wire frame representation regional extent in figure, its In, region I and region II are respectively input and the outgoing route of FET signal, and region III connects active region and back-side ground gold Belonging to, region IV is the active area electrode of FET, is mainly referred to by grid, source electrode air bridges is constituted.

Use the transmission in full-wave electromagnetic method analogue microwave signal scene effect pipe (FET) electrode special in this S101 Property, this FET includes MOSFET, MESFET, HEMT etc., and the material of this FET includes Si, GaAs, GaN etc., this full-wave electromagnetic field side Method is numerical solution based on Maxwell equation, calculates the S parameter of multiport passive structures, can select the most ripe business Complete with software (such as HFSS or CST).

Use full-wave electromagnetic field method to emulate the multiport S parameter of regional respectively, carry out analogue microwave signal at FET electricity Transmission characteristic in extremely, uses the method that this full-wave electromagnetic field stimulation calculates compared to the outside in tradition equivalent-circuit model Parasitic parameter method for expressing, can the impact of more accurate simulation electrode ghost effect, such as grounding through hole, interelectrode coupling, Metal loss etc., and avoid the parasitic parameter Test extraction flow process of complexity.

After using full-wave electromagnetic field method to emulate each electrode zone, obtain the S parameter of regional, wherein region I He Region II is respectively two (N+1) port S parameter, and region III is single port S parameter, and region IV is 2*N port S parameter, wherein N Grid index mesh for FET.

Therefore, in order to reduce FET model complexity, the region IV of FET can be reduced to a two-port network, with Sample, needs region I and region II are converted to a two-port network equally, according to the definition of multiport network Y matrix, permissible Obtaining multiport network, to be converted to the relational expression of two-port network as follows:

$Y_c=\left[\begin{array}{cc}{y}_{c11}& y_{c12}\\ y_{c21}& y_{c\mathrm{22}}\end{array}\right]=\left[\begin{array}{cc}\underset{i=1}{\overset{K}{\mathrm{\Σ}}}\underset{j=1}{\overset{K}{\mathrm{\Σ}}}{y}_{i,j}& \underset{i=1}{\overset{K}{\mathrm{\Σ}}}\underset{j=K-1}{\overset{K+L}{\mathrm{\Σ}}}{y}_{i,j}\\ \underset{i=1}{\overset{K}{\mathrm{\Σ}}}\underset{j=K+1}{\overset{K+L}{\mathrm{\Σ}}}{y}_{j,i}& \underset{i=K+1}{\overset{K+L}{\mathrm{\Σ}}}\underset{j=K+1}{\overset{K+L}{\mathrm{\Σ}}}{y}_{i,j}\end{array}\right]---\left(1\right)$

(1) in formula, Y_CRepresent the Y matrix of two-port network, y after changing_i,jRepresent the parameter of former multiport network Y matrix, Obtaining according to matrix transformation theory according to the multiport S parameter that obtains of emulation, K represents 1 port being combined as two-port network Port number, L represents the port number of 2 ports being combined as two-port network, as it is shown on figure 3, for being reduced to two-port network Schematic diagram, wherein, for region I, K=1, L=N；For region II, K=N, L=1；For region IV, K=N, L=N.

It follows that perform S102, FET active area electrode is converted to equivalent-circuit model, as shown in Figure 4, this equivalent electric Road model includes three connectivity ports with external connection, by this S101 obtain grid input structure S parameter, drain defeated The S parameter of the S parameter and source ground structure that go out structure is respectively connected to three connectivity ports of equivalent-circuit model, thus obtains Obtain FET passive electrode model.

In specific embodiment, this FET electrode is converted to equivalent-circuit model specifically to be needed to obtain this FET active area The parasitic parameter of territory electrode, therefore, before S102, also comprises the steps, first, obtains according to active area electrode in S101 S parameter, this S parameter is converted to Z parameter.Then, according to following relational expression:

$\begin{array}{c}{Z}_{IV}=\left[\begin{array}{cc}{z}_{11}& z_{12}\\ z_{21}& z_{\mathrm{22}}\end{array}\right]=\\ \left[\begin{array}{cc}{R}_g+{\mathrm{j\ωL}}_g+\frac{1}{{\mathrm{j\ωC}}_g}+R_s+{\mathrm{j\ωL}}_s+\frac{1}{{\mathrm{j\ωC}}_s}& R_s+{\mathrm{j\ωL}}_s+\frac{1}{{\mathrm{j\ωC}}_s}\\ R_s+{\mathrm{j\ωL}}_s+\frac{1}{{\mathrm{j\ωC}}_s}& R_d+{\mathrm{j\ωL}}_d+\frac{1}{{\mathrm{j\ωC}}_d}+R_s+{\mathrm{j\ωL}}_s+\frac{1}{{\mathrm{j\ωC}}_s}\end{array}\right]\end{array}---\left(2\right)$

In (2) formula, Z_ⅣZ parameter matrix for the region IV that emulation obtains；And C_g、C_d、C_sWith C_gd、C_gs、C_dsPass System is:

$\begin{array}{c}{C}_{gs}=\frac{C_g{C}_s+C_d{C}_s+C_g{C}_d}{C_d}\\ C_{ds}=\frac{C_g{C}_s+C_d{C}_s+C_g{C}_d}{C_g}\\ C_{gd}=\frac{C_g{C}_s+C_d{C}_s+C_g{C}_d}{C_s}\end{array}...\left(3\right)$

Can be calculated by (2) formula

R_s=mean{Re (z₁₂)}…………………………………………………….(4)

${\mathrm{\ω}}^2{L}_s-\frac{1}{C_s}=\mathrm{\ω}\·\mathrm{Im}\left(z_{12}\right)...\left(5\right)$

In (4) formula function mean () represent to model frequency range in all Frequency points average, can according to (5) formula, It is calculated L by linear back off technique_sAnd C_sValue, work as R_s、L_s、C_sValue determine after, in (2) formula, the value of remaining parameter is permissible Obtained by identical method, finally calculate C further according to (3) formula_gs、C_gd、C_dsValue.Therefore, according to above-mentioned Z parameter matrix, It is obtained in that the parasitic parameter of active area electrode, finally according to the parasitic parameter obtained, it is possible to acquisition FET active area electrode etc. Effect circuit model.

Then, in S102, it is thus achieved that equivalent-circuit model in, three parasitic capacitance (C in parallel_gd、C_gs, Cds) be used for Between simulation grid refer to and the grid electromagnetic coupled that refers between air bridges, the resistance of series connection and inductance (R_g、L_g、Rd、Ld、Rs、Ls) It is used for simulating grid to refer to transmit and the ghost effect of the introducing that decays, the port in this equivalent-circuit model due to signal in air bridges G_ex、D_exAnd S_exRepresent respectively and outside region I, region II, the connectivity port of region III, port G_in、D_inAnd S_inRepresent with The connectivity port of FET intrinsic raceway groove network.

When concrete execution S102, by the S parameter of grid input structure obtained in S101, the S ginseng of drain electrode export structure The S parameter of number and source ground structure is respectively connected to three connectivity port (namely port G of equivalent-circuit model_ex、D_ex And S_ex), thus obtain FET passive electrode model as shown in Figure 5.

After this S102, circuit simulating software it is calculated the small-signal transmission characteristic of this FET passive electrode model, And the Two-port netwerk full-wave electromagnetic field emulation data of this small-signal transmission characteristic with whole FET electrode are compared, thus verify The accuracy of this FET passive electrode model.

Then, perform S103, FET is carried out On-wafer measurement, it is thus achieved that small-signal and noise testing data, and based on described survey Examination data, process through De-embedding, it is thus achieved that the small-signal parameter of FET intrinsic part and noise source；.

Specifically, under grid and drain electrode operating bias voltage, FET is carried out On-wafer measurement, measures the S parameter of FET, adopt Use Focus noise measuring system, FET is carried out source impedance pull test, measure four noise parameters obtaining FET, specifically These four noise parameters are respectively Minimum noises coefficients (NF_min), equivalent noise resistance (R_n), optimum noise source conductivity (G_opt) and Optimum noise source susceptance (B_opt), then can obtain the transmitted noise correlation matrix of FET:

$C_A^{FET}=2kT\left[\begin{array}{cc}{R}_n& \frac{{\mathrm{NF}}_{\min }-1}{2}-R_n{Y}_{opt}^{*}\\ \frac{{\mathrm{NF}}_{\min }-1}{2}-R_n{Y}_{opt}& R_n|Y_{opt}{|}^2\end{array}\right]...\left(6\right)$

In (6) formula, optimum noise source admittance Y_opt=G_opt+jB_opt.This FET intrinsic active part can be expressed as one Individual noiseless network and two noise sources, two of which noise source is respectively grid noise current sourceWith drain electrode noise current sourceIts dependency is expressed asAs shown in Figure 6, intrinsic noiseless network can be theoretical according to small-signal matrixing network, by Obtain the small-signal test data of FET in sheet measurement, successively matrixing is passed through in region I, region II, region III and region IV Do De-embedding to process, finally obtain the small-signal parameter of FET intrinsic noiseless network, and two of FET intrinsic active part are made an uproar Sound source, the transmitted noise correlation matrix of the FET that can obtain according to formula (6), successively to territory, gate input region I, region II, region III, De-embedding process is done by similar transmitted noise correlation matrix conversion in region IV, it is thus achieved that the transmission of FET intrinsic active part Noise correlation matrixThen the noise source expression formula of FET intrinsic active part it is calculated by equation below:

$\begin{array}{c}\frac{\stackrel{\‾}{i_{nd}^2}}{\mathrm{\Δ}f}=4{\mathrm{kTR}}_n^{IN}|Y_{21}^{IN}{|}^2\\ \frac{\stackrel{\‾}{i_{ng}^2}}{\mathrm{\Δ}f}=4{\mathrm{kTR}}_n^{IN}\·\left\{\right|Y_{opt}{|}^2-|Y_{11}^{IN}{|}^2+2\mathrm{Re}\[(Y_{11}^{IN}-Y_{cor})\·Y_{11}^{IN*}\]\}\\ \frac{\stackrel{\‾}{i_{ng}{i}_{nd}^{*}}}{\mathrm{\Δ}f}=4{\mathrm{kTR}}_n^{IN}{Y}_{21}^{IN*}(Y_{11}^{IN}-Y_{cor})\end{array}...\left(7\right)$

(7) in formula,Wherein, subscript " IN " represents the parameter of FET intrinsic active part.

Thus, in this S103, it is thus achieved that the small-signal parameter of FET intrinsic active part and noise source.

Then, perform S104, by the small-signal parameter obtained in this S103 and noise source, according to port corresponding relation, connect Enter in the FET passive electrode model that S102 obtains, it is thus achieved that the microwave noise model of FET.

After this S104, the microwave noise model of FET is brought in circuit simulating software, the small-signal ginseng of simulation FET Number and four noise parameters, and simulation result and S103 will test the small-signal parameter of the FET obtained and four noise parameters Compare, verify the accuracy of this FET microwave noise model.

Therefore, use aforesaid way to obtain FET microwave noise model, be to utilize computer program programming (MATLAB) to come in fact Existing above-mentioned parameter extracts flow process, it is not necessary to parameter testing, extraction and Optimal Fitting process complicated in tradition equivalent-circuit model, can To avoid parameter to be absorbed in local minimum points, and mistake occurs or does not meets the value of physical significance.It addition, adopt in step S101 By the method for full-wave electromagnetic field emulation, can more accurately simulate FET electrode ghost effect to small-signal and the impact of noise parameter, Such as grounding through hole, interelectrode coupling, metal loss etc. so that the FET microwave noise model accuracy finally given is higher.This Method can also use the transmission line effect (source electrode between full-wave electromagnetic field emulation FET intrinsic active area source electrode and grounding through hole Negative feedback) on FET small-signal and the impact of noiseproof feature.

After obtaining the microwave noise model of this FET, also include: the microwave noise model of this FET is carried out equal proportion Extension, obtains different size and the FET microwave noise model of different laying out pattern.

Specifically, it is assumed that in the FET of above-mentioned acquisition, grid width is W, the grid width of new size FET is W_new, pass through above-mentioned steps S101, S102, obtain the model of the passive electrode part of new size FET, then, the intrinsic active part of new size FET Small-signal parameter and the method that can be extended by equal proportion of noise source parameter obtain, shown in following chart, wherein N=W_new/ W, Y represents small-signal admittance matrix.

Therefore, according to this S104 step, it is possible to obtain different size, the FET microwave noise model of different laying out pattern.

Although preferred embodiments of the present invention have been described, but those skilled in the art once know basic creation Property concept, then can make other change and amendment to these embodiments.So, claims are intended to be construed to include excellent Select embodiment and fall into all changes and the amendment of the scope of the invention.

Obviously, those skilled in the art can carry out various change and the modification essence without deviating from the present invention to the present invention God and scope.So, if these amendments of the present invention and modification belong to the scope of the claims in the present invention and equivalent technologies thereof Within, then the present invention is also intended to comprise these change and modification.

Claims (7)

1. a FET microwave noise method for establishing model, it is characterised in that include following content:

S101, is divided into four regions, respectively grid input structure, drain electrode export structure, source ground knot by FET electrode Structure, active area electrode, use full-wave electromagnetic field method analogue microwave signal transmission characteristic in described FET electrode, it is thus achieved that each The S parameter in individual region；

S102, is converted to equivalent-circuit model by FET active area electrode, and described equivalent-circuit model includes three with external connection Individual connectivity port, by the S parameter of grid input structure obtained in S101, the S parameter of drain electrode export structure and source ground The S parameter of structure is respectively connected to three connectivity ports of equivalent-circuit model, it is thus achieved that FET passive electrode model；

S103, carries out On-wafer measurement to FET, it is thus achieved that small-signal and noise testing data, and based on described test data, through the past Embedding processes, it is thus achieved that the small-signal parameter of FET intrinsic part and noise source；

S104, by the small-signal parameter obtained in S103 and noise source, according to port corresponding relation, access S102 obtain FET without In source electrode model, it is thus achieved that the microwave noise model of FET.

FET microwave noise method for establishing model the most according to claim 1, it is characterised in that in S101, described FET The grid input structure of electrode, drain electrode export structure and active area electrode are reduced to a two-port network respectively.

FET microwave noise method for establishing model the most according to claim 1, it is characterised in that specifically include before S102:

The S parameter obtained according to active area electrode in S101, is converted to Z parameter by described S parameter；

Based on described Z parameter, calculate the parasitic parameter of described active area electrode；

According to described parasitic parameter, perform S102.

FET microwave noise method for establishing model the most according to claim 1, it is characterised in that after S102, also wrap Include:

Circuit simulating software is calculated the small-signal transmission characteristic of described FET passive electrode model, and is passed by described small-signal Defeated characteristic compares with the Two-port netwerk full-wave electromagnetic field emulation data of whole FET electrode, verifies described FET passive electrode model Accuracy.

FET microwave noise method for establishing model the most according to claim 1, it is characterised in that S103 specifically includes:

FET is carried out source impedance pull test, it is thus achieved that four noise parameters of FET；

Based on described four noise parameters, it is thus achieved that the transmitted noise correlation matrix of FET；

Data are tested, successively to grid input structure, drain electrode output knot according to the small-signal that FET is carried out On-wafer measurement acquisition Structure, source ground structure and active area electrode do De-embedding by matrixing and process, it is thus achieved that the small-signal ginseng of FET intrinsic part Number；

Transmitted noise correlation matrix according to FET, successively to grid input structure, drain electrode export structure, source ground structure and Active area electrode does De-embedding by the conversion of transmitted noise correlation matrix and processes, it is thus achieved that the transmitted noise of FET intrinsic active part Correlation matrix；

According to the transmitted noise correlation matrix of FET intrinsic active part, calculate the noise source obtaining FET intrinsic active part.

FET microwave noise method for establishing model the most according to claim 1, it is characterised in that

After S104, the microwave noise model of described FET is brought in circuit simulating software, the small-signal parameter of simulation FET With four noise parameters, and simulation result and S103 will obtain the small-signal parameter of FET electrode and four noise parameters at test Contrast, verify the accuracy of described FET microwave noise model.

FET microwave noise method for establishing model the most according to claim 1, it is characterised in that after S104, also wrap Include:

The FET microwave noise model obtained by S104 carries out equal proportion extension, obtains different size and the FET of different laying out pattern Microwave noise model.