CN106226715A - Resonance digital receives system - Google Patents
Resonance digital receives system Download PDFInfo
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- CN106226715A CN106226715A CN201610816662.5A CN201610816662A CN106226715A CN 106226715 A CN106226715 A CN 106226715A CN 201610816662 A CN201610816662 A CN 201610816662A CN 106226715 A CN106226715 A CN 106226715A
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- filter
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- outfan
- frequency mixer
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R33/00—Arrangements or instruments for measuring magnetic variables
- G01R33/20—Arrangements or instruments for measuring magnetic variables involving magnetic resonance
- G01R33/44—Arrangements or instruments for measuring magnetic variables involving magnetic resonance using nuclear magnetic resonance [NMR]
- G01R33/48—NMR imaging systems
- G01R33/54—Signal processing systems, e.g. using pulse sequences ; Generation or control of pulse sequences; Operator console
Abstract
Resonance digital receives system, relates to resonance digital signal processing.It is provided with magnetic resonance reception coil, preamplifier, analog-digital converter, decimation filter, frequency mixer, frequency synthesizer, cic filter, FIR filter, compensating filter, FPGA, memorizer, host computer;Magnetic resonance reception coil successively with preamplifier, analog-digital converter, decimation filter is connected, the outfan of decimation filter is respectively with first, the input of the second frequency mixer is connected, the outfan of frequency synthesizer is respectively with first, the input of the second frequency mixer is connected, the outfan of the first frequency mixer successively with the first cic filter, first FIR filter is connected with the input of the first compensating filter, the outfan of the second frequency mixer successively with the second cic filter, second FIR filter is connected with the input of the second compensating filter, first, the outfan of the second compensating filter is connected with FPGA respectively.
Description
Technical field
The present invention relates to resonance digital signal processing, especially relate to a kind of resonance digital and receive system.
Background technology
Along with development and the maturation of software and radio technique, software and radio technique is being applied to resonance digital letter
Number process field.Magnetic resonance digital receiver is frequently with digital if receiver based on software radio if digitization principle
Structure, FID (free induction decay) radiofrequency signal is received by magnetic resonance reception coil, turns via after analog-digital converter resampling
It is changed to digital signal, then carries out digital quadrature demodulation, and process through filtering extraction, finally give the FID numeral of relatively low rate
Signal.
CIC (cascaded integrator-comb) wave filter has and realizes simple in construction, is suitable for the feature such as high magnification extraction, thus by extensively
The general filtering extraction field being applied to magnetic resonance reception machine.But, in order to more efficiently apply resampling technique to reach to carry
The purpose of high receiver signal to noise ratio, especially in the application scenario that static magnetic field strength is higher, now cic filter would operate in
(may be up to hundreds of million Hz) under higher rate, arithmetic speed and the stability of device are had higher requirement by this;Simultaneously by
Structure before the integrator in cic filter is in extraction, the operating rate of such two-forty will make integrator
Computational burden increases, and the power consumption of receiver increases therewith.It addition, traditional reception system would commonly be used for the mixed of Digital Down Convert
Frequently, after device is placed on analog-digital converter, apply resampling technique that frequency mixer will be made to be operated in resonance digital receives
Under higher frequency, the hardware effort stability build-up of pressure to frequency mixer, the performance of frequency mixer is proposed higher requirement.
Chinese patent CN103135079A discloses the method for reseptance of a kind of magnetic resonance signal, by the line in receiving coil array
Coil unit is divided into different coil unit groups;To each coil unit, set up carrier frequency and each coil list in this coil unit group
Corresponding relation between unit's received signal;According to described corresponding relation, all coils unit in this coil unit group is received
Signal carry out low noise amplification, filter and be mixed, obtain being carried on the intermediate-freuqncy signal on each corresponding carrier frequency of same channel;Right
After described intermediate-freuqncy signal is amplified and filters, export and be digitized sampling to AD conversion unit, obtain digital domain signal.
Summary of the invention
The deficiency existed when resonance digital signal processing to improve cic filter to apply, the purpose of the present invention exists
System is received in providing a kind of resonance digital.
The present invention is provided with magnetic resonance reception coil, preamplifier, analog-digital converter, the filtering extraction of poly phase improvement
Device, the first frequency mixer, the second frequency mixer, Direct Digital Synthesizer, the first cic filter, the second cic filter,
One FIR (having limit for length's unit impact response) wave filter, the second FIR filter, the first compensating filter, the second compensating filter,
FPGA (field programmable gate array), memorizer, host computer;
The described outfan of magnetic resonance reception coil is connected with the input of preamplifier, the outfan of preamplifier
It is connected with the input of analog-digital converter, the input of the decimation filter that the outfan of analog-digital converter improves with poly phase
It is connected, the outfan of the decimation filter that poly phase improves defeated with the input of the first frequency mixer and the second frequency mixer respectively
Enter end to be connected, the outfan of Direct Digital Synthesizer defeated with the input of the first frequency mixer and the second frequency mixer respectively
Entering end to be connected, the outfan of the first frequency mixer and the input of the first cic filter are connected, the outfan of the first cic filter
It is connected with the input of the first FIR filter, the outfan of the first FIR filter and the input phase of the first compensating filter
Even, the outfan of the second frequency mixer and the input of the second cic filter are connected, the outfan of the second cic filter and second
The input of FIR filter is connected, and the outfan of the second FIR filter and the input of the second compensating filter are connected, and first
The outfan of compensating filter and the outfan of the second compensating filter are connected with the input of FPGA respectively, and FPGA is respectively with upper
Position machine and memorizer are bi-directionally connected.
Band filter can be provided with between outfan and the analog-digital converter input of described preamplifier.
Present invention employs the decimation filter that poly phase improves, the operating rate of overall decimation filter is reduced.
Again in order to improve the shortcomings such as Polyphase filter extraction multiplying power is relatively low, filter factor amendment is dumb, give full play to CIC simultaneously
Wave filter realizes simple in construction, extraction multiplying power relatively advantages of higher, present invention employs the decimation filter improved at poly phase
The structure combined with cic filter.The frequency mixer being used for Digital Down Convert is placed on modulus turns to improve traditional method
The deficiency existed after parallel operation, the present invention uses after frequency mixer is positioned over the decimation filter that poly phase improves, makes
Frequency mixer away from analog-digital converter, thus alleviate frequency mixer pressure, reduce frequency mixer operating frequency.The present invention is substantially reduced
Resonance digital receives the operating frequency of some key modules of system, improves processing capability in real time, more effectively meets
In high magnetostatic field environment and high magnification resampling technique.
Accompanying drawing explanation
Fig. 1 is the composition frame chart of the embodiment of the present invention.
Fig. 2 is the theory diagram of the decimation filter that poly phase improves.
Detailed description of the invention
Seeing Fig. 1, the present invention is provided with magnetic resonance reception coil 1, preamplifier 2, analog-digital converter 4, poly phase change
Decimation filter the 5, first frequency mixer the 6, second frequency mixer 7 of entering, Direct Digital Synthesizer the 8, first cic filter 9,
Second cic filter the 10, the oneth FIR (having limit for length's unit impact response) wave filter the 11, second FIR filter 12, first compensates
Wave filter the 13, second compensating filter 14, FPGA (field programmable gate array) 15, memorizer 16, host computer 17;
Described magnetic resonance reception coil 1 receives the input of magnetic resonance radio frequency signal, and the outfan of magnetic resonance reception coil 1 is with front
The input putting amplifier 2 is connected, and the outfan of preamplifier 2 is connected with the input of analog-digital converter 4, analog-digital converter
The input of the decimation filter 5 that the outfan of 4 improves with poly phase is connected, the decimation filter 5 that poly phase improves
Outfan is connected with the input of the first frequency mixer 6 and the input of the second frequency mixer 7 respectively, Direct Digital Synthesizer
The outfan of 8 is connected with the input of the first frequency mixer 6 and the input of the second frequency mixer 7 respectively, the output of the first frequency mixer 6
End is connected with the input of the first cic filter 9, the outfan of the first cic filter 9 and the input of the first FIR filter 11
End is connected, and the outfan of the first FIR filter 11 and the input of the first compensating filter 13 are connected, the second frequency mixer 7 defeated
Go out end to be connected with the input of the second cic filter 10, the outfan of the second cic filter 10 and the second FIR filter 12
Input is connected, and the outfan of the second FIR filter 12 and the input of the second compensating filter 14 are connected, the first compensation filter
The outfan of device 13 and the outfan of the second compensating filter 14 input with FPGA 15 respectively is connected, FPGA 15 respectively with
Host computer 16 and memorizer 17 are bi-directionally connected.
Band filter 3 can be provided with between outfan and analog-digital converter 4 input of described preamplifier 2.
In FIG, labelling ssinN () is the digital local oscillator signal of the first frequency mixer 6, labelling scosN () is the second frequency mixer 7
Digital local oscillator signal;I (n) is the FID digital baseband signal of homophase, and Q (n) is orthogonal FID digital baseband signal.
The present invention proposes a kind of resonance digital and receives system.N rank cic filter design poly phase is utilized to improve
Decimation filter.Traditional N rank cic filter transmission function is:
H (z)=[(1-z-R)/(1-z-1)]N,
Wherein R is decimation factor.Assume
R=2KM,
Wherein K and M is positive integer, then transfer function H (z) can be analyzed to non-recursive part
And recursive component
From expression formula it can easily be seen that, H1(z) be decimation factor be 2KWave filter,For decimation factor
Wave filter for M.First to recursive componentDoing identical transformation, its structure is equivalent to H2Z the upper decimation factor of () cascade is M's
Withdrawal device, wherein
H2(z)=[(1-z-M)/(1-z-1)]N。
Again to non-recursive part H1Z () is done poly phase and is obtained
Wherein Ei(z) be i-th (i=0,1 ..., 2K-1) multi-phase components of the heterogeneous branch road of bar, expression formula is
Ei(z)=(ai0+ai1z-1+...+ai(N-1)z1-N),
Wherein coefficient aij(j=0 ..., N-1) together decided on by N and K.Thus obtain 2KBar poly phase branch road, i-th
One delay unit z of heterogeneous route-iCascade multi-phase componentsThe upper decimation factor of cascade is 2 againKWithdrawal device.Again to often
The heterogeneous branch road of bar carries out Nobel identical transformation, obtains the structure of i-th heterogeneous branch road for by a delay unit ziTake out in cascade
Taking the factor is 2KWithdrawal device cascade multi-phase components E againi(z);And wherein delay unit ziCan use again at the i-th-1 branch road
The upper unit delay unit z of cascade on the basis of time delay-1Structure, therefore delay unit ziCan be by unit delay unit z-1Deng
Valency is replaced.The result of the heterogeneous branch road on each road being added up by an accumulator, its result is equivalent to after poly phase
Non-recursive part H1(z).Thus, the non-recursive part after poly phase is cascaded upper H2Z () cascades decimation factor again is M
Withdrawal device, just can obtain poly phase improve decimation filter structure, as shown in Figure 2.
The workflow that reception system is complete described below:
FID radiofrequency signal is received by magnetic resonance reception coil and obtains FID analog if signal, amplifies through preamplifier
To the amplitude being suitable for analog-digital converter sampling.Filter out-of-band noise by band filter afterwards, recycle analog-digital converter pair
FID analog if signal carries out L times of resampling (usual L is more than 2) and obtains FID digital medium-frequency signal, it is assumed that its sampling rate Fs。
Afterwards FID digital medium-frequency signal being sent into the decimation filter that poly phase improves, extracting multiple is
R=2KM,
Wherein K and M is positive integer, 2KExtraction is completed by the non-recursive part after its poly phase again, and M times is extracted by recurrence
It is partially completed.
Because this resonance digital receives system and uses digital quadrature demodulation technology, it is therefore desirable to obtain homophase and orthogonal two
Road FID digital baseband signal.FID digital medium-frequency signal after being extracted by the decimation filter improved through poly phase is divided into two
Road, is separately input to the first frequency mixer and the second frequency mixer, and wherein the first frequency mixer obtains homophase FID number for Digital Down Convert
Word baseband signal, the second frequency mixer obtains orthogonal FID digital baseband signal for Digital Down Convert.First frequency mixer and second mixes
Frequently the digital local oscillator signal of device is generated by Direct Digital Synthesizer.From principle, input the numeral of the first frequency mixer
Local oscillation signal ssinN () should be with the digital local oscillator signal s of resonance digital emission systemtN () is with frequency homophase, and input second
The digital local oscillator signal s of frequency mixercosN () should be with ssinN () is with frequency, phase 90 degree.In this reception system, due to
After one frequency mixer and the second frequency mixer are positioned at the decimation filter that poly phase improves, it is assumed herein that the mould needed for certain transmitting
The frequency intending carrier signal is fc, then the digital local oscillator signal that Direct Digital Synthesizer generates is
st(n)=sin (2 π fcN),
Then can obtain Direct Digital Synthesizer and be input to the digital local oscillator signal of the first frequency mixer and be
ssin(n)=sin (2 π fc2KMn/Fs),
Direct Digital Synthesizer is input to the digital local oscillator signal of the second frequency mixer
scos(n)=cos (2 π fc2KMn/Fs)。
First frequency mixer output speed is Fs/(2KM) homophase FID digital baseband signal I1(n), the second frequency mixer output
Speed is Fs/(2KM) orthogonal FID digital baseband signal Q1(n)。
By I1N () input carries out second level extraction to the first cic filter, extracting multiple is D, and the signal after extraction is sent into
First FIR filter eliminates unnecessary frequency content, is input to the first compensating filter the most again, to revise owing to front two-stage is taken out
Take the amplitude distortion that filter passband unevenness produces;Final FID digital baseband signal I (n) exporting homophase, its speed is
Fs/(2KMD).By Q1N () input carries out second level extraction to the second cic filter, extracting multiple is D, and the signal after extraction send
Enter the second FIR filter and eliminate unnecessary frequency content, be input to the second compensating filter the most again, to revise due to front two-stage
The amplitude distortion that decimation filter passband unevenness produces;FID digital baseband signal Q (n) of final output orthogonal, its speed is
Fs/(2KMD).I (n) and Q (n) signal parallel are inputted to FPGA, FPGA carries out third time filtering extraction, K Space Reconstruction, pressure
Reduce the staff code and process to a series of signal such as host computer transmission FID data.FPGA is by the homophase FID number after compressed encoding simultaneously
Word baseband signal and orthogonal FID digital baseband signal are stored in memorizer, in order to hereafter operator is repeated several times reading
FID data message.
The present invention uses the decimation filter that poly phase improves to coordinate the structure of cic filter, by the position of extraction to
Front movement, thus alleviate the pressure of integrator in cic filter, reduce the speed ability requirement of extraction hardware.Simultaneously will be mixed
Frequently, after device is positioned over the multidirectional decimation filter decomposing and improving, the operating frequency of frequency mixer is reduced.The present invention is substantially reduced
Resonance digital receives the operating frequency of some key modules of system, improves processing capability in real time, more effectively meets
In high magnetostatic field environment and high magnification resampling technique.
Claims (2)
1. resonance digital receive system, it is characterised in that be provided with magnetic resonance reception coil, preamplifier, analog-digital converter,
The decimation filter of poly phase improvement, the first frequency mixer, the second frequency mixer, Direct Digital Synthesizer, a CIC filter
Ripple device, the second cic filter, the first FIR filter, the second FIR filter, the first compensating filter, the second compensating filter,
FPGA, memorizer, host computer;
The described outfan of magnetic resonance reception coil is connected with the input of preamplifier, the outfan of preamplifier and mould
The input of number converter is connected, the input phase of the decimation filter that the outfan of analog-digital converter improves with poly phase
Even, the outfan of the decimation filter that poly phase improves respectively with input and the input of the second frequency mixer of the first frequency mixer
End is connected, the outfan of Direct Digital Synthesizer respectively with input and the input of the second frequency mixer of the first frequency mixer
End is connected, and the outfan of the first frequency mixer and the input of the first cic filter are connected, the outfan of the first cic filter with
The input of the first FIR filter is connected, and the outfan of the first FIR filter and the input of the first compensating filter are connected,
The outfan of the second frequency mixer and the input of the second cic filter are connected, the outfan of the second cic filter and the 2nd FIR
The input of wave filter is connected, and the outfan of the second FIR filter and the input of the second compensating filter are connected, and first compensates
The outfan of wave filter and the outfan of the second compensating filter are connected with the input of FPGA respectively, FPGA respectively with host computer
It is bi-directionally connected with memorizer.
2. resonance digital receives system as claimed in claim 1, it is characterised in that the outfan of described preamplifier and mould
It is provided with band filter between number converter input.
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Cited By (1)
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---|---|---|---|---|
CN108152767A (en) * | 2017-11-30 | 2018-06-12 | 华东师范大学 | A kind of magnetic resonance signal real-time processing method based on FPGA |
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Application publication date: 20161214 |