CN106226171B - The piezoelectric semiconductor's fracture failure experiment research changed based on polarization direction - Google Patents

The piezoelectric semiconductor's fracture failure experiment research changed based on polarization direction Download PDF

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CN106226171B
CN106226171B CN201610816047.4A CN201610816047A CN106226171B CN 106226171 B CN106226171 B CN 106226171B CN 201610816047 A CN201610816047 A CN 201610816047A CN 106226171 B CN106226171 B CN 106226171B
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piezoelectric semiconductor
standard sample
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piezoelectric
mechanical stress
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CN106226171A (en
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赵明皞
秦国帅
王刚
马帅杰
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Zhengzhou University
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N3/00Investigating strength properties of solid materials by application of mechanical stress
    • G01N3/20Investigating strength properties of solid materials by application of mechanical stress by applying steady bending forces
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N2203/00Investigating strength properties of solid materials by application of mechanical stress
    • G01N2203/0058Kind of property studied
    • G01N2203/006Crack, flaws, fracture or rupture
    • G01N2203/0067Fracture or rupture

Abstract

The invention discloses the piezoelectric semiconductor's fracture failure experiment research changed based on polarization direction, including the different piezoelectric semiconductor's standard sample of production polarization direction and the precrack on piezoelectric semiconductor's standard sample;The fracture toughness experiment of piezoelectric semiconductor's standard sample is carried out under mechanical stress fields, current field, high voltage field and its coupled field loading environment;Crackle is fabricated to conducting crack simultaneously, the fracture failure characteristic of piezoelectric semiconductor's material when each physical field and its coupled field load in conducting crack;When obtaining lot of experimental data, according to the fracture failure mechanism of the above-mentioned each physical field loading environment lower piezoelectric semiconductor material of fitting experimental data and conclude the fracture failure mathematical model of piezoelectric semiconductor's material, the failure that more field condition lower piezoelectric semiconductor materials are studied from the angle of fracture damage has highly important scientific basis and practical value to the designing quality for improving piezoelectric semiconductor's device.

Description

The piezoelectric semiconductor's fracture failure experiment research changed based on polarization direction
Technical field
The invention belongs to piezoelectric semiconductor's technical field, in particular to a kind of piezoelectric semiconductor changed based on polarization direction Fracture failure experiment research.
Background technique
With the fast development of semiconductor material and piezoelectric material technology, it has been found that a kind of to have the half of piezoelectric properties concurrently Conductor material, that is, piezoelectric semiconductor, such as CdS, CdSe, ZnO, AlN, GaN.Piezoelectric semiconductor has piezoelectric material and semiconductor Material dual physical characteristic also has many advantages, such as high heat conductance, high electronics saturation, high drift velocity and big disruptive critical voltage, So becoming the ideal material for developing high-frequency high-power, high temperature resistant, Flouride-resistani acid phesphatase semiconductor microelectronics and circuit, navigate in aviation It, military affairs, satellite communication, automobile, the fields such as oil exploitation obtained very high attention, have a wide range of applications.
In the use process of electronic device, semiconductor device failure accounts for more than half of electronic device failure, semiconductor Component failure is it is usually because the local stress of material internal has been more than their maximum rating, before current technology Piezoelectric semiconductor's device on edge, the problem of equally existing larger crash rate, so ineffectiveness to the damage of piezoelectric semiconductor's material It studies particularly important.To the experimental study of piezoelectric semiconductor's material failure mechanism, piezoelectric semiconductor's device products can be improved Designing quality helps to improve the reliability of electronic equipment, to the development speed for accelerating piezoelectric semiconductor's device, improves piezoelectricity half The yield rate and reliability of conductor device all have important meaning.Also reinforcing failure analysis and failure mechanism in recent years in China The research of aspect, and some specialized laboratories are established, improve the basis for carrying out reliability consideration and condition.But current research It is to be unfolded to study based on the fermentation such as failure analysis and detection technique, reliability evaluation mostly, and for the sheet of semiconductor devices It levies material damage mechanism and mathematical model aspect research is very few, the fracture under piezoelectric semiconductor's material multi- scenarios method environment is lost Effect research is more without relevant experiment research.
In general, piezoelectric semiconductor's material is fragile material, in manufacture, polarization and use process, it is possible to create such as Crackle, hole, the defects of being mingled with;In actual application, piezoelectric semiconductor's device generally requires to bear harsh environment item Part, such as mechanical stress fields, stress field, voltage field and current field, at the same electrical stress, chemical stress, radiation stress and its He can cause piezoelectric semiconductor's device to show very strong non-linear and big strain at factor, be easy to occur near defect power and The concentration of electric load, will lead to Defect expanding under certain condition, ultimately cause the fracture failure of piezoelectric semiconductor's device.
Especially piezoelectric semiconductor, itself has piezoelectric properties, and piezoelectric charge can be generated in stress or vibration processes, Extremely complex influence generated to the extension of crackle or defect, therefore experimental study piezoelectric semiconductor polarization direction itself, is respectively answered The field of force and coupling physical field sum up the fracture of piezoelectric semiconductor's material to the fracture failure mechanism of piezoelectric semiconductor's material Fail mathematical model, has highly important scientific meaning and practical value to the design of piezoelectric semiconductor's device.Piezoelectric semiconductor Material has coupled piezoelectric material and semiconductor material dual physical property, studies the fracture failure experiment of machanics of piezoelectric semiconductor's material Problem needs to carry out under mechanical stress fields, current field, high voltage field and its coupled field loading environment;Piezoelectric semiconductor has The physical property of wide bandgap semiconductor provides extra-high voltage field loading technique and common piezoelectricity dielectric material to piezoelectric semiconductor There is very big difference, and experimental provision is required to have high adjusting, storage, registration accuracy, it is also contemplated that system entirety is exhausted Therefore edge performance is proposed very high requirement to experiment loading device and load insulation environment;However there is presently no be directed to The experiment research of this fracture failure mechanism of piezoelectric semiconductor's material.
Summary of the invention
Object of the present invention is to propose to solve above-mentioned the problems of the prior art a kind of to change based on polarization direction Fracture damage and fracture of the piezoelectric semiconductor under mechanical stress fields, current field, high voltage field and its coupled field loading environment are tough Property, piezoelectric semiconductor's material is accumulated for the sensitivity of different physical field environment, to explore above-mentioned physical field to piezoelectricity half The micromechanism of damage of conductor material.
The present invention is adopted the technical scheme that in order to solve the above problem:The piezoelectric semiconductor changed based on polarization direction is disconnected Failure experiment research is split, is included the following steps:
Step A:Use diamond cutter in the middle position prefabricated one of piezoelectric semiconductor's sample bottom surface using notch method A crackle and be fabricated to piezoelectric semiconductor's standard sample, piezoelectric semiconductor's standard sample be it is multiple;The piezoelectric semiconductor Standard sample is chamfering for four long sides of long L × wide W × high H cuboid and piezoelectric semiconductor's standard sample, and chamfering is 45 ° ± 5 °, chamfering length is C;Polarization direction in piezoelectric semiconductor's standard sample be divided into left direction, right direction, Four kinds of situations of front-rear direction or vertical direction;
Step B:Electric semiconductor standard sample will be divided in the middle part of step A to be placed on the three-point bending fixture of testing machine and crackle Downward, then tough in the fracture of the top surface of piezoelectric semiconductor's standard sample load mechanical stress progress piezoelectric semiconductor's standard sample Property experiment;
Step C:The equal silver coating in left and right end face of electric semiconductor standard sample will be divided in the middle part of step A, be then placed on test On the three-point bending fixture of machine and crackle downward, while being immersed in the experiment box for filling dimethicone, the three-point bending Fixture is using isolation material and with the intensity and hardness of corresponding requirements;Then piezoelectric semiconductor's standard sample is loaded different Current value and/or mechanical stress value, carry out in electric current field action, mechanical stress fields and current field coupled in common effect when piezoelectricity The fracture toughness of semiconductor standard sample is tested;
Step D:It is thin that the high interlayer of electrical insulating property is pasted into the left side that electric semiconductor standard sample is divided in the middle part of step A Film, the interlayer film use polytetrafluoroethylene (PTFE), and the right side in interlayer film left side and piezoelectric semiconductor's standard sample is equal Silver coating, be then placed on the three-point bending fixture of testing machine and crackle downward, while being immersed in the reality for filling with dimethicone In tryoff box, the three-point bending fixture is using isolation material and with the intensity and hardness of corresponding requirements;Then to piezoelectricity half Conductor standard sample loads different high-voltage value and/or mechanical stress value, carries out in high voltage field effect, mechanical stress fields With the fracture toughness experiment of piezoelectric semiconductor's standard sample when the effect of high voltage field coupled in common.
Further, the experiment chamber described in step C and step D is open-topped cuboid box, the cuboid The bottom surface of box is polytetrafluoroethylene solids insulating materials, is optical glass before cuboid box, cuboid box it is another Outer three sides are organic glass.
Further, in the step A, silver paste is perfused in the crackle of each piezoelectric semiconductor's standard sample and is fabricated to and leads Thunder shake line.
Further, in step B, the movement of the pressure head of testing machine controls the side combined using Bit andits control and pressure closed loop Formula includes the following steps:
Step B1:When the pressure head of experimental machine is apart from 1 millimeter of piezoelectric semiconductor's standard sample top surface, made using Bit andits control Pressure head moves down speed and is adjusted to 0.1 mm/min, while storing displacement load data;
Step B2:When the pressure head of experimental machine contacts piezoelectric semiconductor's standard sample top surface, made using pressure closed loop control It obtains pressure head to carry out the pressure-loaded of piezoelectric semiconductor's standard sample according to experiment control program, while storing pressure-loaded number According to.
Further, in the step C, piezoelectric semiconductor's standard when mechanical stress fields and the effect of current field coupled in common is carried out The fracture toughness of sample is tested, and is included the following steps:
Step C1:Galvanic electricity source is adjusted to load multiple electric currents in the left and right ends of piezoelectric semiconductor's standard sample using linear first Value, whenever loading a current value, in the top surface of piezoelectric semiconductor's standard sample, load mechanical stress carries out piezoelectric semiconductor The fracture toughness of standard sample is tested;
Step C2:Multiple mechanical stress values are loaded in the top surface of piezoelectric semiconductor's standard sample, whenever one machinery of load When stress value, galvanic electricity source is adjusted partly to lead in the left and right ends loading current value progress piezoelectricity of piezoelectric semiconductor's standard sample using linear The fracture toughness of body standard sample is tested;
The linear tune galvanic electricity source is that galvanic electricity source is adjusted in long-range control, to output current value and with voltage value have storage, Record, query function.
Further, in the step D, piezoelectric semiconductor is marked when carrying out mechanical stress fields and the effect of high voltage field coupled in common The fracture toughness of quasi- sample is tested, and is included the following steps:
Step D1:Multiple high-voltage values are loaded in piezoelectric semiconductor's standard sample left and right ends using high voltage power supply first, Whenever loading a high-voltage value, in the top surface of piezoelectric semiconductor's standard sample, load mechanical stress carries out piezoelectric semiconductor's mark The fracture toughness of quasi- sample is tested;
Step D2:Multiple mechanical stress values are loaded in the top surface of piezoelectric semiconductor's standard sample, whenever one machinery of load When stress value, piezoelectric semiconductor is carried out in the left and right ends of piezoelectric semiconductor's standard sample load high-voltage value using high voltage power supply The fracture toughness of standard sample is tested;
The high voltage power supply is 100kV long-distance intelligent power supply controlling, has storage, record, inquiry to output HIGH voltage value Function.
This experimental method(1)In the case where changing piezoelectric semiconductor's standard sample polarization direction, by mechanical stress The fracture toughness experiment of piezoelectric semiconductor's standard sample when field, current field, high voltage field and its coupled field load;(2)Simultaneously Crackle is fabricated to conducting crack, and in conducting crack, in mechanical stress fields, current field, high voltage field and its coupling The fracture toughness experiment of piezoelectric semiconductor's standard sample when the load of field;To obtain lot of experimental data, according to experimental data It fits the fracture failure mechanism of above-mentioned each physical field loading environment lower piezoelectric semiconductor material and summarizes piezoelectric semiconductor The fracture failure mathematical model of material, from the failure of the angle research piezoelectric semiconductor material of fracture damage, to raising piezoelectricity half The designing quality of conductor device has highly important scientific basis and practical value.
Detailed description of the invention
Fig. 1 is the structural schematic diagram for making piezoelectric semiconductor's standard sample;
Fig. 2 is the right view of Fig. 1;
Fig. 3 is the fracture toughness Experimental equipment one of piezoelectric semiconductor's standard sample;
Fig. 4 is the fracture toughness Experimental equipment two of piezoelectric semiconductor's standard sample.
Specific embodiment
The present invention is further described with reference to the accompanying drawing.
A kind of piezoelectric semiconductor's fracture failure experiment research changed based on polarization direction, is included the following steps:
As shown in Figure 1, Figure 2 and Figure 3, step A:Using notch method using diamond cutter in piezoelectric semiconductor's sample bottom surface The prefabricated crackle 1 in middle position and be fabricated to piezoelectric semiconductor's standard sample 2, piezoelectric semiconductor's standard sample 2 It is multiple;Piezoelectric semiconductor's standard sample 2 is long L × wide W × high H cuboid and piezoelectric semiconductor's standard sample 2 Four long sides are chamfering, wherein L >=18mm, L >=36mm or L >=45mm;W=3±0.1mm;H=4±0.1mm;Chamfering is 45°±5°;Chamfering length is C=0.12 ± 0.03mm;Polarization direction in piezoelectric semiconductor's standard sample 2 is divided into the left Four kinds of direction, right direction, front-rear direction or vertical direction situations;This size design is to effectively mechanical stress be avoided to add Stress near loading point and supporting point concentrates the interference to 1 near zone of crackle;Wherein, the width of crackle 1 is not more than 0.1mm; The depth of crackle 1 is 0.4 ± 0.2mm;The width of crackle 1 is made as no more than 0.1mm;The depth of crackle 1 is made as 0.4 ± 0.2mm is exactly to guarantee to occur at crackle 1 in fracture toughness experimentation Quick Extended, and measurement is more accurate, if splitting The width of line 1 is greater than 0.1mm or depth is greater than 0.6mm and may then occur steady-state crack propagation at precrack 1, measures at this time Fracture Toughness will be bigger than normal;
Step B:To divide in the middle part of step A electric semiconductor standard sample 2 be placed on the three-point bending fixture 8 of testing machine 9 and Downward, then in the top surface of piezoelectric semiconductor's standard sample 2, load mechanical stress carries out piezoelectric semiconductor's standard sample 2 to crackle 1 Fracture toughness experiment;Wherein, the movement of the pressure head 5 of testing machine controls the side combined using Bit andits control and pressure closed loop Formula includes the following steps:
Step B1:When the pressure head 5 of experimental machine 9 is apart from 1 millimeter of 2 top surface of piezoelectric semiconductor's standard sample, controlled using displacement System is so that pressure head 5 moves down speed and is adjusted to 0.1 mm/min, while storing displacement load data;
Step B2:When the pressure head 5 of experimental machine 9 contacts 2 top surface of piezoelectric semiconductor's standard sample, controlled using pressure closed loop So that pressure head 5 carries out the pressure-loaded of piezoelectric semiconductor's standard sample 2 according to experiment control program, while storing pressure-loaded Data.
Since piezoelectric semiconductor's material is fragile material, need to guarantee to apply within the desired time in fracture toughness experiment Add uniform stress, this is high not only for the roughness requirements on 2 surface of piezoelectric semiconductor's standard sample, also requires to apply the exhausted of point There is no deflection to vertical centering, therefore carries out the survey of fracture toughness in this test method using the method for three-point bending test Amount.
As shown in figure 3, step C:The equal silver coating 7 in left and right end face of electric semiconductor standard sample 2 will be divided in the middle part of step A, Then be placed on the three-point bending fixture 8 of testing machine 9 and crackle 1 downward, while being immersed in the experiment box for filling dimethicone 3 In 4, for the three-point bending fixture 8 using isolation material and with the intensity and hardness of corresponding requirements, the experiment chamber 4 is top The cuboid box of portion's opening, the bottom surface of the cuboid box are polytetrafluoroethylene solids insulating materials, cuboid box Front is optical glass, and the other three side of cuboid box is organic glass, while this cuboid box insulate just In the observation to experiment;Then different current value and/or mechanical stress value are loaded to piezoelectric semiconductor's standard sample 2, are carried out In electric current field action, when the effect of mechanical stress fields and current field coupled in common piezoelectric semiconductor standard sample 2 fracture toughness Experiment;
Wherein, the fracture for carrying out piezoelectric semiconductor's standard sample 2 when mechanical stress fields and the effect of current field coupled in common is tough Property experiment, include the following steps:
Step C1:Galvanic electricity source 6 is adjusted to load multiple electricity in the left and right ends of piezoelectric semiconductor's standard sample 2 using linear first Flow valuve is partly led whenever loading a current value in the top surface of piezoelectric semiconductor's standard sample 2 load mechanical stress progress piezoelectricity The fracture toughness of body standard sample 2 is tested;
Step C2:Multiple mechanical stress values are loaded in the top surface of piezoelectric semiconductor's standard sample 2, whenever one machinery of load When stress value, galvanic electricity source 6 is adjusted to carry out piezoelectricity half in the left and right ends loading current value of piezoelectric semiconductor's standard sample 2 using linear The fracture toughness of conductor standard sample 2 is tested;
The linear tune galvanic electricity source is that galvanic electricity source is adjusted in long-range control, to output current value and with voltage value have storage, Record, query function;
Experimental data is influenced in order to avoid puncturing air when to piezoelectric semiconductor's 2 loading current of standard sample, and is soaked Not tested in the experiment box 4 for filling dimethicone 3, dimethicone 3 has the function of insulation, arc extinguishing and heat dissipation, Dimethicone 3 has the characteristics that the high observation convenient for experiment of colorless and odorless transparency simultaneously.
As shown in figure 4, step D:Electrical insulating property is pasted into the left side that electric semiconductor standard sample 2 is divided in the middle part of step A High interlayer film 10, the interlayer film 10 use polytetrafluoroethylene (PTFE), thickness 1mm, in 10 left side of interlayer film and piezoelectricity The equal silver coating 7 in the right side of semiconductor standard sample 2, be then placed on the three-point bending fixture 8 of testing machine 9 and crackle 1 downward, It is immersed in the experiment chamber 4 for filling with dimethicone 3 simultaneously, the three-point bending fixture 8 is using isolation material and has phase The intensity and hardness that should be required;Then different high-voltage value and/or mechanical stress are loaded to piezoelectric semiconductor's standard sample 2 Value is carried out in high voltage field effect, piezoelectric semiconductor's standard sample 2 when mechanical stress fields and high voltage field coupled in common act on Fracture toughness experiment;
Wherein, the fracture of piezoelectric semiconductor's standard sample 2 when mechanical stress fields and the effect of high voltage field coupled in common is carried out Toughness test includes the following steps:
Step D1:Multiple high voltages are loaded in 2 left and right ends of piezoelectric semiconductor's standard sample using high voltage power supply 11 first Value is partly led whenever loading a high-voltage value in the top surface of piezoelectric semiconductor's standard sample 2 load mechanical stress progress piezoelectricity The fracture toughness of body standard sample 2 is tested;
Step D2:Multiple mechanical stress values are loaded in the top surface of piezoelectric semiconductor's standard sample 2, whenever one machinery of load When stress value, piezoelectricity half is carried out in the left and right ends of piezoelectric semiconductor's standard sample 2 load high-voltage value using high voltage power supply 11 The fracture toughness of conductor standard sample 2 is tested;
The high voltage power supply 11 is 100kV long-distance intelligent power supply controlling, has to output HIGH voltage value and stores, records, looking into Ask function.
It since the property of piezoelectric material and general piezoelectricity dielectric material are significantly different, is cannot achieve directly in its left and right two End load high voltage.With gallium nitride piezoelectric semiconductor, long L=40mm;Wide W=3mm;For high H=4mm, resistance value R= 33.33 Europe, and the electric current of high voltage power supply 11 is smaller generally in milliampere magnitude, marks so if being loaded directly into piezoelectric semiconductor Quasi- 2 both ends of sample are unable to reach high voltage, therefore are electrically insulated by pasting in the left side of piezoelectric semiconductor's standard sample 2 Property high interlayer film 10, to considerably increase the whole resistance of piezoelectric semiconductor's standard sample 2 and realize high voltage Load;Reality is influenced simultaneously in order to avoid there is high pressure arc discharge when loading high voltage to piezoelectric semiconductor's standard sample 2 Data to be tested, and is immersed in the experiment box 4 for fill dimethicone 3 and is tested, dimethicone 3 plays the role of insulation, Dimethicone 3 has the characteristics that colorless and odorless transparency is high convenient for observation experiment simultaneously.
The polarization direction that the above experimental procedure has studied in piezoelectric semiconductor's standard sample 2 is divided into left direction, to the right To piezoelectric semiconductor's standard sample 2 in the case of, front-rear direction or four kinds of vertical direction in mechanical stress fields, current field, high electricity Have a meeting, an audience, etc. well under one's control and its coupled field load when piezoelectric semiconductor's standard sample fracture toughness experiment.
In order to study in the influence to the fracture toughness of piezoelectric semiconductor's standard sample 2 in case an electrically conductive of crackle 1, Silver paste is perfused in the crackle 1 of each piezoelectric semiconductor's standard sample 2 and is fabricated to conducting crack, it then will be with conducting crack Piezoelectric semiconductor's standard sample 2 re-starts piezoelectric semiconductor's standard sample 2 in machinery according to above-mentioned experimental procedure A to step D The fracture toughness experiment of piezoelectric semiconductor's standard sample when stress field, current field, high voltage field and its coupled field load.
This experimental method in the case where changing 2 polarization direction of piezoelectric semiconductor's standard sample, by mechanical stress fields, The fracture toughness experiment of piezoelectric semiconductor's standard sample 2 when current field, high voltage field and its coupled field load;Simultaneously by crackle 1 is fabricated to conducting crack, piezoelectric semiconductor's mark when the above-mentioned each physical field and its coupled field in conducting crack load The fracture toughness of quasi- sample is tested;To obtain lot of experimental data, above-mentioned each physical field is gone out according to fitting experimental data and is added It carries the fracture failure mechanism of environment lower piezoelectric semiconductor material and summarizes the fracture failure mathematical model of piezoelectric semiconductor's material, From the failure of the angle research piezoelectric semiconductor material of fracture damage, have ten to the designing quality for improving piezoelectric semiconductor's device Divide important scientific basis and practical value.
Finally it should be noted that:The above embodiments are merely illustrative of the technical solutions of the present invention, rather than its limitations;Although Present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that:It still may be used To modify the technical solutions described in the foregoing embodiments or equivalent replacement of some of the technical features, But these are modified or replaceed, technical solution of various embodiments of the present invention that it does not separate the essence of the corresponding technical solution spirit and Range.

Claims (6)

1. the piezoelectric semiconductor's fracture failure experiment research changed based on polarization direction, which is characterized in that including walking as follows Suddenly:
Step A:It is split using diamond cutter in prefabricated one of the middle position of piezoelectric semiconductor's sample bottom surface using notch method Line and be fabricated to piezoelectric semiconductor's standard sample, piezoelectric semiconductor's standard sample be it is multiple;Piezoelectric semiconductor's standard Sample is that four long sides of long L × wide W × high H cuboid and piezoelectric semiconductor's standard sample are chamfering, chamfering is 45 ° ± 5 °, chamfering length is C;Polarization direction in piezoelectric semiconductor's standard sample is divided into left direction, right direction, front and back To or four kinds of situations of vertical direction;
Step B:Electric semiconductor standard sample will be divided in the middle part of step A to be placed on the three-point bending fixture of experimental machine and crackle court Under, then in the fracture toughness of the top surface of piezoelectric semiconductor's standard sample load mechanical stress progress piezoelectric semiconductor's standard sample Experiment;
Step C:The equal silver coating in left and right end face of electric semiconductor standard sample will be divided in the middle part of step A, be then placed on experimental machine On three-point bending fixture and crackle downward, while being immersed in the experiment chamber for filling dimethicone, the three-point bending folder Tool is using isolation material and with the intensity and hardness of corresponding requirements;Then different electricity is loaded to piezoelectric semiconductor's standard sample Flow valuve carries out the fracture toughness experiment of piezoelectric semiconductor's standard sample in electric current field action;Then to piezoelectric semiconductor's standard Sample loads different current value and mechanical stress value simultaneously, press when mechanical stress fields and current field coupled in common act on The fracture toughness of electric semiconductor standard sample is tested.
Step D:The high interlayer film of electrical insulating property, institute are pasted into the left side that electric semiconductor standard sample is divided in the middle part of step A Interlayer film is stated using polytetrafluoroethylene (PTFE), the right side in interlayer film left side and piezoelectric semiconductor's standard sample is silver-plated Layer, be then placed on the three-point bending fixture of experimental machine and crackle downward, while being immersed in the experimental box for filling with dimethicone In box, the three-point bending fixture is using isolation material and with the intensity and hardness of corresponding requirements;Then to piezoelectric semiconductor Standard sample loads different high-voltage values, and the fracture toughness for carrying out piezoelectric semiconductor's standard sample in high voltage field effect is real It tests;Then different high-voltage value and mechanical stress value are loaded to piezoelectric semiconductor's standard sample simultaneously, carried out in mechanical stress The fracture toughness experiment of piezoelectric semiconductor's standard sample when field and the effect of high voltage field coupled in common.
2. the piezoelectric semiconductor's fracture failure experiment research according to claim 1 changed based on polarization direction, It is characterized in that, the experiment chamber described in step C and step D is open-topped cuboid box, the cuboid box Bottom surface is polytetrafluoroethylene solids insulating materials, is optical glass, the other three of cuboid box before cuboid box Side is organic glass.
3. the piezoelectric semiconductor's fracture failure experiment research according to claim 2 changed based on polarization direction, It is characterized in that, in the step A, silver paste is perfused in the crackle of each piezoelectric semiconductor's standard sample and is fabricated to conduction and splits Line.
4. the piezoelectric semiconductor's fracture failure experiment according to any one of claims 1 to 3 changed based on polarization direction is ground Study carefully method, which is characterized in that in the step B, the mobile of the pressure head of experimental machine controls phase using Bit andits control and pressure closed loop In conjunction with mode, include the following steps:
Step B1:When the pressure head of experimental machine is apart from 1 millimeter of piezoelectric semiconductor's standard sample top surface, to press using Bit andits control Head moves down speed and is adjusted to 0.1 mm/min, while storing displacement load data;
Step B2:When the pressure head of experimental machine contacts piezoelectric semiconductor's standard sample top surface, controlled using pressure closed loop so that pressing Head carries out the pressure-loaded of piezoelectric semiconductor's standard sample according to experiment control program, while storing pressure-loaded data.
5. the piezoelectric semiconductor's fracture failure experiment research according to claim 4 changed based on polarization direction, It is characterized in that, in the step C, carries out piezoelectric semiconductor's standard sample when mechanical stress fields and the effect of current field coupled in common Fracture toughness experiment, includes the following steps:
Step C1:Galvanic electricity source is adjusted to load multiple current values in the left and right ends of piezoelectric semiconductor's standard sample using linear first, Whenever loading a current value, in the top surface of piezoelectric semiconductor's standard sample, load mechanical stress carries out piezoelectric semiconductor's standard The fracture toughness of sample is tested;
Step C2:Multiple mechanical stress values are loaded in the top surface of piezoelectric semiconductor's standard sample, whenever one mechanical stress of load When value, galvanic electricity source is adjusted to carry out piezoelectric semiconductor's mark in the left and right ends loading current value of piezoelectric semiconductor's standard sample using linear The fracture toughness of quasi- sample is tested;
The linear tune galvanic electricity source is that galvanic electricity source is adjusted in long-range control, has storage, record to output current value and with voltage value And query function.
6. the piezoelectric semiconductor's fracture failure experiment research according to claim 5 changed based on polarization direction, It is characterized in that, in the step D, carries out piezoelectric semiconductor's standard sample when mechanical stress fields and the effect of high voltage field coupled in common Fracture toughness experiment, include the following steps:
Step D1:Multiple high-voltage values are loaded in piezoelectric semiconductor's standard sample left and right ends using high voltage power supply first, whenever When loading a high-voltage value, in the top surface of piezoelectric semiconductor's standard sample, load mechanical stress carries out the examination of piezoelectric semiconductor's standard The fracture toughness of sample is tested;
Step D2:Multiple mechanical stress values are loaded in the top surface of piezoelectric semiconductor's standard sample, whenever one mechanical stress of load When value, piezoelectric semiconductor's standard is carried out in the left and right ends of piezoelectric semiconductor's standard sample load high-voltage value using high voltage power supply The fracture toughness of sample is tested;
The high voltage power supply is 100kV long-distance intelligent power supply controlling, has storage, record and inquiry function to output HIGH voltage value Energy.
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