CN106209098B - Digital-to-analog converter - Google Patents
Digital-to-analog converter Download PDFInfo
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- CN106209098B CN106209098B CN201610512520.XA CN201610512520A CN106209098B CN 106209098 B CN106209098 B CN 106209098B CN 201610512520 A CN201610512520 A CN 201610512520A CN 106209098 B CN106209098 B CN 106209098B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/002—Provisions or arrangements for saving power, e.g. by allowing a sleep mode, using lower supply voltage for downstream stages, using multiple clock domains or by selectively turning on stages when needed
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/04—Modifications for accelerating switching
- H03K17/041—Modifications for accelerating switching without feedback from the output circuit to the control circuit
- H03K17/04106—Modifications for accelerating switching without feedback from the output circuit to the control circuit in field-effect transistor switches
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
- H03K17/693—Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0602—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic
- H03M1/0604—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic at one point, i.e. by adjusting a single reference value, e.g. bias or gain error
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
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- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
The invention discloses a digital-to-analog converter, which comprises a decoder, a current steering module, a current source, a first operational amplifier and a first resistor, wherein the current steering module is connected with the current source; the current steering module is provided with a plurality of switch current units, and the output end of each switch current unit is connected to the total current node of the current steering module; the decoder is provided with a plurality of signal output ends which are connected with the plurality of switch current units in a one-to-one correspondence manner; the positive phase input end of the first operational amplifier is connected with a bias voltage; the output end of the first operational amplifier is a voltage output end of the digital-to-analog converter and is connected to the negative phase input end of the first operational amplifier through the first resistor; the current output of the current source and the negative phase input of the first operational amplifier are connected to the total current node. The invention can eliminate the influence of bias voltage on the output voltage swing and reduce the minimum value of the output voltage, so that the single-ended output current steering type digital-to-analog converter can be applied to low-voltage and low-power-consumption products.
Description
Technical Field
The present invention relates to the field of electronic circuit technology, and in particular, to a digital-to-analog converter.
Background
In battery-powered portable devices, single-ended voltage output digital-to-analog converters are one of the most important modules. The Current Steering Digital analog Converter (Current Steering Digital analog Converter) has high matching precision, high response speed and wide application. The buffer amplifier is used for converting the current into the voltage, and is a main technology for realizing the single-ended voltage output of the current-steering digital-to-analog converter.
Fig. 1 is a prior art single-ended voltage output current-steering based digital-to-analog converter. The current steering module is provided with a plurality of switch current units. The output op-amp is used to convert the current into an output voltage, improving the ability to drive the load. The feedback resistor Rfb and the current control switch are connected to the negative input end of the output operational amplifier. The positive input end of the output operational amplifier is connected with a bias voltage Vp, Vp has a minimum value, and when Vp is lower than the minimum value, the switch current unit can not work normally.
Due to the relationship between the virtual short and the virtual break of the operational amplifier, the current flowing through the feedback resistor Rfb is the total current Io flowing into the current source array, and the output voltage equal to the output voltage can be calculated
Vout＝Io×Rfb+Vp (1)
Since the value of Io depends on the digital logic signal, and the minimum value of Io is 0, the minimum value of Vout is Vp. For a switched current cell employing a cascode configuration of two transistors, the minimum value of the bias voltage Vp is two overdrive voltages. If a 180nm process is used, the bias voltage Vp is typically 0.4V minimum. That is, the minimum output voltage of the single-ended output current-steering type digital-to-analog converter is 0.4V. The low-voltage low-power consumption application can adopt 1.2V or even lower power supply voltage, and the minimum output voltage of 0.4V accounts for one third of the 1.2V power supply voltage, so that the single-ended output current steering type digital-to-analog converter cannot be applied to low-voltage low-power consumption products.
Disclosure of Invention
The embodiment of the invention provides a digital-to-analog converter which can eliminate the influence of bias voltage on the swing amplitude of output voltage and reduce the minimum value of the output voltage, so that the single-ended output current steering type digital-to-analog converter can be applied to low-voltage and low-power-consumption products.
The digital-to-analog converter comprises a decoder, a current steering module, a current source, a first operational amplifier and a first resistor;
the current steering module is provided with a plurality of switch current units, and the output end of each switch current unit is connected to the total current node of the current steering module;
the decoder is provided with a plurality of signal output ends which are connected with the plurality of switch current units in a one-to-one correspondence manner and used for converting input digital logic signals into control signals and controlling the corresponding switch current units to be switched on or switched off;
the positive phase input end of the first operational amplifier is connected with a bias voltage; the output end of the first operational amplifier is a voltage output end of the digital-to-analog converter and is connected to the negative phase input end of the first operational amplifier through the first resistor; the current output of the current source and the negative phase input of the first operational amplifier are connected to the total current node.
More preferably, the current source is a voltage control type current source.
In one embodiment, the current source comprises a second operational amplifier, a first NMOS transistor, a first PMOS transistor, a second PMOS transistor and a second resistor;
the positive phase input end of the second operational amplifier is connected with a control voltage; the output end of the second operational amplifier is connected with the grid electrode of the first NMOS tube; the negative phase input end of the second operational amplifier is connected with the source electrode of the first NMOS tube and is grounded through the second resistor;
the drain electrode of the first NMOS tube is connected with the drain electrode of the first PMOS tube, and is connected with the grid electrode of the first PMOS tube and the grid electrode of the second PMOS tube; the source electrode of the first PMOS tube and the source electrode of the second PMOS tube are connected to a power supply voltage; and the drain electrode of the second PMOS tube is connected with the current output end of the current source.
More preferably, the current source further comprises a third PMOS transistor, a third resistor and a fourth resistor;
the drain electrode of the second PMOS tube is connected with the current output end of the current source, and specifically comprises:
the drain electrode of the second PMOS tube is connected with the source electrode of the third PMOS tube; the drain electrode of the third PMOS tube is connected with the current output end of the current source; the grid electrode of the third PMOS tube is connected with the power supply voltage through the third resistor; and the grid electrode of the third PMOS tube is grounded through the fourth resistor.
More preferably, the bias voltage is equal to the control voltage.
In another embodiment, the current source comprises a second operational amplifier, a first PMOS transistor, a first NMOS transistor, a second NMOS transistor, and a second resistor;
the positive phase input end of the second operational amplifier is connected with a control voltage; the output end of the second operational amplifier is connected with the grid electrode of the first PMOS tube; the negative phase input end of the second operational amplifier is connected with the source electrode of the first PMOS tube and is connected with power supply voltage through the second resistor;
the drain electrode of the first PMOS tube is connected with the drain electrode of the first NMOS tube, and is connected with the grid electrode of the first NMOS tube and the grid electrode of the second NMOS tube; the source electrode of the first NMOS tube and the source electrode of the second NMOS tube are grounded; and the drain electrode of the second NMOS tube is connected with the current output end of the current source.
More preferably, the current source further comprises a third NMOS transistor, a third resistor, and a fourth resistor;
the drain electrode of the second NMOS tube is connected with the current output end of the current source, and specifically comprises the following steps:
the drain electrode of the second NMOS tube is connected with the source electrode of the third NMOS tube; the drain electrode of the third NMOS tube is connected with the current output end of the current source; the grid electrode of the third NMOS tube is connected with the power supply voltage through the third resistor; and the grid electrode of the third NMOS tube is grounded through the fourth resistor.
More preferably, the bias voltage is equal to the control voltage.
More preferably, the switching current unit includes a sub current source and a switch; the sub-current sources are connected to the total current node through the switches; the control end of the switch is connected to a corresponding signal output end of the decoder.
More preferably, the switch is a first transistor; a first connecting electrode of the first transistor is connected with the total current node, and a second connecting electrode of the first transistor is connected with the output end of the sub current source; and the control electrode of the first transistor is connected with one signal output end corresponding to the decoder.
More preferably, the switching current unit further includes a current limiting resistor and a second transistor; the first connecting electrode of the second transistor is grounded or connected with a power supply through a current-limiting resistor; a second connection electrode of the second transistor is connected with the output end of the sub current source; and the control electrode of the second transistor is connected with the inverted signal of the control electrode of the first transistor.
More preferably, the digital logic signal is N bits, and the current steering module comprises 2N-1 of said switching current cells, and the on-current of each of said switching current cells is Iu;
then the current Io flowing through the total current node is Iu × (2)N-1×bN-1+2N-2×bN-2+...+2×b1+b0)
Wherein, bN-1,bN-2...b1,b0Are N specific values of the digital logic signal.
More preferably, the digital-to-analog converter further comprises an input register; compared with the prior art, the input register is connected with the input end of the decoder and used for latching the digital logic signal to be input into the decoder, and the embodiment of the invention has the advantages that: the invention provides a digital-to-analog converter, which comprises a decoder, a current steering module, a current source, a first operational amplifier and a first resistor, wherein the current steering module is connected with the current source; the current steering module is provided with a plurality of switch current units, and the output end of each switch current unit is connected to the total current node of the current steering module; the decoder is provided with a plurality of signal output ends which are connected with the plurality of switch current units in a one-to-one correspondence manner and used for converting input digital logic signals into control signals and controlling the corresponding switch current units to be switched on or switched off; the positive phase input end of the first operational amplifier is connected with a bias voltage; the output end of the first operational amplifier is a voltage output end of the digital-to-analog converter and is connected to the negative phase input end of the first operational amplifier through the first resistor; the current output of the current source and the negative phase input of the first operational amplifier are connected to the total current node. The invention adopts a current source to generate a bias current Ib, the bias current Ib is injected into the negative input end of the output operational amplifier and flows through a first resistor R1 to generate a voltage drop Ib multiplied by R1, and the difference value between the voltage drop Ib multiplied by R1 and the bias voltage Vp is the minimum value of the output voltage of the digital-to-analog converter. When they match in size, the minimum value of the output voltage of the digital-to-analog converter can go to supply ground, so that a rail-to-rail output voltage can be achieved. The invention can eliminate the influence of bias voltage on the output voltage swing and reduce the minimum value of the output voltage, so that the single-ended output current steering type digital-to-analog converter can be applied to low-voltage and low-power-consumption products.
Drawings
FIG. 1 is a prior art single-ended voltage output current-steering based DAC;
fig. 2 is a block diagram of a digital-to-analog converter according to an embodiment of the present invention;
fig. 3 is a circuit diagram of one implementation of a current source 3 in an embodiment of the invention;
fig. 4 is a circuit diagram of another implementation of the current source 3 in the embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 2 is a block diagram of a digital-to-analog converter according to an embodiment of the present invention.
The digital-to-analog converter comprises a decoder 1, a current steering module 2, a current source 3, a first operational amplifier A1 and a first resistor R1;
the current steering module 2 is provided with a plurality of switch current units, and the output end of each switch current unit is connected to the total current node of the current steering module 2;
the decoder 1 is provided with a plurality of signal output ends which are connected with the plurality of switch current units in a one-to-one correspondence manner and used for converting input digital logic signals into control signals and controlling the corresponding switch current units to be switched on or switched off;
the positive phase input end of the first operational amplifier is connected with a bias voltage; the output end of the first operational amplifier is a voltage output end of the digital-to-analog converter and is connected to the negative phase input end of the first operational amplifier through the first resistor; the current output of the current source and the negative phase input of the first operational amplifier are connected to the total current node.
Since the first operational amplifier a1 is "short" in the imaginary, it can be obtained that the current Io flowing through the total current node is equal to the sum of the output current Ib of the current source 3 and the feedback current Ic flowing through the first resistor R1, and then the output voltage of the digital-to-analog converter
Vout＝(Io-Ib)×R1+Vp＝Io×R1+Vp-Ib×R1 (2)
Compared with the scheme in the prior art, the current source 3 connected with the total current node is introduced in the embodiment of the invention, and when the output voltage Vout of the digital-to-analog converter is calculated, the formula (2) is added with the item of-Ib multiplied by R1' compared with the formula (1), so that the influence of the bias voltage Vp on the swing of the output voltage Vout can be eliminated, the minimum value of the Vout is reduced, and the single-ended output current steering type digital-to-analog converter can be applied to products with low voltage and low power consumption.
More preferably, when Vp-Ib × R1 is 0, the minimum value of Vout is 0, and the rail-to-rail target can be achieved.
More preferably, the digital-to-analog converter further comprises an input register 4; the input register 4 is connected to the input end of the decoder 1, and is configured to latch a digital logic signal to be input to the decoder 1.
Specifically, the switching current unit includes a sub-current source and a switch; the sub-current sources are connected to the total current node through the switches; the control terminal of the switch is connected to a corresponding one of the signal output terminals of the decoder 1.
In this embodiment, the switch is a first transistor; a first connecting electrode of the first transistor is connected with the total current node, and a second connecting electrode of the first transistor is connected with the output end of the sub current source; the control electrode of the first transistor is connected to a corresponding one of the signal output terminals of the decoder 1.
More preferably, the switching current unit further includes a current limiting resistor and a second transistor; the first connecting electrode of the second transistor is grounded or connected with a power supply through a current-limiting resistor; a second connection electrode of the second transistor is connected with the output end of the sub current source; and the control electrode of the second transistor is connected with the inverted signal of the control electrode of the first transistor. Because the first transistor and the second transistor are complementary, only one of the first transistor and the second transistor is necessarily conducted, so that the sub-current source can be always kept in a conducting state, the response time of the sub-current source due to switching is reduced, and the response speed of the whole digital-to-analog converter is improved.
In this embodiment, the digital logic signal is N bits, and the current steering module 2 includes 2N-1 of said switching current cells, and the on-current of each of said switching current cells is Iu; the current flowing through the total current node
Io＝Iu×(2N-1×bN-1+2N-2×bN-2+...+2×b1+b0) (3)
Wherein, bN-1,bN-2...b1,b0For N specific values of the digital logic signal, it is determined by the digital logic signal how many current branches are conducting.
The output voltage of the digital-to-analog converter can be obtained by combining the formula (2) and the formula (3)
Vout＝Iu×(2N-1×bN-1+2N-2×bN-2+...+2×b1+b0)×R1+Vp-Ib×R1 (4)
For example, if N is 3, there are 7 switching current units in the current steering module 2; the 3-bit digital logic signal input to the decoder 1 is (1, 0, 1) from the high bit to the low bit, and 5 switching current units need to be controlled to be turned on. After receiving the digital logic signal of (1, 0, 1), the decoder 1 generates a control signal (0, 0, 1, 1, 1, 1) for turning on the 5 switching current units; each bit in the control signal corresponds to a switch of the current steering module 2, when the control signal is 0, the corresponding switch is turned off to turn off the corresponding switch current unit, and when the control signal is 1, the corresponding switch is turned on to turn on the corresponding switch current. It should be noted that the position where "1" appears in the control signal may be random, or may be preferentially allocated from a lower position, and it is within the scope of the present invention to satisfy a scheme that 5 "1" make 5 switch current units conductive.
The current steering module 2 of the present invention is not limited to the above configuration, and may include N switching current units, where the on current of the 1 st switching current unit is Iu, and the on current of the i +1 th switching current unit is twice the on current of the i th switching current unit, and then the current Io flowing through the total current node is Iu × (2 × (N-1×bN-1+2N-2×bN-2+...+2×b1+b0)
Wherein, bN-1,bN-2...b1,b0For N specific values of the digital logic signal, which current branches are conductive is determined by the digital logic signal.
More preferably, the current source 3 is a voltage control type current source.
As shown in fig. 3, it is a circuit diagram of an implementation of the current source 3 in the embodiment of the present invention.
In the one embodiment, the current source 3 includes a second operational amplifier a2, a first NMOS transistor Mn1, a first PMOS transistor Mp1, a second PMOS transistor Mp2, and a second resistor R2;
the positive phase input end of the second operational amplifier A2 is connected with a control voltage Vc; the output end of the second operational amplifier A2 is connected with the gate of the first NMOS transistor Mn 1; the negative phase input end of the second operational amplifier A2 is connected with the source electrode of the first NMOS transistor Mn1 and is grounded through the second resistor R2;
the drain electrode of the first NMOS transistor Mn1 is connected with the drain electrode of the first PMOS transistor Mp1, and is connected with the gate electrode of the first PMOS transistor Mp1 and the gate electrode of the second PMOS transistor Mp 2; the source electrode of the first PMOS tube Mp1 and the source electrode of the second PMOS tube Mp2 are connected to a power supply voltage Vdd; the drain of the second PMOS transistor Mp2 is connected to the current output terminal of the current source 3.
The second operational amplifier a2, the first NMOS transistor Mn1, and the second resistor R2 are configured to generate a current Ib0, where Ib0 ═ Vc/R2. The first PMOS transistor Mp1 and the second PMOS transistor Mp2 are used for generating a mirror current of Ib0, i.e., an output current Ib of the current source 3, Ib0 Vc/R2.
The output voltage of the digital-to-analog converter can be obtained by combining equation (4)
Vout＝Iu×(2N-1×bN-1+2N-2×bN-2+...+2×b1+b0)×R1+Vp-Vc×R1/R2 (5)
More preferably, the current source 3 further includes a third PMOS transistor Mp3, a third resistor R3, and a fourth resistor R4;
the drain of the second PMOS transistor Mp2 is connected to the current output terminal of the current source 3, specifically:
the drain electrode of the second PMOS tube Mp2 is connected with the source electrode of the third PMOS tube Mp 3; the drain electrode of the third PMOS transistor Mp3 is connected with the current output end of the current source 3; the gate of the third PMOS transistor Mp3 is connected to the power supply voltage Vdd through the third resistor R3; the gate of the third PMOS transistor Mp3 is grounded through the fourth resistor R4.
Due to the short channel modulation effect, if the third PMOS transistor PMp3 is not provided, the voltage fluctuation of the negative phase input end of the first operational amplifier a1 can directly affect the source-drain voltage of the second PMOS transistor Mp2 to affect Ib, and the deviation of Ib can cause the output voltage error of the digital-to-analog converter; when the third PMOS transistor Mp3 is present, the third PMOS transistor Mp3 is in a cascode connection mode, and the source-drain voltage of the second PMOS transistor Mp2 is mainly determined by Mp3, R3 and R4, so the Mp3 can isolate the influence of the voltage fluctuation at the negative phase input end of the first operational amplifier a1 on the Mp2, and the output current Ib is more stable.
More preferably, the control voltage Vc is equal to the bias voltage Vp. For example, the non-inverting input of the first op-amp a1 may be connected to the same voltage source at the same time as the non-inverting input of the second op-amp a 2. When the bias voltage Vp is equal to the first dc voltage, equation (5) can be deformed to obtain
Vout＝Iu×(2N-1×bN-1+2N-2×bN-2+...+2×b1+b0)×R1+Vp(1-R1/R2) (6)
At the moment, the minimum value of Vout can be adjusted by adjusting the ratio of R1 to R2, and when R1 is equal to R2, the minimum value of Vout is equal to 0, the maximum swing is achieved, and the rail-to-rail purpose is realized. The minimum value of the output voltage of the digital-to-analog converter is determined by designing the matching ratio of the first resistor R1 and the second resistor R2, so that the minimum value of the output voltage is more robust to the changes of the power supply voltage Vdd, the process and the temperature.
When the current source 3 of the present embodiment is used, the current steering module 2 should be in the state of the input Io.
As shown in fig. 4, it is a circuit diagram of another implementation of the current source 3 in the embodiment of the present invention.
In the another embodiment, the current source 3 includes a second operational amplifier a2, a first PMOS transistor Mp1, a first NMOS transistor Mn1, a second NMOS transistor Mn2, and a second resistor R2;
the positive phase input end of the second operational amplifier A2 is connected with a control voltage Vc; the output end of the second operational amplifier A2 is connected with the gate of the first PMOS tube Mp 1; the negative phase input end of the second operational amplifier A2 is connected with the source electrode of the first PMOS tube Mp1 and is connected with a power supply voltage Vdd through the second resistor R2;
the drain electrode of the first PMOS tube Mp1 is connected with the drain electrode of the first NMOS tube Mn1, and is connected with the gate electrode of the first NMOS tube Mn1 and the gate electrode of the second NMOS tube Mn 2; the source electrode of the first NMOS transistor Mn1 and the source electrode of the second NMOS transistor Mn2 are grounded; the drain of the second NMOS transistor Mn2 is connected to the current output terminal of the current source 3.
More preferably, the current source 3 further includes a third NMOS transistor Mn3, a third resistor R3, and a fourth resistor R4;
the drain of the second NMOS transistor Mn2 is connected to the current output terminal of the current source 3, specifically:
the drain electrode of the second NMOS transistor Mn2 is connected with the source electrode of the third NMOS transistor Mn 3; the drain electrode of the third NMOS transistor Mn3 is connected to the current output terminal of the current source 3; the gate of the third NMOS transistor Mn3 is connected to the power supply voltage Vdd through the third resistor R3; the gate of the third NMOS transistor Mn3 is grounded through the third resistor R3.
More preferably, the control voltage Vc is equal to the bias voltage Vp.
When the current source 3 of the present embodiment is used, the current steering module 2 should be in the state of the output Io.
It should be noted that the embodiment of the current source 3 shown in fig. 4 is different from the embodiment of the current source 3 shown in fig. 3 only in the type of the MOS transistor used and the corresponding circuit connection, and the principles and beneficial effects of the two implementations are substantially the same, and thus are not described again.
Compared with the prior art, the embodiment of the invention has the beneficial effects that: the invention provides a digital-to-analog converter, which comprises a decoder, a current steering module, a current source, a first operational amplifier and a first resistor, wherein the current steering module is connected with the current source; the current steering module is provided with a plurality of switch current units, and the output end of each switch current unit is connected to the total current node of the current steering module; the decoder is provided with a plurality of signal output ends which are connected with the plurality of switch current units in a one-to-one correspondence manner and used for converting input digital logic signals into control signals and controlling the corresponding switch current units to be switched on or switched off; the positive phase input end of the first operational amplifier is connected with a bias voltage; the output end of the first operational amplifier is a voltage output end of the digital-to-analog converter and is connected to the negative phase input end of the first operational amplifier through the first resistor; the current output of the current source and the negative phase input of the first operational amplifier are connected to the total current node. The invention adopts a current source to generate a bias current Ib, the bias current Ib is injected into the negative input end of the output operational amplifier and flows through a first resistor R1 to generate a voltage drop Ib multiplied by R1, and the difference value between the voltage drop Ib multiplied by R1 and the bias voltage Vp is the minimum value of the output voltage of the digital-to-analog converter. When they match in size, the minimum value of the output voltage of the digital-to-analog converter can go to supply ground, so that a rail-to-rail output voltage can be achieved. The invention can eliminate the influence of bias voltage on the output voltage swing and reduce the minimum value of the output voltage, so that the single-ended output current steering type digital-to-analog converter can be applied to low-voltage and low-power-consumption products.
While the foregoing is directed to the preferred embodiment of the present invention, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention.
Claims (10)
1. A digital-to-analog converter is characterized by comprising a decoder, a current steering module, a current source, a first operational amplifier and a first resistor;
the current steering module is provided with a plurality of switch current units, and the output end of each switch current unit is connected to the total current node of the current steering module;
the decoder is provided with a plurality of signal output ends which are connected with the plurality of switch current units in a one-to-one correspondence manner and used for converting input digital logic signals into control signals and controlling the corresponding switch current units to be switched on or switched off;
the positive phase input end of the first operational amplifier is connected with a bias voltage; the output end of the first operational amplifier is a voltage output end of the digital-to-analog converter and is connected to the negative phase input end of the first operational amplifier through the first resistor; the current output end of the current source and the negative phase input end of the first operational amplifier are connected to the total current node, the current source is a voltage control type current source, and the current source comprises a second operational amplifier, a first NMOS (N-channel metal oxide semiconductor) transistor, a first PMOS (P-channel metal oxide semiconductor) transistor, a second PMOS transistor and a second resistor; the positive phase input end of the second operational amplifier is connected with a control voltage; the output end of the second operational amplifier is connected with the grid electrode of the first NMOS tube; the negative phase input end of the second operational amplifier is connected with the source electrode of the first NMOS tube and is grounded through the second resistor; the drain electrode of the first NMOS tube is connected with the drain electrode of the first PMOS tube, and is connected with the grid electrode of the first PMOS tube and the grid electrode of the second PMOS tube; the source electrode of the first PMOS tube and the source electrode of the second PMOS tube are connected to a power supply voltage; the drain electrode of the second PMOS tube is connected with the current output end of the current source, the second operational amplifier, the first NMOS tube and the second resistor are used for generating a first current, the first PMOS tube and the second PMOS tube are used for generating a second current, the magnitude of the second current is consistent with that of the first current, and the magnitude of the second current is Vc/R2, wherein Vc is the magnitude of control voltage, and R2 is the resistance of the second resistor; when the bias voltage is equal to the control voltage, the positive-phase input terminal of the first operational amplifier and the positive-phase input terminal of the second operational amplifier are simultaneously connected to the same voltage source, and when R1 is equal to R2, the output voltage of the digital-to-analog converter has a minimum value, where the minimum value is equal to 0, so as to achieve the purpose of rail-to-rail, where R1 is the resistance of the first resistor.
2. The digital-to-analog converter of claim 1, wherein the current source further comprises a third PMOS transistor, a third resistor, and a fourth resistor;
the drain electrode of the second PMOS tube is connected with the current output end of the current source, and specifically comprises:
the drain electrode of the second PMOS tube is connected with the source electrode of the third PMOS tube; the drain electrode of the third PMOS tube is connected with the current output end of the current source; the grid electrode of the third PMOS tube is connected with the power supply voltage through the third resistor; and the grid electrode of the third PMOS tube is grounded through the fourth resistor.
3. The digital-to-analog converter of claim 1, wherein the current source comprises a second operational amplifier, a first PMOS transistor, a first NMOS transistor, a second NMOS transistor, and a second resistor;
the positive phase input end of the second operational amplifier is connected with a control voltage; the output end of the second operational amplifier is connected with the grid electrode of the first PMOS tube; the negative phase input end of the second operational amplifier is connected with the source electrode of the first PMOS tube and is connected with power supply voltage through the second resistor;
the drain electrode of the first PMOS tube is connected with the drain electrode of the first NMOS tube, and is connected with the grid electrode of the first NMOS tube and the grid electrode of the second NMOS tube; the source electrode of the first NMOS tube and the source electrode of the second NMOS tube are grounded; and the drain electrode of the second NMOS tube is connected with the current output end of the current source.
4. The digital-to-analog converter of claim 3, wherein the current source further comprises a third NMOS transistor, a third resistor, and a fourth resistor;
the drain electrode of the second NMOS tube is connected with the current output end of the current source, and specifically comprises the following steps:
the drain electrode of the second NMOS tube is connected with the source electrode of the third NMOS tube; the drain electrode of the third NMOS tube is connected with the current output end of the current source; the grid electrode of the third NMOS tube is connected with the power supply voltage through the third resistor; and the grid electrode of the third NMOS tube is grounded through the fourth resistor.
5. A digital-to-analog converter as claimed in claim 3 or 4, characterized in that the bias voltage is equal to the control voltage.
6. The digital-to-analog converter of claim 1, the switching current unit comprising a sub-current source and a switch; the sub-current sources are connected to the total current node through the switches; the control end of the switch is connected to a corresponding signal output end of the decoder.
7. The digital to analog converter of claim 6, the switch being a first transistor; a first connecting electrode of the first transistor is connected with the total current node, and a second connecting electrode of the first transistor is connected with the output end of the sub current source; and the control electrode of the first transistor is connected with one signal output end corresponding to the decoder.
8. The digital-to-analog converter of claim 7, the switching current unit further comprising a current limiting resistor and a second transistor; the first connecting electrode of the second transistor is grounded or connected with a power supply voltage through a current-limiting resistor; a second connection electrode of the second transistor is connected with the output end of the sub current source; and the control electrode of the second transistor is connected with the inverted signal of the control electrode of the first transistor.
9. Digital-to-analog converter according to claim 1 or 6, characterized in that the digital logic signal is N bits and the current steering module comprises 2N-1 of said switching current cells, and the on-current of each of said switching current cells is Iu;
then the current Io flowing through the total current node is Iu × (2)N-1×bN-1+2N-2×bN-2+...+2×b1+b0)
Wherein, bN-1,bN-2...b1,b0Are N specific values of the digital logic signal.
10. The digital to analog converter of claim 1, further comprising an input register; the input register is connected with the input end of the decoder and used for latching the digital logic signal to be input into the decoder.
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| CN108418586B (en) * | 2017-02-10 | 2021-09-14 | 中芯国际集成电路制造(上海)有限公司 | Single-ended output current steering digital-to-analog conversion circuit |
| CN107104673A (en) * | 2017-04-01 | 2017-08-29 | 唯捷创芯(天津)电子技术股份有限公司 | A kind of low gain error current rudder-type digital-to-analog converter, chip and communication terminal |
| CN108696278B (en) * | 2017-04-12 | 2020-10-27 | 华为技术有限公司 | Digital-to-analog converter |
| CN109309498B (en) * | 2018-11-08 | 2022-05-20 | 东南大学 | Current steering type digital-to-analog converter based on thermometer code |
| CN112787671B (en) * | 2019-10-23 | 2024-02-06 | 华润微集成电路(无锡)有限公司 | Current steering DAC circuit |
| CN112039526B (en) * | 2020-08-19 | 2022-07-12 | 北京无线电测量研究所 | Numerical control switch driving circuit applied to digital-to-analog converter |
| CN114337664B (en) * | 2022-03-09 | 2022-06-03 | 华南理工大学 | Current steering digital-to-analog converter capable of calibrating multiple gears |
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| US8723712B1 (en) * | 2013-01-16 | 2014-05-13 | Freescale Semiconductor, Inc. | Digital to analog converter with current steering source for reduced glitch energy error |
| CN104811181B (en) * | 2015-04-29 | 2017-09-15 | 南京磐能电力科技股份有限公司 | A kind of current-to-voltage converting circuit and method with input biasing and active power filtering |
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