CN106206944A - A kind of nano-film memristor and preparation method thereof - Google Patents

A kind of nano-film memristor and preparation method thereof Download PDF

Info

Publication number
CN106206944A
CN106206944A CN201610867902.4A CN201610867902A CN106206944A CN 106206944 A CN106206944 A CN 106206944A CN 201610867902 A CN201610867902 A CN 201610867902A CN 106206944 A CN106206944 A CN 106206944A
Authority
CN
China
Prior art keywords
memristor
film
nano
layer
oxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201610867902.4A
Other languages
Chinese (zh)
Inventor
李爱东
王来国
吴迪
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nanjing University
Original Assignee
Nanjing University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nanjing University filed Critical Nanjing University
Priority to CN201610867902.4A priority Critical patent/CN106206944A/en
Publication of CN106206944A publication Critical patent/CN106206944A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20Multistable switching devices, e.g. memristors
    • H10N70/24Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/301AIII BV compounds, where A is Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • C23C16/303Nitrides
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40Oxides
    • C23C16/403Oxides of aluminium, magnesium or beryllium
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40Oxides
    • C23C16/405Oxides of refractory metals or yttrium
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40Oxides
    • C23C16/407Oxides of zinc, germanium, cadmium, indium, tin, thallium or bismuth
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45523Pulsed gas flow or change of composition over time
    • C23C16/45525Atomic layer deposition [ALD]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011Manufacture or treatment of multistable switching devices
    • H10N70/021Formation of switching materials, e.g. deposition of layers
    • H10N70/023Formation of switching materials, e.g. deposition of layers by chemical vapor deposition, e.g. MOCVD, ALD

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Organic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Inorganic Chemistry (AREA)
  • Nanotechnology (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Mathematical Physics (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)

Abstract

The invention discloses a kind of nano-film memristor, including substrate, described substrate is followed successively by bottom electrode, memory storage layer, upper electrode;Memory storage layer sequentially consists of aluminum oxide film, hafnium oxide/zinc oxide or hafnium oxide/aluminium oxide coupled double-layer thin film;The invention also discloses the preparation method of memristor, utilize plasma enhanced atomic first to prepare bottom electrode titanium nitride;Use technique for atomic layer deposition, bottom electrode titanium nitride layer is sequentially depositing growth memory storage layer;The method using d.c. sputtering, physical vapour deposition (PVD) or photoetching forms the upper electrode of memristor;The memristor structure of the present invention, under pulse voltage effect, shows the Learning and Memory function of the analog neuron synapse of excellence;Being provided simultaneously with multiple-state storage function and the ability of analog neuron synapse, manufacturing process is simple, reliable, and can realize the step coverage of high-aspect-ratio, it is simple to large-scale industrial production manufacture.

Description

A kind of nano-film memristor and preparation method thereof
Technical field
The invention belongs to microelectronics technology, particularly a kind of nano-film memristor and preparation method thereof.
Background technology
Memristor, also known as memory resistor, is that the 4th kind behind relay resistance, electric capacity and inductance entrance mainstream electronic field is basic Passive electric circuit element, owing to it is as variable resistance, it is possible to " remembeing " both end voltage, changes by changing both end voltage The size of current passed through.Therefore, memristor is actually a kind of nonlinear resistance having memory function, can serve as storage unit Part.
As far back as 1971, the scientist Cai Shaotang of Chinese origin professor of Univ California-Berkeley was at research electric charge, electricity When stream, relation between voltage and magnetic flux, from Circuit theory, disclose the existence of memristor.This concept of memristor proposes After nearly 40 years, on the basis of widely studied to resistance-variable storing device, real memory resistor just in 2008 by Hewlett-Packard Finding, work is published on Nature periodical, causes the sensation of academia and industrial quarters.To existing memory resistor and system Research shows, the material system that memristor system relates to is the abundantest, also contains the Physiochemical mechanism of complexity.The few Chinese bush cherry of Cai recently Redefine again to memristor system, it is believed that every resistive system being capable of similar Lissajous curve all should belong to Memristor.One typical feature of memristor is, under electric field action, system can reflect outfield by the change of resistance state The history loaded, therefore has " memory " function, and using this feature as memory resistor or a basic criterion of system, Making " memory resistor resistance state is with the response in outfield " to become the status of equal importance with the relation of " electricity and magnetic flux ", this becomes One important criterion of memory resistor.
Memristor as a kind of brand-new storage concept, relevant research be in flourish in, lack high-quality recall Resistance device material system and the extensive memristor manufacturing technology compatible with microelectronic technique, become one of restriction memristor development Bottleneck.
Ald (ALD) is substantially a kind of special chemical vapor deposition (CVD) method, is by vaporous precursors Pulse is alternately passed through reative cell, and chemical absorption of surface reaction occurs on depositing base, thus the method forming thin film.Before Drive the body chemisorbed on surface and have from restricted and self-saturation feature, therefore can be controlled by the cycle-index of reaction The thickness of made membrane.For conventional deposition processes, ald, is lower temperature growth process, can tune accurate to thickness Control in nanometer, sub-nanometer scale, and there is three-dimensional conformability and large-area uniformity, the international semiconductor TIA of excellence (ITRS) using ALD and metal organic chemical vapor deposition, plasma enhanced chemical vapor deposition side by side as with microelectronics work The growing technology that skill is compatible, has been used to the preparation of gate medium titanium dioxide hafnio ultrathin membrane in cmos device.
Due to the memristor time memory characteristic to resistance so that it is at sunykatuib analysis, IC design, multi-state memory Have broad application prospects etc. various fields.Therefore, the artificial intelligence fields such as the calculating of class brain, neutral net are had become as new Study hotspot.Exploitation high-quality memristor material system and preparation technology are the key points of the art.
Summary of the invention
The present invention provides a kind of nano-film memristor and preparation method thereof, memristor structure under pulse voltage effect, Also show the Learning and Memory function of the analog neuron synapse of excellence;Simultaneously by ALD technique, can conveniently regulating and controlling coupled double-layer The content of Lacking oxygen in oxide.
The technical solution adopted in the present invention is: a kind of nano-film memristor, including substrate, described substrate depends on Secondary for bottom electrode, memory storage layer, upper electrode;Described memory storage layer the most successively by by alumina layer, zinc oxide/ The coupled double-layer thin film that hafnium oxide or hafnium oxide/aluminium oxide are constituted.
Further, described nano-film memristor, it is characterised in that described substrate is SiO2/ Si substrate.
Further, described bottom electrode is titanium nitride.
Further, the thickness of described bottom electrode is 30-200nm.
Further, described power on extremely conducting metal, metal alloy or conductive metallic compound.
Further, the thickness of described upper electrode is 50-200nm.
Further, described conducting metal is Al, Ti, Ni, Ru, Cu, Ag, W, Au or Pt;Described metal alloy is Pt/Ti Alloy, Cu/Ti alloy, Cu/Au alloy or Cu/Al alloy.
Further, in described memory storage layer, the aluminum oxide film film thickness of neighbouring TiN electrode is fixed as 3nm;Oxygen on it Changing hafnium/zinc oxide bilayer film thickness is 4-8nm/4-8nm, and described hafnium oxide/aluminium oxide bilayer film thickness is 4- 8nm/4-8nm。
The invention also discloses the preparation method of a kind of nano-film memristor, specifically comprise the following steps that
(1) with silicon chip as substrate, plasma enhanced atomic is utilized first to prepare bottom electrode titanium nitride;
(2) use technique for atomic layer deposition, bottom electrode titanium nitride layer is sequentially depositing growth aluminum oxide film, zinc-oxide film The memory storage layer constituted with hafnia film;
(3) method using d.c. sputtering, physical vapour deposition (PVD) or photoetching forms the upper electrode of memristor.
The present invention is relative to the beneficial effect of prior art:
(1) by ALD technique, can the content of Lacking oxygen in conveniently regulating and controlling oxide memory storage layer.Thus, by changing device Upper applying voltage direction and size, can obtain the high low resistance state of difference of device, and then realize multiple-state storage.
(2) the memristor structure of the present invention is under pulse voltage effect, shows the study of the analog neuron synapse of excellence With memory function;It is provided simultaneously with multiple-state storage function and the ability of analog neuron synapse of excellence;
(3) preparation technology of the present invention, make use of the technique for atomic layer deposition that traditional CMOS technology compatibility is novel, technique letter Single, reliable, the Al of growth2O3Thin film and HfO2And ZnO film uniformity, compactness and conformability are excellent, can accuracy controlling three The thickness of layer nano thin-film, and the step coverage of high-aspect-ratio can be realized, it is simple to large-scale industrial production manufacture.
Accompanying drawing explanation
Fig. 1 is Pt/HfO of the present invention2/ZnO/Al2O3/ TiN memristor organigram;
Fig. 2 is Pt/HfO in the embodiment of the present invention 12/ZnO/Al2O3/ TiN memristor device is swept at direct current when being in original state Retouch the current-voltage characteristic curve test figure under voltage.
Fig. 3 is Pt/HfO in the embodiment of the present invention 12/ZnO/Al2O3Reset continuously under/TiN memristor DC voltage sweep- Current-voltage characteristic curve test figure under continuous reset state.
Fig. 4 is Pt/HfO in the embodiment of the present invention 12/ZnO/Al2O3Electric current-electricity under/TiN memristor pulse voltage effect Pressure characteristic curve test figure.
Fig. 5 is Pt/HfO in the embodiment of the present invention 12/ZnO/Al2O3Electricity when/TiN memristor structure electric current changes over The increasing or decreasing change test figure of stream.
Fig. 6 is Pt/HfO in the embodiment of the present invention 12/ZnO/Al2O3In/TiN memristor structure, higher pulse voltage or The pulse voltage of person's last longer all can make the column test figure that current changing rate increases.
Fig. 7 is Pt/HfO in the embodiment of the present invention 12/ZnO/Al2O3In/TiN memristor structure, current value is with increasing continuously Or the pulse voltage number of times that reduces continuously and the test figure that changes.
Fig. 8 is Pt/Al in the embodiment of the present invention 32O3/HfO2/Al2O3Electric current under/TiN memristor pulse voltage effect- Voltage response test figure.
Fig. 9 is Pt/Al in the embodiment of the present invention 32O3/HfO2/Al2O3In/TiN memristor structure, higher pulse voltage Or the pulse voltage of last longer all can make the column test figure that current changing rate increases.
Figure 10 is Pt/Al in the embodiment of the present invention 32O3/HfO2/Al2O3In/TiN memristor structure, current value is with increasing continuously The pulse voltage number of times added or reduce continuously and the test figure changed.
Figure 11 is Au/Al in the embodiment of the present invention 52O3/HfO2/Al2O3/ TiN memristor continuous impulse scanning voltage effect Under current-voltage characteristic curve test figure.
Figure 12 is Ru/Al in the embodiment of the present invention 62O3/ZnO/HfO2Under/TiN memristor continuous impulse scanning voltage effect Current-voltage characteristic curve test figure.
Detailed description of the invention
Below in conjunction with accompanying drawing, embodiment of the present invention is described further.
Embodiment 1
(1) to clean SiO2/ Si silicon chip is substrate, utilizes plasma enhanced atomic first to prepare bottom electrode TiN, specifically Step is as follows:
TiN growth temperature is 400 DEG C, with TiCl4、NH3Plasma respectively as Ti and N source, wherein TiCl4Pulse time Between be 0.1 second, carrier gas is High Purity Nitrogen (99.999%) and simultaneously as purgative gas, and its scavenging period is 4 seconds;NH3Plasma Carrier gas be high-purity argon (99.999%), its burst length is 24 seconds, and High Purity Nitrogen is 6 seconds as the scavenging period of purgative gas, TiCl4Source temperature be room temperature, in this enforcement, TiN thickness is 30nm.
(2) technique for atomic layer deposition is used to grow lower floor's aluminum oxide film, zinc-oxide film successively in bottom electrode TiN layer The memory storage layer constituted with hafnia film, atom layer deposition process condition is: functional membrane growth temperature is 250 DEG C, with three Aluminium methyl, diethyl zinc, four-dimethylamino ethylamine base hafnium and secondary deionized water are respectively as the source of Al, Zn, Hf and O, source, each road Burst length be 0.1 second, carrier gas is High Purity Nitrogen (99.999%) and simultaneously as purgative gas, and its scavenging period is 4 seconds. Four-dimethylamino ethylamine base hafnium source temperature is 155 DEG C, trimethyl aluminium, diethyl zinc and H2O source temperature is all room temperature.
Lower floor aluminium oxide (Al in (bottom electrode) TiN layer in the present embodiment2O3) film thickness is 3nm;Zinc oxide (ZnO) Film thickness is 5nm;Hafnium oxide (HfO2) film thickness is 5nm.
In actual mechanical process, lower floor's aluminium oxide thickness keeps 3nm constant, and its performance during the two thickness correspondent equal Optimum, when ZnO value is 5nm, HfO2Also it is 5nm,Total memory layer thickness is 13nm.
(3) with the method for d.c. sputtering, Pt being formed upper electrode, its thickness is 100nm, i.e. obtains complete memristor knot Structure, as it is shown in figure 1, be followed successively by from top to bottom, upper electrode, hafnia film, zinc-oxide film, aluminum oxide film, bottom electrode, silicon Substrate.
In actual operating process, it is possible to use the conductive metallic materials such as Au or Ru, sink with d.c. sputtering, physical vapor The techniques such as long-pending or photoetching form electrode on resistance-variable storing device.
By Semiconductor Parameter Analyzer, the electrology characteristic of the memristor that the present embodiment obtains is tested, test result As shown in Fig. 2,3,4,5,6,7.
Wherein Fig. 2 is that embodiment memristor current-voltage when being in original state under dc sweeps voltage effect is special Linearity curve test figure, device shows typical ambipolar resistive switching behaviour, is more than through investigating its on-off ratio (HRS/LRS) 10。
Fig. 3 is that under the present embodiment memristor DC voltage sweep, the current-voltage under replacement-continuous reset state is special continuously Linearity curve test figure.General resistance-variable storing device can only be at two different voltages, it is achieved the storage of two different resistances.This reality Execute example, from the beginning of 1.15V, often increase 0.05V and resistance just can be made to improve a step, until resistance value reaches saturated shape during 1.7V State, resistance value no longer changes, and obtains 11 different resistance values altogether.Stopping in any resistance, state does not changes, until next Individual scanning voltage is come.Meanwhile, resistance can load reverse restriction electric current and is allowed to gradually restore.The most same device can Realize the storage of different stage.This setting continuously limits electric current or arranges resetting voltage continuously so that device is from high-impedance state Vary continuously to low resistance state or to be varied continuously to high-impedance state for realizing the multistage storage of device by low resistance state be extremely important 's.
Current-voltage characteristic curve test under Fig. 4 the present embodiment memristor pulse voltage effect.Fig. 4 is at continuous arteries and veins (forward is 0 to 1.4V, and pulse width is 100 milliseconds to rush voltage;Being reversed 0 to-0.6V, pulse width is 100 milliseconds) scanning Under, in device, current value continuously reduces respectively or increases continuously.In addition to multiple-state storage step by step, memristor storage numerical digit letter Cease the most extremely important.General resistance-variable storing device can only realize the binary storage between " 0 " and " 1 ", and in this example Memristor, device has only to just to allow with the pulse of 1.4V resistance improve a step, then can improve again with a 1.4V pulse again One step.Just making device enter saturation with 6 such pulses, resistance no longer changes.Stopping in any resistance, state does not changes Become, until next pulse is come.Reverse six pulse can also be loaded be allowed to restore.That is each storage in this example Unit has 6 different conditions, which achieves multi-system storage, and this example can realize at least senary storage, so that storage Density is greatly increased.Meanwhile, this is also very similar to the multiple case of neuron memory, for realizing (emulation) similar biological neural The function of synapse is laid a good foundation.
According to the concept of memristor, the memory resistor that this example is mentioned is can to distinguish with continually varying character based on resistance In resistive formula memorizer, and the quantity of electric charge that flows through is depended in this change, and its change simultaneously can keep after power is turned off.This The nonlinear transmission characteristic (transfer rate of nerve synapse stimulates with outer signals and changes) of one characteristic and nerve synapse Similar.In order to clearly demonstrate the trend of such a change, depict Fig. 5 electric current and voltage versus time curve figure. As it is shown in figure 5, be Pt/HfO in the embodiment of the present invention2/ZnO/Al2O3/ TiN memristor structure electric current changes over (pulse time Number increase) time electric current increasing or decreasing change test figure, its numerical value is corresponding with Fig. 4.It is obvious that along with pulse (voltage) is secondary The increase (minimizing) of number, pulse current reduces (increasing) accordingly, and corresponding resistance value is just to increase (minimizing).This feature Simulating the function of nerve synapse completely, device creates memory to its charge number flowed through.
The electric conductivity size of this device can also be by adjusting the persistent period of the potential pulse applied and the big of amplitude Little carry out.Higher amplitude and long-term pulse can make electric conductivity (current values) be increased or decreased faster, As shown in Figure 6.If we are using the electric conductivity of memory resistor as a synapse weight, above-mentioned phenomenon is then dashed forward with biological neuron Touch the nonlinear transmission characteristic shown and there is close similarity.Fig. 6 is in embodiment memristor structure, higher pulse The pulse voltage of voltage or last longer all can make the column test figure that current changing rate increases.
Fig. 7 is in embodiment memristor structure, and current value becomes with the pulse voltage number of times increased continuously or reduce continuously The test figure changed.
Knowable to result illustrated above, the electrology characteristic that the memory resistor in the present embodiment is had, i.e. resistance can connect Continue and change and resistance value state can be kept, be that typical case's memristor is exclusive.
Memory resistor in the present embodiment is expected in terms of realizing multistage multiple-state storage and analog neuron synapse realize dashing forward Broken.
Embodiment 2
Except the lower floor aluminium oxide (Al in bottom electrode TiN layer in the present embodiment2O3) film thickness is 3nm;Zinc oxide (ZnO) is thin Film thickness is 4nm;Hafnium oxide (HfO2) film thickness is 4nm, other detailed description of the invention are identical with above-described embodiment 1.
Embodiment 3
(1) to clean SiO2/ Si silicon chip is substrate, utilizes plasma to strengthen ald growth 30nm thickness hearth electrode TiN;
(2) utilize ald grow successively on hearth electrode TiN the aluminum oxide film of 3nm, 5nm, 5nm, hafnia film, Aluminum oxide film, total memory layer thickness is 13nm;
(3) utilize the Pt of Q150T S (Quorum Technologies) sputter coating instrument deposition metal 200nm as powering on Pole, i.e. obtains this memory resistor structure, as it is shown in figure 1, be followed successively by from top to bottom, upper electrode, aluminum oxide film, and hafnium oxide is thin Film, aluminum oxide film, bottom electrode, silicon chip.
Utilize Semiconductor Parameter Analyzer to combine Cascade probe station and this memory resistor is carried out electrical performance testing, survey Test result as shown in Figure 8,9, 10, its result and above-mentioned HfO2/ZnO/Al2O3Performance be similar to, have equally multiple-state storage effect and Analog neuron synaptic function.
Embodiment 4
Except the lower floor Al in bottom electrode TiN layer in the present embodiment2O3Film thickness is 3nm, HfO2Film thickness is 8nm, upper strata Al2O3Film thickness is 8nm, and total memory layer thickness is 19nm, and other detailed description of the invention are identical with above-described embodiment 3..
Embodiment 5
The present embodiment uses Au conductive metallic material, is lithographically formed the upper electrode of memory resistor after using d.c. sputtering.
(1) to clean SiO2/ Si silicon chip is substrate, utilizes plasma enhanced atomic first to prepare bottom electrode TiN, In this enforcement, TiN thickness is 60nm.
(2) technique for atomic layer deposition is used to grow lower floor's aluminum oxide film, hafnia film successively in bottom electrode TiN layer The memory storage layer constituted with aluminum oxide film, the lower floor Al in hearth electrode TiN layer in the present embodiment2O3Film thickness is 3nm, HfO2Film thickness is 4nm, upper strata Al2O3Film thickness is 4nm, and total memory layer thickness is 11nm.
(3) with the method for d.c. sputtering then photoetching, Au being formed upper electrode, its thickness is 200nm, i.e. obtains complete Memristor structure.
Figure 11 is the current-voltage characteristic curve test figure under the present embodiment memristor continuous impulse scanning voltage effect. At continuous impulse voltage, (forward is 0 to 1.2V, and pulse width is 100 milliseconds;Being reversed 0 to-0.6V, pulse width is 100 millis Second) scanning under, in device, current value continuously reduces respectively or increases continuously.
Embodiment 6
The present embodiment uses Ru conductive metallic material, uses the technique of physical vapour deposition (PVD) to form the upper electrode of memory resistor.
(1) to clean SiO2/ Si silicon chip is substrate, utilizes plasma enhanced atomic first to prepare bottom electrode TiN, In this enforcement, TiN thickness is 200nm.
(2) technique for atomic layer deposition is used to grow lower floor's aluminum oxide film, hafnia film successively in bottom electrode TiN layer The memory storage layer constituted with aluminum oxide film, the lower floor Al in hearth electrode TiN layer in the present embodiment2O3Film thickness is 3nm; ZnO film thickness is 8nm;Upper strata HfO2Film thickness is 8nm, and total memory layer thickness is 19nm.
(3) with the method for physical vapour deposition (PVD), Ru being formed upper electrode, its thickness is 50nm, i.e. obtains complete memristor Structure.
Figure 12 is the current-voltage characteristic curve test figure under the present embodiment memristor continuous impulse scanning voltage effect. At continuous impulse voltage, (forward is 0 to 1.6V, and pulse width is 100 milliseconds;Being reversed 0 to-0.4V, pulse width is 100 millis Second) scanning under, in device, current value continuously reduces respectively or increases continuously.

Claims (9)

1. a nano-film memristor, including substrate, it is characterised in that described substrate is followed successively by bottom electrode, memory Accumulation layer, upper electrode;Described memory storage layer the most successively by alumina layer, zinc oxide/hafnium oxide or hafnium oxide/ The coupled double-layer thin film that aluminium oxide is constituted.
Nano-film memristor the most according to claim 1, it is characterised in that described substrate is SiO2/ Si substrate.
Nano-film memristor the most according to claim 1, it is characterised in that described bottom electrode is titanium nitride.
Nano-film memristor the most according to claim 3, it is characterised in that the thickness of described bottom electrode is 30- 200nm。
Nano-film memristor the most according to claim 1, it is characterised in that described power on extremely conducting metal, gold Belong to alloy or conductive metallic compound.
Nano-film memristor the most according to claim 5, it is characterised in that the thickness of described upper electrode is 50- 200nm。
Nano-film memristor the most according to claim 5, it is characterised in that described conducting metal is Al, Ti, Ni, Ru, Cu, Ag, W, Au or Pt;Described metal alloy is Pt/Ti alloy, Cu/Ti alloy, Cu/Au alloy or Cu/Al alloy.
Nano-film memristor the most according to claim 1, it is characterised in that neighbouring TiN in described memory storage layer The aluminum oxide film film thickness of electrode is fixed as 3nm;Described hafnium oxide/zinc oxide bilayer film thickness is 4-8nm/4-8nm; Described hafnium oxide/aluminium oxide bilayer film thickness is 4-8nm/4-8nm.
9. the preparation method of a nano-film memristor, it is characterised in that specifically comprise the following steps that
(1) with silicon chip as substrate, plasma enhanced atomic is utilized first to prepare bottom electrode titanium nitride;
(2) use technique for atomic layer deposition, bottom electrode titanium nitride layer is sequentially depositing growth aluminum oxide film, zinc oxide/oxygen Change hafnium thin film or the memory storage layer of hafnium oxide/aluminium oxide composition;
(3) method using d.c. sputtering, physical vapour deposition (PVD) or photoetching forms the upper electrode of memristor.
CN201610867902.4A 2016-09-29 2016-09-29 A kind of nano-film memristor and preparation method thereof Pending CN106206944A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201610867902.4A CN106206944A (en) 2016-09-29 2016-09-29 A kind of nano-film memristor and preparation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610867902.4A CN106206944A (en) 2016-09-29 2016-09-29 A kind of nano-film memristor and preparation method thereof

Publications (1)

Publication Number Publication Date
CN106206944A true CN106206944A (en) 2016-12-07

Family

ID=57521279

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610867902.4A Pending CN106206944A (en) 2016-09-29 2016-09-29 A kind of nano-film memristor and preparation method thereof

Country Status (1)

Country Link
CN (1) CN106206944A (en)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019218447A1 (en) * 2018-05-14 2019-11-21 浙江大学 Ternary content addressable memory based on memory diode
CN111883656A (en) * 2020-09-11 2020-11-03 国家纳米科学中心 Memristor and preparation method thereof
CN112262434A (en) * 2018-06-14 2021-01-22 默克专利有限公司 Method for producing electronic components comprising a self-assembled monolayer
CN112289930A (en) * 2020-10-29 2021-01-29 华中科技大学 Cu with volatility and non-volatilityxO memristor and regulation and control method thereof
CN112510148A (en) * 2020-12-08 2021-03-16 扬州大学 Resistive random access memory and preparation method thereof
CN112909166A (en) * 2021-01-26 2021-06-04 天津理工大学 Nerve synapse bionic device based on polyelectrolyte double-layer structure
CN113380948A (en) * 2021-06-10 2021-09-10 西交利物浦大学 Synaptic memristor with multi-level storage function and preparation method thereof
CN113517391A (en) * 2020-09-24 2021-10-19 中国科学院微电子研究所 Memristor, preparation method and nerve morphology calculation chip based on full memristor
CN113594025A (en) * 2021-06-11 2021-11-02 河北大学 Preparation method of silicon-based molecular beam heteroepitaxial growth material, memristor and application
CN113838975A (en) * 2021-09-30 2021-12-24 中国科学院微电子研究所 Semiconductor structure, preparation method, resistive random access memory and resistive random access memory array
WO2023137844A1 (en) * 2022-01-18 2023-07-27 中国科学院微电子研究所 Three-dimensional reservoir based on volatile three-dimensional memristor and manufacturing method therefor
CN116507195A (en) * 2023-06-21 2023-07-28 武汉大学 Based on WO x /YO y Preparation method of double-heterojunction structure analog memristor

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140027702A1 (en) * 2011-07-13 2014-01-30 Rutgers, The State University Of New Jersey Multifunctional zinc oxide nano-structure-based circuit building blocks for re-configurable electronics and optoelectronics
CN104733612A (en) * 2015-03-06 2015-06-24 南京大学 Resistive random access memory and manufacturing method thereof
CN105161617A (en) * 2015-09-23 2015-12-16 复旦大学 Resistive random access memory with planar structure and manufacturing method thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140027702A1 (en) * 2011-07-13 2014-01-30 Rutgers, The State University Of New Jersey Multifunctional zinc oxide nano-structure-based circuit building blocks for re-configurable electronics and optoelectronics
CN104733612A (en) * 2015-03-06 2015-06-24 南京大学 Resistive random access memory and manufacturing method thereof
CN105161617A (en) * 2015-09-23 2015-12-16 复旦大学 Resistive random access memory with planar structure and manufacturing method thereof

Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11848052B2 (en) 2018-05-14 2023-12-19 Zhejiang University Ternary content addressable memory based on memory diode
WO2019218447A1 (en) * 2018-05-14 2019-11-21 浙江大学 Ternary content addressable memory based on memory diode
US11328774B2 (en) 2018-05-14 2022-05-10 Zhejiang University Ternary content addressable memory based on memory diode
CN112262434A (en) * 2018-06-14 2021-01-22 默克专利有限公司 Method for producing electronic components comprising a self-assembled monolayer
CN111883656A (en) * 2020-09-11 2020-11-03 国家纳米科学中心 Memristor and preparation method thereof
CN113517391A (en) * 2020-09-24 2021-10-19 中国科学院微电子研究所 Memristor, preparation method and nerve morphology calculation chip based on full memristor
CN113517391B (en) * 2020-09-24 2024-02-02 中国科学院微电子研究所 All-memristor-based neuromorphic calculation chip and preparation method thereof
CN112289930A (en) * 2020-10-29 2021-01-29 华中科技大学 Cu with volatility and non-volatilityxO memristor and regulation and control method thereof
CN112289930B (en) * 2020-10-29 2022-08-05 华中科技大学 CuxO memristor with volatility and non-volatility and regulation and control method thereof
CN112510148A (en) * 2020-12-08 2021-03-16 扬州大学 Resistive random access memory and preparation method thereof
CN112909166A (en) * 2021-01-26 2021-06-04 天津理工大学 Nerve synapse bionic device based on polyelectrolyte double-layer structure
CN113380948A (en) * 2021-06-10 2021-09-10 西交利物浦大学 Synaptic memristor with multi-level storage function and preparation method thereof
CN113594025A (en) * 2021-06-11 2021-11-02 河北大学 Preparation method of silicon-based molecular beam heteroepitaxial growth material, memristor and application
CN113594025B (en) * 2021-06-11 2023-07-28 河北大学 Preparation method of silicon-based molecular beam heteroepitaxial growth material, memristor and application
CN113838975A (en) * 2021-09-30 2021-12-24 中国科学院微电子研究所 Semiconductor structure, preparation method, resistive random access memory and resistive random access memory array
WO2023137844A1 (en) * 2022-01-18 2023-07-27 中国科学院微电子研究所 Three-dimensional reservoir based on volatile three-dimensional memristor and manufacturing method therefor
CN116507195A (en) * 2023-06-21 2023-07-28 武汉大学 Based on WO x /YO y Preparation method of double-heterojunction structure analog memristor
CN116507195B (en) * 2023-06-21 2023-10-17 武汉大学 Based on WO x /YO y Preparation method of double-heterojunction structure analog memristor

Similar Documents

Publication Publication Date Title
CN106206944A (en) A kind of nano-film memristor and preparation method thereof
WO2021128994A1 (en) Superlattice memristor functional layer material, and memristor unit and preparation method therefor
Qu et al. Recent progress in tungsten oxides based memristors and their neuromorphological applications
CN101864592B (en) Ferroelectric metal hetero-junction based memristor and preparation method thereof
Liu et al. An electronic synaptic device based on HfO2TiOx bilayer structure memristor with self-compliance and deep-RESET characteristics
CN104733612B (en) A kind of resistance-variable storing device and preparation method thereof
WO2013073993A2 (en) Memristor based on a mixed metal oxide
Tian et al. Bivariate-continuous-tunable interface memristor based on Bi 2 S 3 nested nano-networks
Jiang et al. Linearity improvement of HfOx-based memristor with multilayer structure
Hu et al. High speed and multi-level resistive switching capability of Ta2O5 thin films for nonvolatile memory application
Ali et al. Versatile GeS-based CBRAM with compliance-current-controlled threshold and bipolar resistive switching for electronic synapses
CN108231823A (en) A kind of niobium oxide gating device and its manufacturing method based on zirconium oxide tunnel layer
Chen et al. The resistive switching characteristics in TaON films for nonvolatile memory applications
Chang Tungsten Oxide Memristive Devices for Neuromorphic Applications.
Min et al. The Effects of Si Doping on the Endurance and Stability Improvement of AlN-Based Resistive Random Access Memory
Wang et al. Vacancy-induced resistive switching and synaptic behavior in flexible BST@ Cf memristor crossbars
CN102820428A (en) Improved oxide-film resistance changing memory and improvement method thereof
CN110416404A (en) A kind of ultrafast resistance-variable storing device and its resistance state control method
Zhan et al. Digital and analog functionality in monolayer AlOx-based memristors with various oxidizer sources
Kumari et al. Analog resistive switching behavior in BiCoO3 thin film
CN112018236A (en) PZT-based memristor device, and preparation method and application thereof
RU202461U1 (en) Memristive synapse
KR101721162B1 (en) Proton-based resistive switching memory and method of fabricating the same
KR102564866B1 (en) Double-oxide based IGZO memtransistor and manufacturing method thereof
CN110957377B (en) Memory container based on MOS (metal oxide semiconductor) transistor and preparation method thereof

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication

Application publication date: 20161207

RJ01 Rejection of invention patent application after publication