CN106206749A - 一种具有不饱和特性的肖特基晶体管及其制备方法 - Google Patents

一种具有不饱和特性的肖特基晶体管及其制备方法 Download PDF

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CN106206749A
CN106206749A CN201610847794.4A CN201610847794A CN106206749A CN 106206749 A CN106206749 A CN 106206749A CN 201610847794 A CN201610847794 A CN 201610847794A CN 106206749 A CN106206749 A CN 106206749A
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doping
high resistant
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杨建红
陈健
肖彤
庞正鹏
王欣
谌文杰
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Lanzhou University
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Abstract

本发明公开一种具有不饱和特性的肖特基晶体管及其制备方法。本发明的器件由漏极以及设置于漏极上的N+掺杂的低阻单晶衬底，位于N+掺杂的低阻单晶衬底上的N‑掺杂的高阻外延层、位于N‑掺杂的高阻外延层表面的两个P+掺杂的界面栅区，两个分别位于P+掺杂的界面栅区上的栅电极，和两个栅电极之间位于N‑掺杂高阻外延层表面的源电极构成。本器件是一种单极性工作模式的器件，且具有不饱和的类三极管的I‑V特性，器件的失真度小，抗干扰性能好，对于静电感应晶体管的简化和肖特基二极管的改进具有重要的意义。

Description

一种具有不饱和特性的肖特基晶体管及其制备方法
技术领域
本发明属于电子元器件技术领域，具体地说是一种具有不饱和特性的肖特基晶体管及其制备方法。
背景技术
随着信息产业的发展，人们对于晶体管的性能要求越来越高，就拿市场上主要应用的晶体管：场效应晶体管和晶体三极管而言，场效应晶体管具有许多的寄生效应，比如说栅诱导泄漏电流(GIDL)和漏致势垒降低效应(DIBL)等，而晶体三极管是双极性器件，工作速度比较慢，并且场效应晶体管和晶体三极管的电流—电压特性曲线都表现出饱和的特性，因此，当器件应用到放大电路中时，一旦输出端超出器件的信息承载范围，电路就会发生信号失真。
发明内容
本发明提供一种具有不饱和特性的肖特基晶体管及其制备方法，通过利用金属半导体肖特基结产生，具有开关频率高、散热性能好、噪声小等优点。
为实现上述目的，本发明所述的一种具有不饱和特性的肖特基晶体管，其特征在于：由漏极以及设置于漏极上的N+掺杂的低阻单晶衬底，位于N+掺杂的低阻单晶衬底上的N-掺杂的高阻外延层、位于N-掺杂的高阻外延层表面的两个P+掺杂的界面栅区，两个分别位于P+掺杂的界面栅区上的栅电极，和两个栅电极之间位于N-掺杂高阻外延层表面的源电极构成。
所述源极处设置于两个栅电极之间的中央位置。
所述N-掺杂的高阻外延层表面与P+掺杂的界面栅区之间形成pn结，N-掺杂的高阻外延层表面与源电极之间形成肖特基结。
所述N+掺杂的低阻单晶衬底为N+型低阻单晶硅切片。
本发明所述一种具有不饱和特性的肖特基晶体管的制备方法，实现步骤如下：
(1)采用N+型低阻单晶硅切片作为衬底材料，在该衬底片上生长一层N-掺杂的高阻外延层，在N-掺杂的高阻外延层上制作肖特基晶体管，其中肖特基晶体管是在N-掺杂的高阻外延层的基础上采用离子注入的方法掺杂形成栅区；在N-掺杂的高阻外延层的基础上采用淀积金属形成金半肖特基接触的方法形成源极处；
(2)先将与N-掺杂的高阻外延层沟道形成肖特基接触的金属蒸镀在源极处形成源电极，再将与栅区形成良好欧姆接触的金属蒸镀在N-掺杂的高阻外延层的栅区形成栅电极。
所述源电极与栅电极采用分别蒸镀的方法制备。
N-掺杂的高阻外延层表面与P+掺杂的界面栅区之间形成pn结接触，N-掺杂的高阻外延层表面与源电极之间形成肖特基结。当肖特基结两端加上正向偏压时，肖特基结层变窄，其内阻变小；反之，若在肖特基结两端加上反向偏压时，肖特基结则变宽，其内阻变大。
本发明所述一种具有不饱和特性的肖特基晶体管及其制备方法，其有益效果在于：本器件是一种单极性工作模式的器件，且具有不饱和的类三极管的I-V特性，器件的失真度小，抗干扰性能好，对于静电感应晶体管(SIT)的简化和肖特基二极管的改进具有重要的意义，且本发明通过利用金属半导体肖特基结产生，具有单向导电的整流特性、开关频率高、散热性能好、噪声小等优点；①不同金属与不同种类的半导体接触时，具有不同的肖特基势垒高度；②势垒高度随外加电压变化，当金属接正电压时,势垒降低，载流子容易通过；反之势垒升高，载流子不易通过；③肖特基结的电流-电压曲线的正向开启电压较低，正向曲线的斜率较陡，反向击穿电压较低。
附图说明
图1为本发明的肖特基晶体管的剖面结构示意图；
图2为本发明器件工作时所接的电路图；
图3为本发明的肖特基晶体管的特性曲线图。
具体实施方式
实施例1
一种具有不饱和特性的肖特基晶体管，由漏极以及设置于漏极上的N+掺杂的低阻单晶衬底，位于N+掺杂的低阻单晶衬底上的N-掺杂的高阻外延层、位于N-掺杂的高阻外延层表面的两个P+掺杂的界面栅区，两个分别位于P+掺杂的界面栅区上的栅电极，和设置于两个栅电极之间中央位置位于N-掺杂高阻外延层表面的源电极构成；N-掺杂的高阻外延层表面与P+掺杂的界面栅区之间形成pn结接触，N-掺杂的高阻外延层表面与源电极之间形成肖特基结；N+掺杂的低阻单晶衬底为N+型低阻单晶硅切片；所述肖特基晶体管器件的总宽度为9μm，栅区为P型掺杂，掺杂浓度为1.0×1019cm-3，结深为4.0μm，栅区宽度为0.75μm，N-掺杂的高阻外延层的掺杂浓度为1.0×1013cm-3，N+掺杂的低阻单晶衬底的掺杂浓度为1.0×1017cm-3，厚度为2.0μm。
本发明所述一种具有不饱和特性的肖特基晶体管的制备方法，实现步骤如下：
(1)采用N+型低阻单晶硅切片作为衬底材料，在该衬底片上生长一层掺杂浓度为1.0×1013cm-3的N-掺杂的高阻外延层，在N-掺杂的高阻外延层上制作肖特基晶体管，其中肖特基晶体管是在N-掺杂的高阻外延层的基础上采用离子注入的方法掺杂形成栅区；在N-掺杂的高阻外延层的基础上采用淀积金属形成金半肖特基接触的方法形成源极处；
(2)先将与N-掺杂的高阻外延层沟道形成肖特基接触的金属蒸镀在源极处形成源电极，再将与栅区形成良好欧姆接触的金属蒸镀在N-掺杂的高阻外延层的栅区形成栅电极。
工作时，N-掺杂的高阻外延层表面与P+掺杂的界面栅区之间形成pn结，N-掺杂的高阻外延层表面与源电极之间形成肖特基结。器件工作时，肖特基晶体管器件的源电极接地，栅极接负偏压，漏极接正偏压，如图2所示。按照图2中的接法，得到器件的I-V特性曲线如图3所示。由图2、图3可知：该肖特基晶体管在源极接地，栅极接负偏压时，晶体管的沟道会被夹断，产生沟道势垒，进而出现不饱和的类三极管的I-V特性。

Claims (6)

1.一种具有不饱和特性的肖特基晶体管，其特征在于：由漏极以及设置于漏极上的N+掺杂的低阻单晶衬底，位于N+掺杂的低阻单晶衬底上的N-掺杂的高阻外延层、位于N-掺杂的高阻外延层表面的两个P+掺杂的界面栅区，两个分别位于P+掺杂的界面栅区上的栅电极，和两个栅电极之间位于N-掺杂高阻外延层表面的源电极构成。
2.如权利要求1所述一种具有不饱和特性的肖特基晶体管，其特征在于：所述源极处设置于两个栅电极之间的中央位置。
3.如权利要求1所述一种具有不饱和特性的肖特基晶体管，其特征在于：所述N-掺杂的高阻外延层表面与P+掺杂的界面栅区之间形成pn结，N-掺杂的高阻外延层表面与源电极之间形成肖特基结。
4.如权利要求2所述一种具有不饱和特性的肖特基晶体管，其特征在于：所述N+掺杂的低阻单晶衬底为N+型低阻单晶硅切片。
5.一种具有不饱和特性的肖特基晶体管的制备方法，其特征在于：实现步骤如下：
(1)采用N+型低阻单晶硅切片作为衬底材料，在该衬底片上生长一层N-掺杂的高阻外延层，在N-掺杂的高阻外延层上制作肖特基晶体管，其中肖特基晶体管是在N-掺杂的高阻外延层的基础上采用离子注入的方法掺杂形成栅区；在N-掺杂的高阻外延层的基础上采用淀积金属形成金半肖特基接触的方法形成源极处；
(2)先将与N-掺杂的高阻外延层沟道形成肖特基接触的金属蒸镀在源极处形成源电极，再将与栅区形成良好欧姆接触的金属蒸镀在N-掺杂的高阻外延层的栅区形成栅电极。
6.如权利要求5所述一种具有不饱和特性的肖特基晶体管的制备方法，其特征在于：所述源电极与栅电极采用分别蒸镀的方法制备。
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CN108735798A (zh) * 2018-04-02 2018-11-02 上海芯研亮投资咨询有限公司 具有低起始电压的SiC FET组件及其制造方法
CN108878517A (zh) * 2018-06-28 2018-11-23 济南大学 肖特基结导通型金属氧化物半导体场效应管

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Application publication date: 20161207