CN106206257A - The method preparing low-temperature polysilicon film and transistor - Google Patents
The method preparing low-temperature polysilicon film and transistor Download PDFInfo
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- CN106206257A CN106206257A CN201610661993.6A CN201610661993A CN106206257A CN 106206257 A CN106206257 A CN 106206257A CN 201610661993 A CN201610661993 A CN 201610661993A CN 106206257 A CN106206257 A CN 106206257A
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- 229910021420 polycrystalline silicon Inorganic materials 0.000 title claims abstract description 54
- 229920005591 polysilicon Polymers 0.000 title claims abstract description 54
- 238000000034 method Methods 0.000 title claims abstract description 47
- 239000000758 substrate Substances 0.000 claims abstract description 40
- 238000005224 laser annealing Methods 0.000 claims abstract description 16
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 15
- 238000009825 accumulation Methods 0.000 claims abstract description 4
- 238000002360 preparation method Methods 0.000 claims description 9
- 230000002520 cambial effect Effects 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 8
- 239000011521 glass Substances 0.000 claims description 7
- 239000012528 membrane Substances 0.000 claims description 7
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 6
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 6
- 238000009413 insulation Methods 0.000 claims description 5
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 3
- 229910019142 PO4 Inorganic materials 0.000 claims description 3
- 229910052796 boron Inorganic materials 0.000 claims description 3
- NBIIXXVUZAFLBC-UHFFFAOYSA-K phosphate Chemical compound [O-]P([O-])([O-])=O NBIIXXVUZAFLBC-UHFFFAOYSA-K 0.000 claims description 3
- 239000010452 phosphate Substances 0.000 claims description 3
- 239000011810 insulating material Substances 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 abstract description 10
- 239000013078 crystal Substances 0.000 abstract description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 4
- 230000015572 biosynthetic process Effects 0.000 abstract description 4
- 238000002425 crystallisation Methods 0.000 abstract description 4
- 230000001678 irradiating effect Effects 0.000 abstract description 4
- 229910052710 silicon Inorganic materials 0.000 abstract description 4
- 239000010703 silicon Substances 0.000 abstract description 4
- 230000008025 crystallization Effects 0.000 abstract description 3
- 239000010408 film Substances 0.000 description 19
- 238000005516 engineering process Methods 0.000 description 6
- 238000000137 annealing Methods 0.000 description 4
- 229910021419 crystalline silicon Inorganic materials 0.000 description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000003344 environmental pollutant Substances 0.000 description 2
- 230000007717 exclusion Effects 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 231100000719 pollutant Toxicity 0.000 description 2
- 230000003139 buffering effect Effects 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000012774 insulation material Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02592—Microstructure amorphous
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
- H01L21/02683—Continuous wave laser beam
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
- H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
Abstract
The present invention relates to a kind of method preparing low-temperature polysilicon film, comprise the steps: to provide substrate；Form temperature difference cambium layer on the substrate；Described temperature difference cambium layer includes that multiple first area and second area, described first area and second area, when carrying out laser annealing, form temperature difference；Accumulation amorphous silicon layer on described temperature difference cambium layer；Carry out laser annealing to form polysilicon layer.The invention still further relates to a kind of method preparing low-temperature polysilicon film transistor.Said method makes amorphous silicon layer difference corresponding region when laser annealing also form temperature difference; so; crystal grain in the low-temperature space of amorphous silicon layer can spread in high-temperature region, finally realizes the super transverse crystallization of silicon crystal grain, obtains the polysilicon layer that crystallite dimension is big and is evenly distributed.Owing to the formation of temperature difference obtains not by laser scanning line, but being obtained by laser once irradiating, therefore production efficiency is higher.
Description
Technical field
The present invention relates to Display Technique field, particularly relate to a kind of side preparing low-temperature polysilicon film and transistor
Method.
Background technology
Compared with amorphous silicon film transistor (a-Si TFT), low-temperature polysilicon film transistor (LTPS TFT) technology has
Standby plurality of advantages, as mobility is the highest, up to 10-100cm2About/Vs, can prepare (less than 600 simultaneously under cryogenic
DEG C), choice of the substrates is flexible, is currently the only and flexible display technologies compatible active layers technology of preparing.
Traditional low-temperature polysilicon film preparation uses linear laser beam scanning, utilizes adjacent scanning in scanning process
Temperature difference on line produces polysilicon.Although this method can produce more uniform polysilicon membrane, but scanning speed
Slowly, limiting the preparation of large area display, production efficiency is relatively low simultaneously, adds production cost.
Summary of the invention
Based on this, it is necessary to provide a kind of method preparing low-temperature polysilicon film that production efficiency is high.
Additionally, also provide for a kind of method preparing low-temperature polysilicon film transistor.
A kind of method preparing low-temperature polysilicon film, comprises the steps:
Substrate is provided；
Form temperature difference cambium layer on the substrate；Described temperature difference cambium layer includes multiple first area and second area,
Described first area and second area, when carrying out laser annealing, form temperature difference；
Accumulation amorphous silicon layer on described temperature difference cambium layer；
Carry out laser annealing to form polysilicon layer.
Wherein in an embodiment, the described cambial step of the temperature difference that formed on the substrate includes:
Form reservoir；
Described reservoir is patterned technique, forms the region having beyond reeded region and groove；Described groove
Region is first area, and the region beyond described groove is second area.
Wherein in an embodiment, described reservoir is formed on cushion, and described cushion is formed in substrate.
Wherein in an embodiment, described cushion is the silicon nitride layer and silicon oxide layer being sequentially laminated on substrate,
Described reservoir is heat insulation layer, water proof and heat insulation insulation material are formed.
Wherein in an embodiment, the described cambial step of the temperature difference that formed on the substrate includes:
Substrate is formed cushion；
Described cushion is carried out selective doping, obtains doped region and undoped region；Described doped region is
One region, described undoped region is second area.
Wherein in an embodiment, described cushion is the silicon nitride layer and silicon oxide layer being sequentially laminated on substrate.
Wherein in an embodiment, the material of doping is boron or phosphate material, doped region and the insulation in undoped region
Performance is inconsistent.
A kind of method preparing low-temperature polysilicon film transistor, including the preparation process of low-temperature polysilicon film；Described
The preparation process of low-temperature polysilicon film uses above-mentioned preparation method；
Wherein, described first area is the non-channel region of transistor, and described second area is the channel region of transistor.
Wherein in an embodiment, described substrate is glass substrate.
Said method, owing to defining one layer of temperature difference cambium layer, when carrying out laser annealing, temperature difference cambium layer in substrate
First area and second area can be respectively provided with different temperature, so that be covered in the non-crystalline silicon on temperature difference cambium layer
The different corresponding regions of layer also form temperature difference, and so, the crystal grain in the low-temperature space of amorphous silicon layer can spread in high-temperature region,
Finally realize the super transverse crystallization of silicon crystal grain, obtain the polysilicon layer that crystallite dimension is big and is evenly distributed.Due to temperature difference
Being formed and obtain not by laser scanning line, but obtained by laser once irradiating, therefore production efficiency is higher.
Accompanying drawing explanation
Fig. 1 is the method flow diagram preparing low-temperature polysilicon film of an embodiment；
Fig. 2 a～2d is the profile of the structure of each step gained of flow process shown in Fig. 1；
Fig. 3 a～3e is the profile of the structure of each step gained forming cambial first embodiment of the temperature difference；
Fig. 4 a～4d is the profile of the structure of each step gained forming cambial second embodiment of the temperature difference.
Detailed description of the invention
It is further described below in conjunction with drawings and Examples.
Fig. 1 is the method flow diagram preparing low-temperature polysilicon film of an embodiment.Fig. 2 a～2d is cutting of each stage
Face figure.In conjunction with Fig. 1 and Fig. 2 a～2d, following description prepares the method for low-temperature polysilicon film.
As it is shown in figure 1, this method preparing low-temperature polysilicon film comprises the steps.
Step S110: substrate 100 is provided.With reference to Fig. 2 a, substrate 100 ultimately forms polysilicon membrane.Substrate 100 can
Think substrate of glass.
Step S120: form temperature difference cambium layer 200 in described substrate 100.Temperature difference cambium layer 200 includes multiple firstth district
Territory 201 and second area 202.First area 201 and second area 202, when carrying out laser annealing, form temperature difference.Based on
One region 201 and the different materials of second area 202, characteristic etc., when carrying out laser annealing, the two absorbs and stores energy
Ability is different, thus causes the temperature difference of the two, and then forms temperature difference.
Step S130: accumulation amorphous silicon layer 300 on described temperature difference cambium layer 200.The annealed process of non-crystalline silicon is permissible
Form polysilicon.Polysilicon to be formed, needs first to deposit one layer of amorphous silicon layer, and non-crystalline silicon can shape at a lower temperature
Become, be then passed through annealing and form polysilicon.
Step S140: carry out laser annealing to form polysilicon.Specifically, be on amorphous silicon layer 300 with the secondth district
The position of territory 202 correspondence forms polysilicon region.Generally, non-crystalline silicon uses high annealing to form polysilicon.But it is high
Temperature annealing forms the method for polysilicon and is not suitable for certain situation, such as, need to be formed on a glass substrate polysilicon.It addition, it is logical
Cross laser scanning side crystallization method, it is also possible to form polysilicon at a lower temperature, but treatment effeciency is the lowest.This step
Laser anneal method is Dispensable continuous irradiation, when carrying out laser and irradiating, and the first area 201 of temperature difference cambium layer 200 and the
Two regions 202 are different due to the ability absorbing energy, can have different temperature.
Owing to defining one layer of temperature difference cambium layer 200, when carrying out laser annealing, temperature difference cambium layer 200 in substrate 100
First area 201 and second area 202 can be respectively provided with different temperature so that be covered in temperature difference cambium layer 200 it
On the different corresponding regions of amorphous silicon layer 300 also form temperature difference, so, the crystal grain in the low-temperature space of amorphous silicon layer 300
Can spread in high-temperature region, finally realize the super transverse crystallization of silicon crystal grain, obtain the polycrystalline that crystallite dimension is big and is evenly distributed
Silicon layer.Owing to the formation of temperature difference obtains not by laser scanning line, but obtained by laser once irradiating, therefore produce
In hgher efficiency.
In above-described embodiment, it is important to the formation of temperature difference cambium layer 200, specifically can use various ways.As long as
Same annealing laser irradiates the method for generation different temperatures can.Below with two specific embodiments to forming the temperature difference
The method of cambium layer 200 illustrates.
In the first embodiment, in conjunction with Fig. 3 a～3e, the described cambial step of the temperature difference that formed on the substrate, i.e.
Above-mentioned steps S120 includes:
Step S121: form cushion 210.As shown in Figure 3 a, cushion 210 is formed in above-mentioned substrate 100.Described
Cushion is the silicon nitride layer and silicon oxide layer being sequentially laminated on substrate.For exclusion of water oxygen and stop from glass substrate
Pollutant.
Step S122: form reservoir 220 at described cushion 210.Reservoir 220 can store heat when laser annealing
Amount, thus elevate the temperature.As shown in Figure 3 b.
Step S123: described reservoir 220 is patterned technique, forms the district having beyond reeded region and groove
Territory.Described grooved area is corresponding to above-mentioned first area 201, and the region beyond described groove is second area 202.Such as Fig. 3 c
Shown in.
After above-mentioned steps, the amorphous silicon layer 300 such as figure formed on the reservoir 220 being patterned after technique
Shown in 3d.After laser annealing processes, the crystal grain of low-temperature space spreads to high-temperature region, forms state as shown in Figure 3 e.
In this second embodiment, in conjunction with Fig. 4 a～4d, the described cambial step of the temperature difference that formed on the substrate, i.e.
Above-mentioned steps S120 includes:
Step S121 ': form cushion 210.As shown in fig. 4 a, cushion 210 is formed in above-mentioned substrate 100.Institute
Stating cushion is the silicon nitride layer and silicon oxide layer being sequentially laminated on substrate.For exclusion of water oxygen and stop from glass base
The pollutant of plate.
Step S122 ': cushion 210 is carried out selective doping, obtains doped region and undoped region.Described doping
Region is corresponding to above-mentioned first area 201, and described undoped region should be in above-mentioned second area 202.Chosen property is adulterated
After, doped region and undoped region, when carrying out laser annealing and processing, can produce temperature contrast.As shown in Figure 4 b.To buffering
The material that layer 210 is doped is boron or phosphate material, and the heat-insulating property in doped region and undoped region is inconsistent.Doping method
Including ion implanting etc..
After above-mentioned steps, the amorphous silicon layer 300 such as Fig. 4 c formed on the cushion 210 carry out selective doping
Shown in.After laser annealing processes, the crystal grain of low-temperature space spreads to high-temperature region, forms state as shown in figure 4d.
The method preparing low-temperature polysilicon film of above-described embodiment can apply to low-temperature polysilicon film transistor
In manufacture process.Forming polysilicon membrane is the previous step manufacturing transistor.
When the concrete method using above-described embodiment, first form polysilicon membrane according to the method for above-described embodiment.
Wherein, the described second area 202 of the polysilicon membrane of formation can be as the channel region of transistor.First area 201 is then
Can be as isolation area.Afterwards can according to formed transistor technique formed thin film transistor (TFT), these techniques include isolation, doping,
Deposit, etching etc., for forming the source electrode of transistor, drain electrode, grid structure.This is for manufacturing the normal process steps of transistor, at this
Do not repeat.
When needs carry out multilamellar transistor technology, the preparation process of above-mentioned low-temperature polysilicon film can be repeated, with
And utilize the polysilicon membrane formed to manufacture transistor.
Owing to being low-temperature polysilicon film manufacturing technology, polysilicon can be formed at relatively low temperature (less than 600 DEG C),
The most described substrate can be glass substrate.
Each technical characteristic of embodiment described above can combine arbitrarily, for making description succinct, not to above-mentioned reality
The all possible combination of each technical characteristic executed in example is all described, but, as long as the combination of these technical characteristics is not deposited
In contradiction, all it is considered to be the scope that this specification is recorded.
Embodiment described above only have expressed the several embodiments of the present invention, and it describes more concrete and detailed, but also
Can not therefore be construed as limiting the scope of the patent.It should be pointed out that, come for those of ordinary skill in the art
Saying, without departing from the inventive concept of the premise, it is also possible to make some deformation and improvement, these broadly fall into the protection of the present invention
Scope.Therefore, the protection domain of patent of the present invention should be as the criterion with claims.
Claims (9)
1. the method preparing low-temperature polysilicon film, comprises the steps:
Substrate is provided；
Form temperature difference cambium layer on the substrate；Described temperature difference cambium layer includes multiple first area and second area, described
First area and second area, when carrying out laser annealing, form temperature difference；
Accumulation amorphous silicon layer on described temperature difference cambium layer；
Carry out laser annealing to form polysilicon layer.
The method preparing low-temperature polysilicon film the most according to claim 1, it is characterised in that described on the substrate
Form the cambial step of the temperature difference to include:
Form reservoir；
Described reservoir is patterned technique, forms the region having beyond reeded region and groove；Described grooved area
For first area, the region beyond described groove is second area.
The method preparing low-temperature polysilicon film the most according to claim 2, it is characterised in that described reservoir is formed at
On cushion, described cushion is formed in substrate.
The method preparing low-temperature polysilicon film the most according to claim 3, it is characterised in that described cushion is successively
The silicon nitride layer being layered on substrate and silicon oxide layer, described reservoir is heat insulation layer, by water proof and heat insulation thermal insulating material
Material is formed.
The method preparing low-temperature polysilicon film the most according to claim 1, it is characterised in that described on the substrate
Form the cambial step of the temperature difference to include:
Substrate is formed cushion；
Described cushion is carried out selective doping, obtains doped region and undoped region；Described doped region is the firstth district
Territory, described undoped region is second area.
The method preparing low-temperature polysilicon film the most according to claim 5, it is characterised in that described cushion is successively
The silicon nitride layer being layered on substrate and silicon oxide layer.
The method preparing low-temperature polysilicon film the most according to claim 5, it is characterised in that the material of doping be boron or
Phosphate material, the heat-insulating property in doped region and undoped region is inconsistent.
8. the method preparing low-temperature polysilicon film transistor, including the preparation process of low-temperature polysilicon film；Described low
The preparation process of temperature polysilicon membrane uses the preparation method described in any one of claim 1～7；
Wherein, described first area is the non-channel region of transistor, and described second area is the channel region of transistor.
The method preparing low-temperature polysilicon film transistor the most according to claim 8, it is characterised in that described substrate is
Glass substrate.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2018145515A1 (en) * | 2017-02-09 | 2018-08-16 | 京东方科技集团股份有限公司 | Thin film transistor and fabrication method therefor, display substrate and display device |
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2016
- 2016-08-12 CN CN201610661993.6A patent/CN106206257A/en active Pending
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| JPH0319210A (en) * | 1989-06-15 | 1991-01-28 | Matsushita Electron Corp | Manufacture of semiconductor device |
| US20060043367A1 (en) * | 2004-09-01 | 2006-03-02 | Mao-Yi Chang | Semiconductor device and method of fabricating a low temperature poly-silicon layer |
| US20130183875A1 (en) * | 2012-01-17 | 2013-07-18 | Chang Fu Tsai | Socket having symmetrically arranged first and second casings with interlocking arrangements to define a led seat |
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| WO2018145515A1 (en) * | 2017-02-09 | 2018-08-16 | 京东方科技集团股份有限公司 | Thin film transistor and fabrication method therefor, display substrate and display device |
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