CN106159057A - LED chip and preparation method thereof - Google Patents

LED chip and preparation method thereof Download PDF

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Publication number
CN106159057A
CN106159057A CN201510153145.XA CN201510153145A CN106159057A CN 106159057 A CN106159057 A CN 106159057A CN 201510153145 A CN201510153145 A CN 201510153145A CN 106159057 A CN106159057 A CN 106159057A
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China
Prior art keywords
layer
transparency conducting
metallic reflector
conducting layer
type semiconductor
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CN201510153145.XA
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CN106159057B (en
Inventor
朱秀山
徐慧文
李智勇
朱广敏
余婷婷
张宇
李起鸣
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Enraytek Optoelectronics Co Ltd
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Enraytek Optoelectronics Co Ltd
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Priority to CN201510153145.XA priority Critical patent/CN106159057B/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H01L33/46Reflective coating, e.g. dielectric Bragg reflector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40Materials therefor
    • H01L33/42Transparent materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0016Processes relating to electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0025Processes relating to coatings

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

The present invention provides a kind of LED chip and preparation method thereof, and preparation method includes: provide substrate, n type semiconductor layer, active layer and p type semiconductor layer;Form first, second transparency conducting layer;Forming the metallic reflector more than the argentiferous of transparency conducting layer for the work function, the metallic reflector being wherein positioned on the first transparency conducting layer is P electrode, and the metallic reflector being positioned on the second transparency conducting layer is N electrode;LED chip includes substrate, n type semiconductor layer, active layer and p type semiconductor layer, first, second transparency conducting layer;Metallic reflector, the metallic reflector being wherein positioned on the first transparency conducting layer is P electrode, and the metallic reflector being positioned on the second transparency conducting layer is N electrode.The beneficial effects of the present invention is, reduce the barrier height between P, n type semiconductor layer and metallic reflector, and then reduce the Ohmic contact between P, n type semiconductor layer and metallic reflector, reduce the operating voltage of LED chip, increase the luminous efficiency of LED chip.

Description

LED chip and preparation method thereof
Technical field
The present invention relates to LED manufacture technology field, be specifically related to a kind of LED chip and preparation method thereof.
Background technology
Light emitting diode (Light Emitting Diode, LED) is a kind of semiconductor solid-state luminescent device, It utilizes semiconductor PN electroluminescent principle to make.LED component has that cut-in voltage is low, volume is little, Response is fast, good stability, life-span length, the good photoelectric properties such as pollution-free, therefore outdoor room lighting, The fields such as backlight, display, traffic instruction have and are increasingly widely applied.
In general LED chip structure is divided into horizontal structure (positive cartridge chip), vertical stratification (vertical junction Structure chip) and inverted structure (flip-chip) three types;Wherein, the P in inverted structure LED chip, N electrode is respectively positioned on the same side, luminous zone, and the light that the quantum well layer in core LED piece is sent mainly passes through transparent Sapphire layer effusion, the luminous efficiency of such LED chip is higher.
But, the LED chip of inverted structure of the prior art, in order to promote the luminous efficiency of chip, is adopted Form electrode layer with the material with high light reflectivity.But these may be to other property of LED chip Can impact, for example, cause the use voltage of LED chip to raise.
Therefore, how on the premise of not affecting other performances of LED chip, to promote LED chip as far as possible as far as possible Luminous efficiency, becomes one of those skilled in the art's technical problem urgently to be resolved hurrily.
Content of the invention
The problem that the present invention solves is to provide a kind of LED chip and preparation method thereof, not affect as far as possible Promote the luminous efficiency of LED chip on the premise of other performances of LED chip as far as possible.
For solving the problems referred to above, the present invention provides the preparation method of a kind of LED chip, comprising:
Substrate is provided;
Sequentially form n type semiconductor layer, active layer and p type semiconductor layer over the substrate;
Form the opening of exposed portion n type semiconductor layer in described p type semiconductor layer and active layer;
On described p type semiconductor layer and open bottom formed work function more than described p type semiconductor layer with And the transparency conducting layer of n type semiconductor layer, the transparency conducting layer being wherein positioned on described p type semiconductor layer is First transparency conducting layer, the transparency conducting layer being positioned in described opening on the n type semiconductor layer exposing is second Transparency conducting layer, does not contacts between described first transparency conducting layer and the second transparency conducting layer;
Form the gold of argentiferous on the surface of described first transparency conducting layer and the second transparency conducting layer and sidewall Belonging to reflecting layer, the work function of the metallic reflector of described argentiferous is more than the work function of described transparency conducting layer, Wherein, the metallic reflector being positioned on described first transparency conducting layer as the P electrode of described LED chip, The metallic reflector being positioned on described second transparency conducting layer is as the N electrode of described LED chip, described P Do not contact between electrode and N electrode.
Optionally, the step forming opening in p type semiconductor layer and active layer includes:
The mode using plasma etching removes part P-type semiconductor layer material and active layer material, with shape Become described opening.
Optionally, the step forming transparency conducting layer includes:
Make the p type semiconductor layer near described opening expose from described first transparency conducting layer, and make described the Two transparency conducting layers cover the portion bottom surface of described opening, described second transparency conducting layer and described opening There is between sidewall the first gap;
The step forming metallic reflector on the surface of the second transparency conducting layer and sidewall includes: make metal anti- Penetrate layer and be formed at described second layer at transparent layer and sidewall, and the sidewall of described metallic reflector and institute State and there is between the sidewall of opening the second gap.
Optionally, the transparency conducting layer of tin indium oxide or zinc oxide material is formed.
Optionally, formed transparency conducting layer step include: use magnetron sputtering deposition or reaction etc. from The mode of son deposition forms described transparency conducting layer.
Optionally, the step forming metallic reflector includes: form individual layer or the metal of laminated construction is anti- Penetrate layer.
Optionally, the step forming metallic reflector includes: sequentially form silver on described transparency conducting layer Layer and titanizing tungsten layer, described silver layer and titanizing tungsten layer collectively form the metallic reflection of described laminated construction Layer;
Or, described transparency conducting layer sequentially forms silver layer, titanizing tungsten layer and platinum layer, described silver Layer, titanizing tungsten layer and platinum layer collectively form the reflecting layer of described laminated construction.
Optionally, after forming the step of metallic reflector, before the step of formation N electrode or P electrode, Described preparation method also includes:
Form conductive protecting layer on described metallic reflector surface.
Optionally, the material of described conductive protecting layer is titanizing tungsten, or, be chromium, platinum, titanium, copper, The combination of one or more in nickel.
Optionally, the step forming conductive protecting layer includes: form individual layer or the conduction of laminated construction is protected Sheath.
Optionally, the step forming conductive protecting layer includes: form the conductive protecting layer of laminated construction, and The surface making the conductive protecting layer of described laminated construction is nickel dam.
Optionally, the step forming conductive protecting layer includes: use magnetron sputtering deposition or chemical gaseous phase The mode of deposition forms described conductive protecting layer.
Additionally, the present invention also provides a kind of LED chip, comprising:
Substrate;
The n type semiconductor layer being positioned on described substrate;
The active layer being positioned on described n type semiconductor layer;
The p type semiconductor layer being positioned on described active layer, has dew in described p type semiconductor layer and active layer Go out the opening of n type semiconductor layer;
Transparency conducting layer, including the first transparency conducting layer being positioned on p type semiconductor layer and opening described in being positioned at The second transparency conducting layer bottom Kou, does not connects between described first transparency conducting layer and the second transparency conducting layer Touch;The work function of described transparency conducting layer is more than the transparent of described p type semiconductor layer and n type semiconductor layer The work function of conductive layer;
The metallic reflector of argentiferous, its be positioned at the first transparency conducting layer and the second layer at transparent layer with And sidewall, the metallic reflector being wherein positioned on described first transparency conducting layer is P electrode, is positioned at described Metallic reflector on two transparency conducting layers is N electrode, does not contacts between described P electrode and N electrode;Institute State the work function more than described transparency conducting layer for the work function of metallic reflector.
Optionally, the material of described transparency conducting layer is tin indium oxide or zinc oxide.
Optionally, described metallic reflector is individual layer or laminated construction.
Optionally, described metallic reflector includes the silver layer being positioned on described transparency conducting layer and is positioned at institute State the titanizing tungsten layer on silver layer;
Or, described metallic reflector includes the silver layer being sequentially located on described transparency conducting layer, is positioned at institute State the titanizing tungsten layer on silver layer and the platinum layer being positioned on described titanizing tungsten layer.
Optionally, described LED chip also includes:
It is positioned at the conductive protecting layer on described metallic reflector surface.
Optionally, described conductive protecting layer is individual layer or laminated construction.
Optionally, the surface of described conductive protecting layer is nickel dam.
Compared with prior art, technical scheme has the advantage that
After sequentially forming n type semiconductor layer, active layer and p type semiconductor layer over the substrate, formed Expose the opening of n type semiconductor layer;After this, formed on described p type semiconductor layer and in opening Transparency conducting layer, the transparency conducting layer being wherein positioned on described p type semiconductor layer is the first transparency conducting layer, The transparency conducting layer being positioned in described opening on the n type semiconductor layer exposing is the second transparency conducting layer;Institute State the surface of the first transparency conducting layer and the second transparency conducting layer and sidewall forms the metallic reflection of argentiferous Layer, the metallic reflector being wherein positioned on described first transparency conducting layer is as the P electricity of described LED chip Pole, the metallic reflector being positioned on described second transparency conducting layer is as the N electrode of described LED chip.This The N electrode of invention and P electrode can be formed in same processing step, relative to forming two types respectively For the prior art of electrode, simplify processing step;Further, since P electrode and p type semiconductor layer it Between, be separated with transparency conducting layer, and the work function of described transparency conducting layer between N electrode and n type semiconductor layer More than described p type semiconductor layer and n type semiconductor layer and be less than described metallic reflector, say, that The work function of described transparency conducting layer is between described P, n type semiconductor layer and metallic reflector, so Advantageously reduce the barrier height between P, n type semiconductor layer and metallic reflector, so be conducive to reducing P, Ohmic contact between n type semiconductor layer and metallic reflector, this is conducive to improving the workability of LED chip Can, for example, reduce the operating voltage of LED chip.Additionally, described transparency conducting layer typically has relatively Less resistance sizes, and then electric current when LED chip can be helped to work spreads over transparent conductive layer Come, reach the purpose of current expansion, prevent the generation of electric current jam, increase quantum efficiency, this Be conducive to promoting the service behaviour of LED chip.Further, since transparency conducting layer has electric conductivity, thus Do not interfere with between P electrode and p type semiconductor layer, the electrical connection between N electrode and n type semiconductor layer; And transparency conducting layer has light transmission.Thus transparency conducting layer described in the light transmission that chip produces can be made straight To metallic reflector, then appear from substrate after metallic reflector reflection, and then be conducive to increasing LED The luminous efficiency of chip.
Brief description
Fig. 1 to Figure 11 be LED chip of the present invention preparation method one embodiment in the structure of each step show It is intended to.
Detailed description of the invention
In order to increase the efficiency of the LED chip of inverted structure in prior art, have employed some reflectivity relatively High material is as the electrode of LED chip.But the electrode material changing LED chip can cause LED Other performances of chip are affected, and for example, cause the contact electricity between the material layer within LED chip Resistance increases, and then the operating voltage causing LED chip overall raises.To this end, in prior art normally only At the upper material using above-mentioned reflectivity higher of a type of electrode (for example, only in P electrode), Another type of electrode then or selects common material.But it is so unfavorable for increasing electrode reflectance, And then it is unfavorable for increasing the efficiency of LED chip;In addition, this mode needs to be formed respectively two kinds of Electrode, too increases difficulty and the fussy degree of the manufacturing.
To this end, the present invention provides a kind of LED chip and preparation method thereof, the wherein making side of LED chip Method comprises the following steps:
Substrate is provided;Sequentially form n type semiconductor layer, active layer and P-type semiconductor over the substrate Layer;Form the opening of exposed portion n type semiconductor layer in described p type semiconductor layer and active layer;? Form work function on described p type semiconductor layer and in opening and be more than described p type semiconductor layer and N-type The transparency conducting layer of semiconductor layer, the transparency conducting layer being wherein positioned on described p type semiconductor layer is first Transparency conducting layer, the transparency conducting layer being positioned in described opening on the n type semiconductor layer exposing is second saturating Bright conductive layer, does not contacts between described first transparency conducting layer and the second transparency conducting layer;Described first The surface of transparency conducting layer and the second transparency conducting layer and sidewall form work function and are more than described electrically conducting transparent The metallic reflector of the argentiferous of layer, wherein, the metallic reflector being positioned on described first transparency conducting layer is made For the P electrode of described LED chip, the metallic reflector being positioned on described second transparency conducting layer is as institute State the N electrode of LED chip, do not contact between described P electrode and N electrode.
By above-mentioned steps, before the P electrode forming LED chip and N electrode, at P-type semiconductor Form transparency conducting layer (the first transparency conducting layer and the second transparency conducting layer) on layer and n type semiconductor layer, The P electrode being so subsequently formed and N electrode are just formed at the first transparency conducting layer and the second transparency conducting layer On.The N electrode of the present invention and P electrode can be formed in same processing step, simplify processing step; The work function of described transparency conducting layer is between described P, n type semiconductor layer and metallic reflector, so Advantageously reduce the barrier height between P, n type semiconductor layer and metallic reflector, and then be conducive to reducing Ohmic contact between P, n type semiconductor layer and metallic reflector, this can improve the work of LED chip Make performance, for example, reduce the operating voltage of LED chip.Additionally, described transparency conducting layer typically has Relatively small resistance sizes, and then help electric current during LED chip work to spread over transparent conductive layer Come, reach the purpose of current expansion, prevent the generation of electric current jam, increase quantum efficiency, this Be conducive to promoting the service behaviour of LED chip.Additionally, transparency conducting layer does not interferes with P electrode and P Between type semiconductor layer, the electrical connection between N electrode and n type semiconductor layer, and chip can be made to produce Light transmission described in transparency conducting layer until metallic reflector, then from substrate after metallic reflector reflection Appear, and then be beneficial to increase the luminous efficiency of LED chip.
Understandable, below in conjunction with the accompanying drawings for enabling the above-mentioned purpose of the present invention, feature and advantage to become apparent from The specific embodiment of the present invention is described in detail.
Refer to Fig. 1 to Figure 11, be the structural representation of each step of preparation method of LED chip of the present invention Figure.
Referring first to Fig. 1, provide substrate 100;Substrate 100 in the present embodiment is sapphire (Al2O3) Substrate.But the material that the present invention is to described substrate 100 does not limit, its material also can be such as point Spar (MgAl2O4), other substrates such as SiC, ZnS, ZnO or GaAs.
Described substrate 100 sequentially forms n type semiconductor layer, active layer and p type semiconductor layer.Tool Body, in the present embodiment, described n type semiconductor layer is n type gallium nitride layer 110, described active layer For multiple quantum well layer 120 (MQW), described p type semiconductor layer is p-type gallium nitride layer 130.Described N Type gallium nitride layer the 110th, multiple quantum well layer 120 and p-type gallium nitride layer 130 can by epitaxy technique successively It is formed on described substrate 100, and described n type gallium nitride layer the 110th, multiple quantum well layer 120 and p-type Gallium nitride layer 130 may be individual layer or sandwich construction.
For example, described p-type gallium nitride layer 130 can be by being sequentially formed on multiple quantum well layer 120 The In-GaN mixing Mg, the P-GaN mixing Mg and the Al-GaN composition mixing Mg, described Multiple-quantum Well layer 120 can be to be alternately stacked the quantum well structure constituting, described N-type by InGaN layer and GaN layer Gallium nitride layer 110 can be to be made up of the GaN layer mixing Si.
It should be understood that, described n type gallium nitride layer the 110th, multiple quantum well layer 120 and p-type nitrogen Changing the material of gallium layer 130 and structure being only an example, this is not limited in any way by the present invention.
Please continue to refer to Fig. 2, formed in described p-type gallium nitride layer 130 and multiple quantum well layer 120 and expose The opening 131 of part n type gallium nitride layer 110, and then form the Mesa table top making LED chip. Forming Mesa table top is this area common technique, and therefore this step is not construed as limiting by the present invention.
In the present embodiment, the mode of plasma etching can be used to remove part p-type gallium nitride layer material And MQW layer material, to form described opening 131.The anisotropy of this etching mode is relatively strong, Opening 131 edge being formed is more neat, thus the size of opening is more prone to control.
Concrete can use boron trichloride gas and chlorine as plasma etching gas, and argon gas is as quarter The carrier gas of erosion gas.
It should be understood that, the etching gas using dry etching and dry etching to be used is One example of the present invention, the present invention to how forming described opening 131 is not construed as limiting, other etching sides Formula such as wet etching etc. can be equally used for forming described opening 131.
After this, refer to Fig. 3, formed on described p-type gallium nitride layer 130 and in opening 131 Work function is more than the transparency conducting layer 140 of described p-type gallium nitride layer 130 and n type gallium nitride layer 110, Wherein, the transparency conducting layer being positioned on described p-type gallium nitride layer 130 is the first transparency conducting layer 140a, The transparency conducting layer being positioned in described opening 131 on the n type gallium nitride layer 110 exposing is second transparent to lead Electric layer 140b.
It is contemplated that formed transparency conducting layer 140 work function more than p-type gallium nitride layer 130 with And n type gallium nitride layer 110, and less than the metallic reflector being subsequently formed, say, that make described The work function of bright conductive layer 140 between described P, n type gallium nitride layer the 130th, 110 with metallic reflector it Between, so advantageously reduce n type gallium nitride layer the 110th, between p-type gallium nitride layer 130 and metallic reflector Barrier height, and then be conducive to reduce n type gallium nitride layer the 110th, p-type gallium nitride layer 130 anti-with metal Penetrating the Ohmic contact between layer, this can improve the service behaviour of LED chip, for example, reduces LED core The operating voltage of piece.
Additionally, described transparency conducting layer 140 typically has relatively small resistance sizes, and then help LED Electric current during chip operation spreads on transparency conducting layer 140 and comes, and is so conducive to reaching current expansion Purpose, and then prevent the generation of electric current jam, increase quantum efficiency, this is conducive to carrying further Rise the service behaviour of LED chip.
Additionally, transparency conducting layer 140 does not interferes with between P electrode and p-type gallium nitride layer 130, N Electrical connection between electrode and n type gallium nitride layer 110, and can make described in the light transmission that chip produces thoroughly Bright conductive layer 140, until metallic reflector, then appears from substrate 100 after metallic reflector reflection, And then it is beneficial to increase the luminous efficiency of LED chip.
Do not contact, to prevent between described first transparency conducting layer 140a and the second transparency conducting layer 140b It is short-circuited after being subsequently formed N electrode and P electrode.
Concrete, in the present embodiment, band first can be formed on p-type gallium nitride layer 130 figuratum Mask controls the pattern of the transparency conducting layer 140 of formation, and needs are formed described by the pattern of mask The part of transparency conducting layer 140 is exposed, and does not so need to be formed the part quilt of described transparency conducting layer 140 Mask hides.
Concrete, in the present embodiment, can make to be positioned at the first of described p-type gallium nitride layer 130 surface The area of transparency conducting layer 140a is slightly less than the area of p-type gallium nitride layer 130, and then makes to be positioned at opening 131 Part p-type gallium nitride layer 130 around exposes.Meanwhile, the second transparency conducting layer 140b is made only to cover institute State the portion bottom surface of opening 131 and the sidewall of not contact openings 131, say, that described second transparent There is between conductive layer 140b the first gap 1401, such first, second transparency conducting layer 140a, 140b Between be not in contact with each other mutually.
In the present embodiment, the transparency conducting layer 140 of tin indium oxide (ITO) material can be formed, this The transparency conducting layer 140 of material has higher light transmittance, say, that pass through in its visible light wave range Rate is higher, therefore substantially can not keep off the light that SQW sends, and reduces the loss of light.
Further, the p-type gallium nitride layer 130 in the present embodiment comprises the In-GaN layer mixing Mg, also Being to say, transparency conducting layer 140 and the described p-type gallium nitride layer 130 of indium tin oxide material are respectively provided with In group Point, be therefore conducive to the transparency conducting layer 140 of tin indium oxide and described p-type gallium nitride layer 130 further Between interpenetrate, so advantageously reduce the resistivity of transparency conducting layer 140, and then help further Electric current during LED chip work spreads on transparency conducting layer 140 and comes, and reaches the purpose of current expansion, Preventing the generation of electric current jam, increasing quantum efficiency, this is conducive to promoting LED chip further Service behaviour.
Additionally, the 130th, the work function size of indium tin oxide material is typically in the range of described P, n type gallium nitride layer Between 110 and the metallic reflector being subsequently formed, this should can reach above-mentioned reduction P, n type gallium nitride The purpose of layer the 130th, the barrier height between 110 and metallic reflector.
It should be understood that, those skilled in the art are it is understood that the concrete work(of transparency conducting layer 140 Function size can be adjusted by technological parameter when adjusting its formation, it is contemplated that formed The work function of transparency conducting layer 140 between n type gallium nitride layer 110 and the metallic reflector being subsequently formed it Between (or between p-type gallium nitride layer 130 and the metallic reflector being subsequently formed), so its concrete work content Number size should be adjusted according to actual conditions, and this is not construed as limiting by the present invention.
But the transparency conducting layer 140 that whether necessarily be formed indium tin oxide material is not construed as limiting by the present invention, In other embodiments of the invention, other transparent and that there is electric conductivity materials can also be used, for example Zinc oxide, zinc oxide and tin indium oxide have similar work function, are equally beneficial for reducing n type gallium nitride Layer the 110th, the barrier height between p-type gallium nitride layer 130 and metallic reflector, reduces n type gallium nitride layer 110th, the Ohmic contact between p-type gallium nitride layer 130 and metallic reflector, and then improve LED chip Service behaviour, reduces the operating voltage of LED chip.
In this embodiment, transparency conducting layer 140 within 50~3000 angstroms for the thickness range can be formed. Transparency conducting layer 140 in this thickness range was unlikely to thin and reduced conductive capability and (namely cause Resistance becomes big), people causes the absorption to light too much to be unlikely to blocked up again, causes light transmittance to reduce.
In the present embodiment, the mode that can use magnetron sputtering deposition (Sputter) forms described transparent lead Electric layer 140, the transparency conducting layer 140 that this mode is formed has preferable conformal covering power, namely Say the inwall that can preferably be covered in opening 131.But its generation type is not construed as limiting by the present invention, Other formation process such as reaction and plasma deposition (Reactive Plasma Deposition, RPD) etc. its His mode can be equally used for forming described transparency conducting layer 140.
Refer to Fig. 4, at the table of described first transparency conducting layer 140a and the second transparency conducting layer 140b Face and sidewall form the metallic reflector 150 more than the argentiferous of described transparency conducting layer 140 for the work function, wherein, The metallic reflector 150 being positioned on described first transparency conducting layer 140a is as the P of described LED chip Electrode 150a, the metallic reflector 150 being positioned on described second transparency conducting layer 140b is as described LED N electrode 150b of chip.
Concrete, between the described second transparency conducting layer 140b in the present embodiment, there is the first gap 1401, so in the present embodiment, correspond to the metallic reflector 150 of the second transparency conducting layer 140b (also It is exactly N electrode 150b) it is formed at described second transparency conducting layer 140b surface and sidewall, and described gold Belong to, between the sidewall in reflecting layer 150 and the sidewall of described opening 131, there is the second gap 1402.It is formed Described second gap 1402 is conducive to making N electrode 150b separate with P electrode 150a as far as possible, and then favorably In reduction electric leakage risk.
Do not contact between described P electrode 150a and N electrode 150b, to prevent P electrode 150a and N Short circuit between electrode 150b.
As it was noted above, described metallic reflector 150 and P, n type gallium nitride layer the 130th, 110 interval Have the first transparency conducting layer 140a and the second transparency conducting layer 140b, therefore metallic reflector 150 and P, N type gallium nitride layer the 130th, the work function between 110 can be reduced, such metallic reflector 150 And P, n type gallium nitride layer the 130th, the ohmic contact resistance between 110 is less, advantageously reduces LED core The operating voltage of piece.
Additionally, the metallic reflector 150 of described argentiferous has higher light reflectivity, so by Multiple-quantum The light that well layer 120 sends can more be reflected onto substrate 100 and appear from substrate 100, so Be conducive to increasing the luminous efficiency of LED chip further.
Make described metallic reflector 150 be formed at described first transparency conducting layer 140a and second transparent to lead The surface of electric layer 140b and sidewall, be conducive to than transparency conducting layer 140 described in more comprehensive reflectance-transmittance Light.
Concrete, the metallic reflector 150 of individual layer or laminated construction can be formed.
In the present embodiment, the metallic reflector 150 of laminated construction can be formed, for example, it is possible to described Sequentially forming silver layer and titanizing tungsten layer on transparency conducting layer 140, described silver layer and titanizing tungsten layer are common Constitute the metallic reflector 150 of described laminated construction.
Concrete, can make the thickness of silver layer in the range of 750~3000 angstroms, the thickness of titanizing tungsten exists In the range of 100~1000 angstroms.The metallic reflector 150 that can make formation in this thickness range is unlikely to Cross thin and cause reflectance reduction, be also unlikely to cause metallic reflector 150 blocked up simultaneously and affect whole The structure of LED chip.But it will be understood by those skilled in the art that this number range is only an example, In actual mechanical process, the thickness of these each material layers constituting metallic reflector 150 should basis Actual conditions are adjusted.
Additionally, whether the present invention must be silver layer and titanium to the metallic reflector 150 of described laminated construction Change tungsten layer to be not construed as limiting, in other embodiments of the invention, can also be at described transparency conducting layer 140 On sequentially form silver layer, titanizing tungsten layer and platinum layer, described silver layer, titanizing tungsten layer and the common structure of platinum layer Become the reflecting layer of described laminated construction.Wherein, the thickness of described silver layer is in the range of 750~3000 angstroms, The thickness of titanizing tungsten is in the range of 100~1000 angstroms, and the thickness of platinum layer can be at 100~1000 angstroms In the range of.Same, above-mentioned thickness parameter is only also an example, and the present invention is to metallic reflector In the thickness of 150, and the metallic reflector 150 of laminated construction, the thickness of each material layer does not make any limit Fixed.
Refer to Fig. 5, in the present embodiment, after forming the step of described metallic reflector 150, also Comprise the following steps:
Form conductive protecting layer 160 on described metallic reflector 150 surface.Described conductive protecting layer 160 is used In to formed metallic reflector 150 protect.In the step of the lead-in wire of follow-up making LED chip, Lead-in wire will be formed in described conductive protecting layer 160 surface.Owing to conductive protecting layer 160 has electric conductivity, Thus without impact lead-in wire and N, P electrode 150b, the electrical connection between 150a.
Concrete, conductive protecting layer 160 in the present embodiment be formed at the surface of described P electrode 150a with It and sidewall, and is formed at the surface of N electrode 150b.Wherein, in order to avoid being formed at P electrode 150a On conductive protecting layer 160 and the conductive protecting layer 160 being formed in N electrode 150b between bridge joint, It in the present embodiment, is formed at the conductive protecting layer 160 on described N electrode 150b surface and the side of opening 131 There is between wall third space 1403.
In the present embodiment, described conductive protecting layer 160 is laminated construction, specifically, laminated construction The material of conductive protecting layer 160 can be chromium, platinum, titanium, gold, the combination of one or more in nickel.
Protect for example, it is possible to sequentially form layers of chrome, platinum layer, titanium layer, layer gold and nickel dam to constitute described conduction Sheath 160, wherein, platinum layer and titanium layer chemical property are more stable, primarily serve protection P electrode 150a, The effect of N electrode 150b;Layers of chrome primarily serves adhesive attraction, say, that be used for increasing P electrode 150a, Adhesiveness between N electrode 150b and conductive protecting layer 160;Layer gold and nickel dam play protection conductive protection The effect of other materials layer in layer 160.
In the present embodiment, the thickness of described layers of chrome is in the range of 20~500 angstroms, the thickness of described platinum layer Degree is in the range of 200~1000 angstroms;The thickness of described titanium layer is in the range of 200~1000 angstroms;Institute Stating the thickness of layer gold in the range of 2000~5000 angstroms, the thickness of described nickel dam is at 200~2000 angstroms In the range of.These material layers are conducive to enough playing a protective role in the range of respective thickness parameter It is unlikely to blocked up simultaneously and affect LED chip volume.
In the present embodiment, when forming the conductive protecting layer 160 of laminated construction, nickel can be eventually formed Layer, say, that in the conductive protecting layer 160 of whole laminated construction, nickel dam is positioned at top layer.This Sample is advantageous in that, the material character of nickel is relatively stable, it is not easy to be corroded, and uses nickel to tie as lamination The top layer of the conductive protecting layer 160 of structure is conducive to making conductive protecting layer 160 be not easy in other follow-up steps Suddenly it is affected.
But whether the present invention is necessary for sandwich construction to described conductive protecting layer 160 is not construed as limiting, at this In other embodiments of invention, can also is that single layer structure, concrete, described conductive protecting layer 160 Material can be titanizing tungsten in the range of 200~5000 angstroms for the thickness range.Based on same reason, Be conducive to while enough playing a protective role, being unlikely to blocked up and affecting LED core in this thickness range Piece volume.
Additionally, in the present embodiment, magnetron sputtering deposition or the mode of chemical gaseous phase deposition can be used Form described conductive protecting layer 160.But the present invention does not limits how forming described conductive protecting layer 160 Fixed.
Please continue to refer to Fig. 6, in the present embodiment, after forming the step of described conductive protecting layer 160, Further comprising the steps of:
Described conductive protecting layer 160 has formed the insulating medium layer 170 of insulation protection effect.
In the present embodiment, described insulating medium layer 170 can use SiO2, SiN or SiON material Insulating medium layer 170.These materials compare the dielectric material being to compare acquisition in easy production process Material.
In the present embodiment, chemical gaseous phase deposition (Plasma Enhanced can be strengthened with using plasma Chemical Vapor Deposition, PECVD) mode form described insulating medium layer 170.This side Formula is easier control, and has preferable spreadability.But the present invention to how forming described insulation is situated between Matter layer 170 is simultaneously not construed as limiting.
In the present embodiment, the insulating medium layer 170 that thickness range is at 5000~20000 angstroms can be formed, Insulating medium layer 170 in this thickness range was unlikely to thin and was difficult to play dielectric effect, again It is unlikely to volume that is blocked up and that affect whole LED chip.But above-mentioned thickness range is only a reality Executing example, this is not limited in any way by the present invention.
After this, described insulating medium layer 170 is etched to form exposed portion conductive protecting layer 160 Hole the 171st, 172, the position of its mesopore 171 corresponds to P electrode 150a, and the position in hole 172 is corresponding to opening N electrode 150b in mouth 131, will form metal in described hole the 171st, 172 in subsequent step and draw Line.
In the present embodiment, BOE etching technics (buffer oxide etch) can be used to form exposed division Point conductive protecting layer 160 hole the 171st, 172.As it was noted above, due to described partially electronically conductive protective layer 160 Surface is nickel dam, and therefore conductive protecting layer 160 is not readily susceptible to the impact of the BOE etching of this step.
Please continue to refer to Fig. 7 and combine with reference to Fig. 8, Fig. 8 is the top view of structure shown in Fig. 7.Described The 171st, on insulating medium layer 170 and hole forms metal level 180, wherein, described metal level 180 in 172 Being positioned at part the 171st, in 172 for the hole is that the 181st, metallic conduction post 182 (illustrate only metal level in Fig. 7 180 parts being positioned at the 171st, in 172), metal level 180 is positioned at the portion on described insulating medium layer 170 surface Dividing and including pattern the 183rd, 184 (refer to Fig. 8), wherein, pattern 183 corresponds to metallic conduction post 181, For P electrode being drawn by described metallic conduction post 181;In like manner, described pattern 184 is corresponding to gold Belong to conductive pole 182, for described N electrode 150 being drawn by above-mentioned metallic conduction post 182.
It should be understood that, metal level 180 pattern in Fig. 8 is only an example, the present invention The pattern forming which kind of pattern to described metal level 180 is not limited in any way.
It as it was noted above, conductive protecting layer 160 and metallic reflector 150 are respectively provided with electric conductivity, is therefore Make metal level 180 not directly contact N, P electrode 150b, 150a, do not interfere with yet lead-in wire and N, Electrical connection between P electrode 150b, 150a.
In the present embodiment, chromium, aluminium, titanium, platinum, gold, the combination of one or more in nickel can be formed Metal level 180.Wherein, the thickness of chromium is in the range of 20~50 angstroms, and the thickness of aluminium is 750~3000 Angstrom in the range of, the thickness of titanium is in the range of 200~1000 angstroms, and the thickness of platinum is at 200~1000 angstroms In the range of;The thickness of gold is in the range of 2000~5000 angstroms;The thickness of nickel is at 200~1000 angstroms In the range of.
After this, refer to Fig. 9, described insulating medium layer 170 and metal level 180 are formed blunt Change layer 190, passivation layer 190 for by the 183rd, 184 insulation of the pattern of the metal level 180 on 170 surfaces every From.
In the present embodiment, described passivation layer 190 can use SiO2, SiN or SiON be as material.
In the present embodiment, the passivation layer 190 that thickness range is at 5000~20000 angstroms can be formed, but Above-mentioned thickness range is only an embodiment, and this is not limited in any way by the present invention.
After this, with continued reference to Figure 10, described passivation layer 190 is etched to expose metallic conduction post the 181st, 182, in order to follow-up by respectively with metallic conduction post the 181st, 182 P electrode 150a being connected, N electrode 150b draws.
Incorporated by reference to reference to Figure 11, formed correspond respectively to described metallic conduction post the 181st, 182 extraction electrode 210th, 220, owing to described metallic conduction post 181 electrically connects with described P electrode 150a, therefore described draw Go out electrode 210 for drawing P electrode 150a so that the steps such as follow-up encapsulation are carried out;In like manner, gold Belong to conductive pole 182 to electrically connect with N electrode 150b, thus be accordingly used in as extraction electrode 220 for by N Electrode 150b draws.
The 210th, described extraction electrode should have spacing to prevent from being short-circuited between 220, in the present embodiment, Described spacing size d should be not less than 100 microns.
In the present embodiment, one or more in chromium, aluminium, titanium, platinum, gold or tin can be used to make For described extraction electrode the 210th, 220 material.
Concrete, in the present embodiment, can make the thickness of chromium in the range of 20~50 angstroms, the thickness of aluminium Degree in the range of 750~3000 angstroms, the thickness of titanium in the range of 200~1000 angstroms, the thickness of platinum In the range of 200~1000 angstroms;The thickness of gold is in the range of 2000~5000 angstroms;The thickness of tin exists In the range of 200~1000 angstroms.
Additionally, refer to Figure 11, the present invention also provides a kind of LED chip, it is characterised in that include:
Substrate 100;Substrate 100 in the present embodiment is sapphire (Al2O3) substrate.But the present invention Not limiting the material of described substrate 100, its material also can be such as spinelle (MgAl2O4)、 Other substrates such as SiC, ZnS, ZnO or GaAs.
The formation n type gallium nitride layer 110 being positioned on described substrate 100;
The multiple quantum well layer 120 being positioned on described n type gallium nitride layer 110;
The p-type gallium nitride layer 130 being positioned on described multiple quantum well layer 120, in the present embodiment, described P Type gallium nitride layer 130 can be by the In-GaN mixing Mg being sequentially formed on multiple quantum well layer 120, The P-GaN mixing Mg and mix Mg Al-GaN constitute, described multiple quantum well layer 120 can be by InGaN layer and GaN layer are alternately stacked the quantum well structure of composition, and described n type gallium nitride layer 110 is permissible It is to be made up of the GaN layer mixing Si.
Described p-type gallium nitride layer 130 and multiple quantum well layer 120 are formed and expose n type gallium nitride layer 110 Opening 131;Described opening 131 is for forming the Mesa table top making LED chip;
Transparency conducting layer 140, including the first transparency conducting layer 140a being positioned on p-type gallium nitride layer 130 And the second transparency conducting layer 140b being positioned in described opening 131, described first transparency conducting layer 140a With second do not contact between transparency conducting layer 140b;The work function of described transparency conducting layer 140 is more than described The work function of the transparency conducting layer of p-type gallium nitride layer 130 and n type gallium nitride layer 110.
The work function of described transparency conducting layer 140 is more than p-type gallium nitride layer 130 and n type gallium nitride layer 110, and it is less than described metallic reflector 150, say, that the work function of described transparency conducting layer 140 Between described P, n type gallium nitride layer the 130th, between 110 and metallic reflector 150, be so conducive to fall Low n type gallium nitride layer the 110th, the barrier height between p-type gallium nitride layer and metallic reflector 150, and then Be conducive to reducing n type gallium nitride layer the 110th, ohm between p-type gallium nitride layer and metallic reflector 150 to connect Touching, this can improve the service behaviour of LED chip, for example, reduces the operating voltage of LED chip.
Additionally, described transparency conducting layer 140 typically has relatively small resistance sizes, and then help LED Electric current during chip operation spreads on transparency conducting layer 140 and comes, and reaches the purpose of current expansion, anti- The only generation of electric current jam, increases quantum efficiency, and this is conducive to promoting the work of LED chip further Make performance.Additionally, transparency conducting layer 140 does not interferes with P electrode 150a and p-type gallium nitride layer 130 Between, the electrical connection between N electrode 150b and n type gallium nitride layer 110, and chip can be made to produce Transparency conducting layer 140 described in light transmission, until metallic reflector 150, then reflects through metallic reflector 150 After appear from substrate 100, and then be beneficial to increase LED chip luminous efficiency.
Do not contact, to prevent N between described first transparency conducting layer 140a and the second transparency conducting layer 140b It is short-circuited after electrode 150b and P electrode 150a.
Concrete, in the present embodiment, be positioned at described p-type gallium nitride layer 130 surface first transparent leads The area of electric layer 140a is slightly less than the area of p-type gallium nitride layer 130, is so positioned at around opening 131 Part p-type gallium nitride layer 130 just can expose.Meanwhile, the second transparency conducting layer 140b only covers described The inwall of opening 131 and less than the edge of opening 131, such first, second transparency conducting layer 140a, It is not in contact with each other mutually between 140b.
In the present embodiment, the material of transparency conducting layer 140 is tin indium oxide (ITO), this material Transparency conducting layer 140 has higher light transmittance, say, that in its visible light wave range, transmitance compares Height, therefore can not keep off the light that SQW sends substantially, reduces the loss of light;Further, in the present embodiment P-type gallium nitride layer 130 in comprise the In-GaN layer of mixing Mg, it may have In component, therefore with oxidation Can interpenetrate between the transparency conducting layer 140 of indium tin, so advantageously reduce transparency conducting layer 140 Resistivity, and then help electric current during LED chip work to spread on transparency conducting layer 140 and come, Reaching the purpose of current expansion, preventing the generation of electric current jam, increase quantum efficiency, this is further Be conducive to promoting the service behaviour of LED chip.Additionally, the work function size of this material is typically in the range of institute State P, n type gallium nitride layer the 130th, between 110 and metallic reflector 150, this should can reach above-mentioned Reduce P, the purpose of n type gallium nitride layer the 130th, the barrier height between 110 and metallic reflector 150.
Additionally, it will be understood by those skilled in the art that the concrete big I of work function of transparency conducting layer 140 With by adjust its formed when technological parameter be adjusted, it is contemplated that formed transparency conducting layer The work function of 140 between n type gallium nitride layer 110 and metallic reflector 150 (or p-type nitridation Gallium layer 130 and metallic reflector 150 between), so its concrete work function size should be according to actual feelings Condition is adjusted, and this is not construed as limiting by the present invention.
But the transparency conducting layer 140 that whether necessarily be formed indium tin oxide material is not construed as limiting by the present invention, In other embodiments of the invention, other transparent and that there is electric conductivity materials can also be used, for example Zinc oxide, zinc oxide and tin indium oxide have similar work function.
In this embodiment, the thickness range of described transparency conducting layer 140 is within 50~3000 angstroms.At this Transparency conducting layer 140 in thickness range was unlikely to thin and reduced conductive capability and (namely cause resistance Become big), it is unlikely to again blocked up and causes the absorption to light too much, cause light transmittance to reduce.
The LED chip of the present invention also includes being positioned at the first transparency conducting layer 140a and the second transparency conducting layer The metallic reflector 150 of the argentiferous of 140b surface and sidewall, is wherein positioned at described first transparency conducting layer Metallic reflector 150 on 140a is P electrode 150a, is positioned on described second transparency conducting layer 140b Metallic reflector 150 be N electrode 150b, do not connect between described P electrode 150a and N electrode 150b Touching, the work function of described metallic reflector is more than the work function of described transparency conducting layer 140.
As it was noted above, described metallic reflector 150 and P, n type gallium nitride layer the 130th, 110 interval Have the first transparency conducting layer 140a and the second transparency conducting layer 140b, therefore metallic reflector 150 and P, N type gallium nitride layer the 130th, the work function between 110 can be reduced, such metallic reflector 150 And P, n type gallium nitride layer the 130th, the ohmic contact resistance between 110 is less, advantageously reduces LED core The operating voltage of piece.
Additionally, the metallic reflector 150 of described argentiferous has higher light reflectivity, so by Multiple-quantum The light that well layer 120 sends can more be reflected onto substrate 100 and appear from substrate 100, so Be conducive to increasing the luminous efficiency of LED chip further.
Described metallic reflector 150 is formed at described first transparency conducting layer 140a and the second electrically conducting transparent The surface of layer 140b and sidewall, be so conducive to passing through described transparency conducting layer 140 than more comprehensive reception Light.
Do not contact between described P electrode 150a and N electrode 150b, to prevent P electrode 150a and N Short circuit between electrode 150b.
Concrete, metallic reflector 150 can be individual layer or laminated construction.
In the present embodiment, metallic reflector 150 can be laminated construction, for example, and metallic reflector 150 The silver layer on transparency conducting layer 140 and the titanizing tungsten layer on silver layer, described silver layer and titanium can be included Change tungsten layer and collectively form the metallic reflector 150 of described laminated construction.
Concrete, the thickness of silver layer is in the range of 750~3000 angstroms, and the thickness of titanizing tungsten is 100~1000 Angstrom in the range of.The metallic reflector 150 that can make formation in this thickness range was unlikely to thin and led Cause reflectance reduction, be also unlikely to cause metallic reflector 150 blocked up and affect whole LED chip simultaneously Structure.But it will be understood by those skilled in the art that this number range is only an example, in reality In operating process, the thickness of these each material layers constituting metallic reflector 150 should be according to actual feelings Condition is adjusted.
Additionally, whether the present invention must be silver layer and titanium to the metallic reflector 150 of described laminated construction Change tungsten layer to be not construed as limiting, in other embodiments of the invention, can also include being positioned at described electrically conducting transparent Silver layer on layer 140, the titanizing tungsten layer on described silver layer and the platinum layer on titanizing tungsten layer, described silver layer, Titanizing tungsten layer and platinum layer collectively form the reflecting layer of described laminated construction.Wherein, the thickness of described silver layer In the range of 750~3000 angstroms, the thickness of titanizing tungsten in the range of 100~1000 angstroms, platinum layer Thickness can be in the range of 100~1000 angstroms.
In the present embodiment, it is additionally provided with conductive protecting layer 160 on described metallic reflector 150 surface.Described Conductive protecting layer 160 is for protecting to the metallic reflector 150 being formed.
Concrete, conductive protecting layer 160 in the present embodiment be formed at the surface of described P electrode 150a with It and sidewall, and is formed at the surface of N electrode 150b.
In the present embodiment, described conductive protecting layer 160 is laminated construction, specifically, laminated construction The material of conductive protecting layer 160 can be chromium, platinum, titanium, gold, the combination of one or more in nickel.
For example, conductive protecting layer 160 can include being formed on metallic reflector 150 layers of chrome, described Layer gold on titanium layer on platinum layer in layers of chrome, described platinum layer, described titanium layer and the nickel dam in layer gold, Wherein, platinum layer and titanium layer chemical property are more stable, primarily serve protection P electrode 150a, N electrode 150b Effect;Layers of chrome primarily serves adhesive attraction, say, that be used for increasing P electrode 150a, N electrode 150b And the adhesiveness between conductive protecting layer 160;Layer gold and nickel dam play protection conductive protecting layer 160 in its The effect of his material layer.
In the present embodiment, the thickness of described layers of chrome is in the range of 20~500 angstroms, the thickness of described platinum layer Degree is in the range of 200~1000 angstroms;The thickness of described titanium layer is in the range of 200~1000 angstroms;Institute Stating the thickness of layer gold in the range of 2000~5000 angstroms, the thickness of described nickel dam is at 200~2000 angstroms In the range of.These materials are conducive to while enough playing a protective role not in respective thickness range As for blocked up and affect LED chip volume.
In the present embodiment, in the conductive protecting layer 160 of whole laminated construction, nickel dam is positioned at top layer. It such is advantageous in that nickel material is relatively stable, it is not easy to be corroded, use nickel leading as laminated construction The top layer of electrical protection 160 is conducive to the impact making conductive protecting layer 160 be not readily susceptible to other steps.
But whether the present invention is necessary for sandwich construction to described conductive protecting layer 160 is not construed as limiting, at this In other embodiments of invention, can also is that single layer structure, concrete, described conductive protecting layer 160 Material can be titanizing tungsten in the range of 200~5000 angstroms for the thickness range.Have in this thickness range It is beneficial to while enough playing a protective role, be unlikely to blocked up and affect LED chip volume.
In the present embodiment, conductive protecting layer 160 is additionally provided with insulating medium layer 170, insulating medium layer 170 for carrying out insulation protection to each component having been formed.
In the present embodiment, described insulating medium layer 170 can use SiO2, SiN or SiON material Insulating medium layer 170.These materials compare the insulating dielectric materials being to be readily available.
Concrete, in the present embodiment, the thickness range of insulating medium layer 170 is at 5000~20000 angstroms In, the insulating medium layer 170 in this thickness range was unlikely to thin and was difficult to play insulation effect, again It is unlikely to volume that is blocked up and that affect whole LED chip.But above-mentioned thickness range is only a reality Executing example, this is not limited in any way by the present invention.
In the present embodiment, in described insulating medium layer 170 and its surface is also formed with metal level 180, The part that wherein metal level 180 is positioned in insulating medium layer 170 is metallic conduction post the 181st, 182, metal The position of conductive pole 181 correspond to P electrode 150a, and with P electrode 150a above conductive protecting layer 160 contacts, for drawing described P electrode 150a;The position of metallic conduction post 182 is corresponding to N electricity Pole 150b, and contact with the conductive protecting layer 160 above N electrode 150b, for by N electrode 150b Draw.
The part that metal level 180 is positioned at described insulating medium layer 170 surface includes that the 183rd, pattern 184 (asks With reference to Fig. 8), wherein, pattern 183 corresponds to metallic conduction post 181, for by described metallic conduction P electrode 150a is drawn by post 181;In like manner, described pattern 184 corresponds to metallic conduction post 182, uses In by above-mentioned metallic conduction post 182 by described N electrode 150b draw.
In the present embodiment, described metal level 180 can be by chromium, aluminium, titanium, platinum, gold, nickel one Plant or multiple composition.Wherein, the thickness of chromium is in the range of 20~50 angstroms, and the thickness of aluminium is 750~3000 Angstrom in the range of, the thickness of titanium is in the range of 200~1000 angstroms, and the thickness of platinum is at 200~1000 angstroms In the range of;The thickness of gold is in the range of 2000~5000 angstroms;The thickness of nickel is at 200~1000 angstroms In the range of.
In the present embodiment, being also formed with passivation layer 190 on described metal level 180, passivation layer 190 is used In metal level 180 pattern on 170 surfaces is the 183rd, 184 mutually isolated.
In the present embodiment, described passivation layer 190 can use SiO2, SiN or SiON be as material.
In the present embodiment, the thickness range of described passivation layer 190 is in 5000~20000 angstroms, but Above-mentioned thickness range is only an embodiment, and this is not limited in any way by the present invention.
Described passivation layer 190 has pattern to expose described metallic conduction post the 181st, 182.
In the present embodiment, described passivation layer 190 is formed corresponding to metallic conduction post the 181st, 182 Extraction electrode the 210th, 220, owing to described metallic conduction post 181 electrically connects with described P electrode 150a, because of This described extraction electrode 210 is used for the extraction of P electrode 150a to encapsulate;In like manner, metallic conduction post 182 electrically connect with N electrode 150b, thus be accordingly used in as extraction electrode 220 for by N electrode 150b Draw.
The 210th, described extraction electrode should have spacing to prevent from being short-circuited between 220, in the present embodiment, Described spacing size d should be not less than 100 microns.
In the present embodiment, described extraction electrode the 210th, 220 material can use chromium, aluminium, titanium, platinum, One or more in gold or tin.Concrete, the thickness of chromium in the range of 20~50 angstroms, the thickness of aluminium Degree in the range of 750~3000 angstroms, the thickness of titanium in the range of 200~1000 angstroms, the thickness of platinum In the range of 200~1000 angstroms;The thickness of gold is in the range of 2000~5000 angstroms;The thickness of tin exists In the range of 200~1000 angstroms.
In addition it should be noted that the LED chip of the present invention can be, but not limited to use above-mentioned making side Method obtains.
Although present disclosure is as above, but the present invention is not limited to this.Any those skilled in the art, Without departing from the spirit and scope of the present invention, all can make various changes or modifications, therefore the guarantor of the present invention The scope of protecting should be as the criterion with claim limited range.

Claims (19)

1. the preparation method of a LED chip, it is characterised in that include:
Substrate is provided;
Sequentially form n type semiconductor layer, active layer and p type semiconductor layer over the substrate;
Form the opening of exposed portion n type semiconductor layer in described p type semiconductor layer and active layer;
On described p type semiconductor layer and open bottom formed work function more than described p type semiconductor layer with And the transparency conducting layer of n type semiconductor layer, it is wherein positioned at the electrically conducting transparent on described p type semiconductor layer Layer is the first transparency conducting layer, is positioned in described opening the electrically conducting transparent on the n type semiconductor layer exposing Layer is the second transparency conducting layer, does not contacts between described first transparency conducting layer and the second transparency conducting layer;
Form the metal of argentiferous on the surface of described first transparency conducting layer and the second transparency conducting layer and sidewall Reflecting layer, the work function of the metallic reflector of described argentiferous is more than the work function of described transparency conducting layer, Wherein, the metallic reflector being positioned on described first transparency conducting layer is as the P electricity of described LED chip Pole, the metallic reflector being positioned on described second transparency conducting layer is as the N electricity of described LED chip Pole, does not contacts between described P electrode and N electrode.
2. preparation method as claimed in claim 1, it is characterised in that in p type semiconductor layer and active layer The step forming opening includes:
The mode using plasma etching removes part P-type semiconductor layer material and active layer material, with shape Become described opening.
3. preparation method as claimed in claim 1, it is characterised in that the step forming transparency conducting layer includes: Make the p type semiconductor layer near described opening expose from described first transparency conducting layer, and make described the Two transparency conducting layers cover the portion bottom surface of described opening, described second transparency conducting layer and described opening Sidewall between there is the first gap;
The step forming metallic reflector on the surface of the second transparency conducting layer and sidewall includes: make metallic reflection Layer is formed at described second layer at transparent layer and sidewall, and the sidewall of described metallic reflector and institute State and there is between the sidewall of opening the second gap.
4. preparation method as claimed in claim 1, it is characterised in that form tin indium oxide or zinc oxide material The transparency conducting layer of material.
5. preparation method as claimed in claim 1, it is characterised in that the step forming transparency conducting layer includes: The mode using magnetron sputtering deposition or reaction and plasma to deposit forms described transparency conducting layer.
6. preparation method as claimed in claim 1, it is characterised in that the step forming metallic reflector includes: Form the metallic reflector of individual layer or laminated construction.
7. preparation method as claimed in claim 6, it is characterised in that the step forming metallic reflector includes: Described transparency conducting layer sequentially forms silver layer and titanizing tungsten layer, described silver layer and titanizing tungsten layer Collectively form the metallic reflector of described laminated construction;
Or, described transparency conducting layer sequentially forms silver layer, titanizing tungsten layer and platinum layer, described silver layer, Titanizing tungsten layer and platinum layer collectively form the reflecting layer of described laminated construction.
8. preparation method as claimed in claim 1, it is characterised in that after forming the step of metallic reflector, Before the step of formation N electrode or P electrode, described preparation method also includes:
Form conductive protecting layer on described metallic reflector surface.
9. preparation method as claimed in claim 8, it is characterised in that the material of described conductive protecting layer is titanium Change tungsten, or, for the combination of one or more in chromium, platinum, titanium, copper, nickel.
10. preparation method as claimed in claim 8, it is characterised in that the step forming conductive protecting layer includes: Form the conductive protecting layer of individual layer or laminated construction.
11. preparation methods as claimed in claim 10, it is characterised in that the step forming conductive protecting layer includes: Form the conductive protecting layer of laminated construction, and make the surface of the conductive protecting layer of described laminated construction be nickel Layer.
12. preparation methods as claimed in claim 8, it is characterised in that the step forming conductive protecting layer includes: The mode using magnetron sputtering deposition or chemical gaseous phase to deposit forms described conductive protecting layer.
13. 1 kinds of LED chip, it is characterised in that include:
Substrate;
The n type semiconductor layer being positioned on described substrate;
The active layer being positioned on described n type semiconductor layer;
The p type semiconductor layer being positioned on described active layer, has dew in described p type semiconductor layer and active layer
Go out the opening of n type semiconductor layer;
Transparency conducting layer, including the first transparency conducting layer being positioned on p type semiconductor layer and opening described in being positioned at The second transparency conducting layer bottom Kou, between described first transparency conducting layer and the second transparency conducting layer not Contact;The work function of described transparency conducting layer is more than described p type semiconductor layer and n type semiconductor layer The work function of transparency conducting layer;
The metallic reflector of argentiferous, its be positioned at the first transparency conducting layer and the second layer at transparent layer and Sidewall, the metallic reflector being wherein positioned on described first transparency conducting layer is P electrode, is positioned at described Metallic reflector on second transparency conducting layer is N electrode, does not connects between described P electrode and N electrode Touch;The work function of described metallic reflector is more than the work function of described transparency conducting layer.
14. LED chip as claimed in claim 13, it is characterised in that the material of described transparency conducting layer is Tin indium oxide or zinc oxide.
15. LED chip as claimed in claim 13, it is characterised in that described metallic reflector be individual layer or Person's laminated construction.
16. LED chip as claimed in claim 15, it is characterised in that described metallic reflector includes being positioned at Silver layer on described transparency conducting layer and the titanizing tungsten layer being positioned on described silver layer;
Or, described metallic reflector include the silver layer being sequentially located on described transparency conducting layer, be positioned at described Titanizing tungsten layer on silver layer and the platinum layer being positioned on described titanizing tungsten layer.
17. LED chip as claimed in claim 13, it is characterised in that described LED chip also includes: It is positioned at the conductive protecting layer on described metallic reflector surface.
18. LED chip as claimed in claim 17, it is characterised in that described conductive protecting layer be individual layer or Person's laminated construction.
19. LED chip as claimed in claim 17, it is characterised in that the surface of described conductive protecting layer is Nickel dam.
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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107393428A (en) * 2017-05-04 2017-11-24 财团法人交大思源基金会 Structure and process of electrodeless shading light-emitting diode display
CN108922950A (en) * 2018-08-03 2018-11-30 佛山市国星半导体技术有限公司 A kind of high brightness flip LED chips and preparation method thereof
CN111081832A (en) * 2019-12-26 2020-04-28 福建兆元光电有限公司 Mini LED chip and manufacturing method
CN111129256A (en) * 2019-12-30 2020-05-08 广东德力光电有限公司 Silver mirror-based flip high-voltage chip and manufacturing method thereof
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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101154697A (en) * 2006-09-30 2008-04-02 香港微晶先进封装技术有限公司 Light emitting diode chip and method for manufacturing the same
CN101271949A (en) * 2004-11-11 2008-09-24 晶元光电股份有限公司 Production method of LED
CN101960603A (en) * 2008-01-08 2011-01-26 莫克斯特尼克公司 High-performance heterostructure light emitting devices and methods
CN102217104A (en) * 2008-06-16 2011-10-12 Lg伊诺特有限公司 Kim geun ho [kr]; kim sung kyoon [kr]; choi hee seok
CN102447016A (en) * 2010-10-09 2012-05-09 佛山市奇明光电有限公司 LED (Light Emitting Diode) structure and manufacturing method thereof
US20130285099A1 (en) * 2012-04-27 2013-10-31 Toyoda Gosei Co., Ltd. Semiconductor light-emitting element
CN103915463A (en) * 2013-01-09 2014-07-09 新世纪光电股份有限公司 Light-emitting device

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101271949A (en) * 2004-11-11 2008-09-24 晶元光电股份有限公司 Production method of LED
CN101154697A (en) * 2006-09-30 2008-04-02 香港微晶先进封装技术有限公司 Light emitting diode chip and method for manufacturing the same
CN101960603A (en) * 2008-01-08 2011-01-26 莫克斯特尼克公司 High-performance heterostructure light emitting devices and methods
CN102217104A (en) * 2008-06-16 2011-10-12 Lg伊诺特有限公司 Kim geun ho [kr]; kim sung kyoon [kr]; choi hee seok
CN102447016A (en) * 2010-10-09 2012-05-09 佛山市奇明光电有限公司 LED (Light Emitting Diode) structure and manufacturing method thereof
US20130285099A1 (en) * 2012-04-27 2013-10-31 Toyoda Gosei Co., Ltd. Semiconductor light-emitting element
CN103915463A (en) * 2013-01-09 2014-07-09 新世纪光电股份有限公司 Light-emitting device

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10535708B2 (en) 2017-05-04 2020-01-14 National Chiao Tung University Electrodeless light-emitting diode display and method for fabricating the same
US10553640B2 (en) 2017-05-04 2020-02-04 National Chiao Tung University Electrodeless light-emitting diode display and method for fabricating the same
CN107393428B (en) * 2017-05-04 2020-04-28 财团法人交大思源基金会 Structure and process of electrodeless shading light-emitting diode display
CN107393428A (en) * 2017-05-04 2017-11-24 财团法人交大思源基金会 Structure and process of electrodeless shading light-emitting diode display
CN108922950A (en) * 2018-08-03 2018-11-30 佛山市国星半导体技术有限公司 A kind of high brightness flip LED chips and preparation method thereof
CN108922950B (en) * 2018-08-03 2023-10-20 佛山市国星半导体技术有限公司 High-brightness flip LED chip and manufacturing method thereof
CN111864027B (en) * 2019-10-11 2022-09-16 中国科学院宁波材料技术与工程研究所 Ultraviolet LED high-counter electrode, ultraviolet LED and preparation method thereof
CN111864027A (en) * 2019-10-11 2020-10-30 中国科学院宁波材料技术与工程研究所 Ultraviolet LED high-counter electrode, ultraviolet LED and preparation method thereof
CN111081832A (en) * 2019-12-26 2020-04-28 福建兆元光电有限公司 Mini LED chip and manufacturing method
CN111129256A (en) * 2019-12-30 2020-05-08 广东德力光电有限公司 Silver mirror-based flip high-voltage chip and manufacturing method thereof
CN113571622B (en) * 2021-07-22 2022-08-23 厦门三安光电有限公司 Light emitting diode and method for manufacturing the same
CN113571622A (en) * 2021-07-22 2021-10-29 厦门三安光电有限公司 Light emitting diode and preparation method thereof
CN116631889A (en) * 2023-07-24 2023-08-22 江西兆驰半导体有限公司 Defective pixel detection method of Micro-LED chip

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