CN106157886A - Pixel circuit - Google Patents
Pixel circuit Download PDFInfo
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- CN106157886A CN106157886A CN201610754255.6A CN201610754255A CN106157886A CN 106157886 A CN106157886 A CN 106157886A CN 201610754255 A CN201610754255 A CN 201610754255A CN 106157886 A CN106157886 A CN 106157886A
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- 230000005611 electricity Effects 0.000 claims description 6
- 230000008878 coupling Effects 0.000 claims description 4
- 238000010168 coupling process Methods 0.000 claims description 4
- 238000005859 coupling reaction Methods 0.000 claims description 4
- 239000000126 substance Substances 0.000 claims description 2
- 230000011664 signaling Effects 0.000 claims 1
- 239000003990 capacitor Substances 0.000 abstract 2
- 238000010586 diagram Methods 0.000 description 10
- 239000010409 thin film Substances 0.000 description 10
- 230000007423 decrease Effects 0.000 description 5
- 230000001427 coherent effect Effects 0.000 description 4
- 238000004020 luminiscence type Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 238000012163 sequencing technique Methods 0.000 description 3
- NAWXUBYGYWOOIX-SFHVURJKSA-N (2s)-2-[[4-[2-(2,4-diaminoquinazolin-6-yl)ethyl]benzoyl]amino]-4-methylidenepentanedioic acid Chemical compound C1=CC2=NC(N)=NC(N)=C2C=C1CCC1=CC=C(C(=O)N[C@@H](CC(=C)C(O)=O)C(O)=O)C=C1 NAWXUBYGYWOOIX-SFHVURJKSA-N 0.000 description 2
- 230000001276 controlling effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000002596 correlated effect Effects 0.000 description 1
- 230000001808 coupling effect Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/06—Details of flat display driving waveforms
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
A pixel circuit comprises a first transistor, a second transistor, a first capacitor, a writing unit and a light emitting diode element. The first terminal of the first transistor is used for receiving a first voltage. The second terminal of the first transistor is coupled to the first node. The first control end of the first transistor is coupled with the second node. The second control end of the first transistor is used for receiving a first control signal. The first end of the second transistor is used for receiving a data signal. The second end of the second transistor is coupled to the second node. The control end of the second transistor is used for receiving a second control signal. Two ends of the first capacitor are respectively coupled with the first node and the second node. The write unit is coupled to the first node. The write unit is used for adjusting the voltage level of the first node according to the first reference voltage. One end of the light emitting diode element is coupled to the first node, and the other end of the light emitting diode element is coupled to a second voltage.
Description
Technical field
The present invention relates to a kind of image element circuit, a kind of image element circuit with double gate transistor element.
Background technology
Along with the gradually development of Display Technique, mobile phone screen resolution is from video image array (Video the earliest
Graphics Array, VGA) or video image array 1/4th sizes (Quarter Video Graphics Array,
QVGA), the 720p making people pleasing is gradually improved into.Thereafter, along with the raising of industrywide standard, mobile phone screen resolution carries again
It is raised to 1080p.Under the specification of 1080P, user has been difficult to the naked eye distinguish pixel.Finally, along with Display Technique
Progress, mobile phone screen resolution has more evolved to can not distinguish out the most completely the 2K resolution of pixel.
Resolution is the highest also to be represent in same screen size, and elemental area must be more and more less.But the most at present
Technology for, image element circuit have to have multiple thin film transistor (TFT) (thin film transistor, TFT), could be appropriate
Drive the luminosity of pixel light emission or compensation pixel kindly.Therefore, in the middle of the planning area to a pixel, pixel
Circuit will certainly account for the area of part, and decreases the area that in pixel, luminous zone can use.In other words, when decreasing
The parts number of image element circuit or when reducing the area shared by image element circuit, the entire area of pixel can decline effectively.But
The most so far, the elemental area of industry still cannot further decline because image element circuit need to occupy certain area.
Summary of the invention
The invention reside in a kind of image element circuit of offer, to overcome the elemental area of current industry still because image element circuit need to occupy
Certain area and the problem that cannot further decline.
A kind of image element circuit disclosed in this invention includes the first transistor, transistor seconds, the first electric capacity, writing unit
With light-emitting diode.First end of the first transistor is in order to receive the first voltage.Second end of the first transistor couples
One node.First control end of the first transistor couples secondary nodal point.Second control end of the first transistor is in order to receive first
Control signal.The first transistor is optionally led according to the voltage level of secondary nodal point and the voltage level of the first control signal
Logical.First end of transistor seconds is in order to receive data signal.Second end of transistor seconds couples secondary nodal point.Second crystal
The control end of pipe is in order to receive the second control signal.The two ends of the first electric capacity are respectively coupled to primary nodal point and secondary nodal point.Write
Unit couples primary nodal point.Writing unit in order to adjust the voltage level of primary nodal point according to the first reference voltage.Light-emitting diodes
One end of tube elements couples primary nodal point, and the other end couples the second voltage.
Comprehensively the above, the invention provides a kind of image element circuit, and the first transistor in image element circuit has first
Controlling end and second and control end, the first transistor controls end via the first control end and second and is controlled by the voltage electricity of secondary nodal point
Put down and the first control signal.Image element circuit is able to realize complicated sequencing contro by less element, thus is reducing element
In the case of number, the properly luminescence of driven for emitting lights two body member or the luminosity of compensation light-emitting diode.
The above explanation about present disclosure and the explanation of following embodiment are to demonstrate and explain this
Bright spirit and principle, and provide scope of the presently claimed invention further to explain.
Accompanying drawing explanation
Fig. 1 is the circuit diagram according to the image element circuit depicted in one embodiment of the invention.
Fig. 2 is the time diagram of the coherent signal depicted in the image element circuit according to Fig. 1 of the present invention.
Fig. 3 is the circuit diagram according to the image element circuit depicted in another embodiment of the present invention.
Fig. 4 is the time diagram of the coherent signal depicted in the image element circuit according to Fig. 3 of the present invention.
Description of reference numerals:
1,1 ' image element circuit
12,12 ' writing unit
C1, C1 ' first electric capacity
C2 the second electric capacity
D, D ' light-emitting diode
N1, N1 ' primary nodal point
N2, N2 ' secondary nodal point
N3 ' the 3rd node
P1, P1 ' pre-charging stage
P2, P2 ' compensated stage
P3 write phase
P4, P3 ' glow phase
T1, T1 ' the first transistor
T2, T2 ' transistor seconds
T3 ' third transistor
T4 ' the 4th transistor
T5 ' the 5th transistor
V1, V1 ' first voltage
V2, V2 ' second voltage
VC1, VC1 ' first control signal
VC2, VC2 ' second control signal
VC3 ' the 3rd control signal
VC ' 4 the 4th control signal
Vdata, Vdata ' data signal
Vofs compensates magnitude of voltage
Vref1, Vref1 ' first reference voltage
Vref2 ' the second reference voltage
Vsig signal voltage value
Detailed description of the invention
Hereinafter describing detailed features and the advantage of the present invention the most in detail, its content be enough to make this area skill
Art personnel understand the technology contents of the present invention and implement according to this, and according to content disclosed in this specification, claim and attached
Figure, purpose that any present invention of skilled person readily understands that is correlated with and advantage.Below example is further
Describe the viewpoint of the present invention in detail, but non-to limit scope of the invention anyways.
Refer to Fig. 1, Fig. 1 is the circuit diagram according to the image element circuit depicted in one embodiment of the invention.Such as Fig. 1 institute
Showing, image element circuit 1 has the first transistor T1, transistor seconds T2, the first electric capacity C1, writing unit 12 and light emitting diode unit
Part D.
First end of the first transistor T1 is in order to receive the first voltage V1.Second end of the first transistor T1 couples first segment
Point N1.The first control end of the first transistor T1 couples secondary nodal point N2.The second control end of the first transistor T1 is in order to receive
First control signal VC1.The first transistor T1 is electric according to the voltage level of secondary nodal point N2 and the voltage of the first control signal VC1
Put down and selectively turn on.In one embodiment, the first transistor T1 for example, double gate transistor (dual gate
Or multi-gated transistor transistor), the opposing high voltage potentials level in the first voltage V1 for example, system, but the most not as
Limit.
First end of transistor seconds T2 is in order to receive data signal Vdata.Second end of transistor seconds T2 couples
Two node N2.The control end of transistor seconds T2 is in order to receive the second control signal VC2.In this embodiment, the first electric capacity C1
Two ends be respectively coupled to primary nodal point N1 and secondary nodal point N2.Transistor seconds T2 for example, thin film transistor (TFT) (thin film
Transistor, TFT), but be not limited.In this embodiment, transistor seconds T2 is the thin film transistor (TFT) of n-type doping,
But in other embodiment, in the case of coordinating the relative level height adjusting other signals, transistor seconds T2 also may be used
Thin film transistor (TFT) for p-type doping.
Writing unit 12 couples primary nodal point N1.Writing unit 12 is in order to adjust first according to the first reference voltage Vref 1
The voltage level of node N1.In this embodiment, writing unit 12 for example, one second electric capacity C2, one end coupling of the second electric capacity C2
Meeting primary nodal point N1, the other end of the second electric capacity C2 is in order to receive the first reference voltage Vref 1.In other embodiment, write
Entering unit 12 can be the element beyond electric capacity or the interlock circuit formed with multiple elements, and is not limited with the example lifted
System.
One end of light-emitting diode D couples primary nodal point N1, and the other end couples the second voltage V2.Light emitting diode unit
Part D for example, Organic Light Emitting Diode (organic light emitting diode, OLED) element, but be not limited.
Relative low voltage level in second voltage V2 for example, system, but be not limited.
Please with reference to Fig. 2 with the flowing mode of making of pixels illustrated circuit 1, Fig. 2 is the image element circuit institute according to Fig. 1 of the present invention
The time diagram of the coherent signal illustrated.Pre-charging stage P1, compensated stage P2, write rank are being had defined in time diagram
Section P3 and glow phase P4.Wherein, pre-charging stage P1, is write prior to write phase P3 prior to compensated stage P2, compensated stage P2
Enter stage P3 prior to glow phase P4.
In pre-charging stage P1, the first control signal VC1 is relative high-voltage level, and the second control signal VC2 is
Relative high-voltage level, the first reference voltage Vref 1 is relative high-voltage level, the voltage level of data signal Vdata
It is a compensation magnitude of voltage Vofs.Now, the first transistor T1 can be conducting or be not turned on, and transistor seconds T2 turns on.First
The voltage level VN1 of node N1 can express such as formula (1):
VN1=Vofs formula (1)
In compensated stage P2, the first control signal VC1 is relative high-voltage level, and the second control signal VC2 is phase
To high-voltage level, the first reference voltage Vref 1 is relative low voltage level, and data signal Vdata has compensation voltage
Value Vofs.Now, the first transistor T1 turns on, and transistor seconds T2 conducting.The voltage level of primary nodal point N1 and second section
The voltage level of some N2 can be expressed such as formula (2) and formula (3).Wherein, the conducting threshold that Vth1 is the first transistor T1 in formula (3)
Voltage.Now, the first reference voltage Vref 1 is that relative low voltage level is written into the voltage level guaranteeing secondary nodal point N2
Desired voltage level.
VN1=Vofs formula (2)
VN2=Vofs-Vth1 formula (3)
In write phase P3, the first control signal VC1 is relative low voltage level, and the second control signal VC2 is phase
To high-voltage level, the first reference voltage Vref 1 is relative low voltage level, and data signal Vdata has signal voltage
Value Vsig.Now, the first transistor T1 is not turned on, and transistor seconds T2 turns on.The voltage level of primary nodal point N1 and second section
The voltage level of some N2 can be expressed such as formula (4) and formula (5).Wherein, a in formula (5) is the first electric capacity C1 and the second electric capacity C2 shape
The dividing ratios become.If represent the capacitance of the first electric capacity C1 briefly with label C1, and represent the second electric capacity C2 with label C2
Capacitance, dividing ratios a can express such as formula (6).Now, the signal voltage value Vsig of data signal Vdata is written into first
Node N1, and the signal voltage value Vsig of data signal Vdata is via the capacitance coupling effect of the first electric capacity C1 and the first electric capacity
The dividing potential drop of C1 and the second electric capacity C2 affects the voltage level of secondary nodal point N2 further.In this embodiment, signal voltage value
Vsig is higher than compensating magnitude of voltage Vofs, but in practice, compensating magnitude of voltage Vofs can higher than signal voltage value Vsig not yet
With for embodiment for limit.
VN1=Vsig formula (4)
VN2=Vofs-Vth1+a (Vsig-Vofs) formula (5)
In glow phase P4, the first control signal VC1 is relative high-voltage level, and the second control signal VC2 is phase
To low voltage level, the first reference voltage Vref 1 is relative high-voltage level, and data signal Vdata has compensation voltage
Value Vofs.Now, the first transistor T1 turns on, and transistor seconds T2 is not turned on.The voltage of primary nodal point N1 and secondary nodal point N2
Level can be expressed such as formula (7) and formula (8).Wherein, formula (7) and the conducting voltage that Vd is light-emitting diode D in formula (8).
Now, light-emitting diode D is switched on, and ID pair, the electric current that light-emitting diode D is provided according to the first transistor T1
Should ground luminescence.Electric current ID can express such as formula (9-1).Parameter k of electric current ID then can be expressed such as formula (9-2).In its Chinese style (9-2)
μnFor carrier transport factor (carrier mobility), COXFor the specific capacitance size of grid oxic horizon,For MOS field
The grid width of effect transistor and the ratio of grid length.
VN1=Vth+ (1-a) (Vsig-Vofs)+V2+Vd formula (7)
VN2=V2+Vd formula (8)
ID=k [(1-a) (Vsig-Vofs)]2Formula (9-1)
Control end via the first control end and second of the first transistor T1, be able to carry out the most multiple to the first transistor T1
Miscellaneous sequencing contro.Therefore, in this embodiment, it is able to reduce to only the first transistor the transistor in image element circuit 1
T1 and transistor seconds T2, and form the most brief two transistor two electric capacity (2transistor 2capacitor, 2T2C)
Structure, thus decrease the area occupied by image element circuit 1.On the other hand, in the case of suitably adjusting each control signal,
What the electric current that the thin film transistor (TFT) more general for electric current ID that the first transistor T1 is provided can be provided by came stablizes, and promotes accordingly
The stable luminescence degree of light-emitting diode D.
Refer to Fig. 3, Fig. 3 is the circuit diagram according to the image element circuit depicted in another embodiment of the present invention.Compare
In the embodiment shown in Fig. 1, the image element circuit 1 ' of Fig. 3 has more third transistor T3 ' and the 4th transistor T4 '.Additionally, at figure
In embodiment shown in 3, the writing unit 12 ' of image element circuit 1 ' is the 5th transistor T5 '.
In more detail, third transistor T3 ' the first end couple secondary nodal point N2 '.Third transistor T3 ' the second end
Couple the 3rd node N3 '.Third transistor T3 ' control end in order to receive the 3rd control signal VC3 '.The two of first electric capacity C1 '
End is respectively coupled to primary nodal point N1 ' and the 3rd node N3 '.First end of the 4th transistor T4 ' couples the 3rd node N3 '.4th
Second end of transistor T4 ' is in order to receive the second reference voltage Vref 2 '.The control end of the 4th transistor T4 ' is in order to receive second
Control signal VC2 '.First end of the 5th transistor T5 ' couples primary nodal point N1 '.Second end of the 5th transistor T5 ' is in order to connect
Receive the first reference voltage Vref 1 '.The control end of the 5th transistor T5 ' is in order to receive the 4th control signal VC4 '.Third transistor
T3 ', the 4th transistor T4 ' and the 5th transistor T5 ' for example, thin film transistor (TFT), but be not limited thereto.Third transistor
T3 ', the 4th transistor T4 ' and the 5th transistor T5 ' are the thin film transistor (TFT) of n-type doping, but in other embodiment, are joining
Close in the case of adjusting the relative level of other signals, third transistor T3 ', the 4th transistor T4 ' and the 5th transistor T5 ' also
It can be the thin film transistor (TFT) of p-type doping.
Owing to the circuit framework of the embodiment shown in Fig. 4 is different with the embodiment shown in Fig. 3, therefore in the control of signal
In sequential processed the most different.Refer to the Fig. 4 start sequential with pixels illustrated circuit 1 ', Fig. 4 is the picture according to Fig. 3 of the present invention
The time diagram of element coherent signal depicted in circuit.Illustrated pre-charging stage P1 in the diagram ', compensated stage P2 ' with send out
Photophase P3 '.Wherein, pre-charging stage P1 ' prior to compensated stage P2 ', compensated stage P2 ' is prior to glow phase P3 '.
' in, the first control signal VC1 ' and the 3rd control signal VC3 in pre-charging stage P1 ' it is relative low-voltage electricity
Flat, the second control signal VC2 ' with the 4th control signal VC4 ' is relative high-voltage level, transistor seconds T2 ', the 4th crystalline substance
Body pipe T4 ' and the 5th transistor T5 ' is switched on, the first transistor T1 ' and third transistor T3 ' it is not turned on.Primary nodal point N1's '
The voltage level of voltage level, the voltage level of secondary nodal point N2 ' and the 3rd node N3 ' can express as formula (10), formula (11) with
Formula (12).Wherein, VN1' is the voltage level of primary nodal point N1 ', and VN2' is the voltage level of secondary nodal point N2 ', and VN3' is
The voltage level of three node N3 '.
VN1'=Vdata formula (10)
VN2'=Vref1' formula (11)
VN3'=Vref2' formula (12)
In compensated stage P2 ', the 3rd control signal and the 4th control signal are low voltage level, the first control signal with
Second control signal is high-voltage level.The first transistor T1 ', transistor seconds T2 ' are switched on the 4th transistor T4 ', the
Three transistor T3 ' are not turned on the 5th transistor T5 '.The voltage level of primary nodal point N1 ', the voltage level of secondary nodal point N2 '
Can express such as formula (13), formula (14) and formula (15) with the voltage level of the 3rd node N3 '.Wherein, Vth' is the first transistor T1 '
Conducting threshold voltage.
VN1'=Vdata' formula (13)
VN2'=Vdata'-Vth' formula (14)
VN3'=Vref2' formula (15)
In glow phase P3 ' in, the second control signal VC2 ' and the 4th control signal VC4 ' it is low voltage level, the first control
Signal VC1 ' processed and the 3rd control signal VC3 ' it is high-voltage level.The first transistor T1 ' and third transistor T3 ' switched on,
Transistor seconds T2 ', the 4th transistor T4 ' are not turned on the 5th transistor T5 '.The voltage level of primary nodal point N1 ' and second
The voltage level of node N2 ' can be expressed such as formula (16) and formula (17).Now, light-emitting diode D ' is according to the first transistor
The electric current ID ' that T1 ' provides is luminous accordingly.Wherein, electric current ID ' can express such as formula (18-1).The parameter beta of electric current ID ' then can table
Reach such as formula (18-2).Wherein, in formula (18-2), μnFor carrier transport factor (carriermobility), COXFor grid oxic horizon
Specific capacitance size,Grid width and the ratio of grid length for metal-oxide half field effect transistor.
VN1'=Vref2'-Vdata'+Vth'+V2'+Vd' formula (16)
VN2'=V2'+Vd' formula (17)
Comprehensively the above, the invention provides a kind of image element circuit, and the first transistor in image element circuit has first
Controlling end and second and control end, the first transistor controls end via the first control end and second and is controlled by the voltage electricity of secondary nodal point
Put down and the first control signal.The circuit structure formed with other elements by the first transistor, image element circuit can be with less
Element realizes complicated sequencing contro, and the output electric current of the first transistor is less susceptible to by effect of noise.Thus subtracting
In the case of few parts number, the properly luminescence of driven for emitting lights two body member or the luminosity of compensation light-emitting diode, also
Reduce the entire area of pixel cell.
Although the present invention is open as above with aforesaid embodiment, so it is not limited to the present invention.Without departing from this
In bright spirit and scope, the variation done and retouching, all belong to the claims of the present invention.About institute circle of the present invention
Fixed protection domain refer to appended claim.
Claims (11)
1. an image element circuit, including:
One the first transistor, one first end of this first transistor is in order to receive one first voltage, and the 1 of this first transistor
Two ends couple a primary nodal point, and the first control end of this first transistor couples a secondary nodal point, and the 1 of this first transistor the
Two control ends in order to receive one first control signal, this first transistor according to this secondary nodal point voltage level with this first control
The voltage level of signal processed selectively turns on；
One transistor seconds, the first end of this transistor seconds in order to receive a data signal, the second end of this transistor seconds
Coupling this secondary nodal point, the control end of this transistor seconds is in order to receive one second control signal；
One first electric capacity, the two ends of this first electric capacity are respectively coupled to this primary nodal point and this secondary nodal point；
One writing unit, this writing unit couples this primary nodal point, and this writing unit is in order to adjust according to one first reference voltage
The voltage level of this primary nodal point；And
One light-emitting diode, one end of this light-emitting diode couples this primary nodal point, and the other end couples one second electricity
Pressure.
2. image element circuit as claimed in claim 1, wherein this writing unit is one second electric capacity, one end coupling of this second electric capacity
Connecing this primary nodal point, the other end of this second electric capacity is in order to receive this first reference voltage.
3. image element circuit as claimed in claim 2, wherein in a pre-charging stage, this first control signal, this second control
Signal and this first reference voltage are high-voltage level, and the voltage level of this data signal is a compensation magnitude of voltage, this second crystalline substance
Body pipe is switched on.
4. image element circuit as claimed in claim 3, wherein in the compensated stage after this pre-charging stage, this first control
Signal and this second control signal are high-voltage level, and this first reference voltage is low voltage level, the voltage of this data signal
Level is this compensation magnitude of voltage, and this first transistor is switched on this transistor seconds.
5. image element circuit as claimed in claim 4, wherein in the write phase after this compensated stage, this second control letter
Number being high-voltage level, this first control signal and this first reference voltage are low voltage level, the voltage electricity of this data signal
Putting down is a signal voltage value, and this first transistor is not turned on, and this transistor seconds is switched on.
6. image element circuit as claimed in claim 5, wherein this signal voltage value is higher than this compensation magnitude of voltage.
7. image element circuit as claimed in claim 5, wherein in the glow phase after this write phase, this first control letter
Number with this first reference voltage be high-voltage level, this second control signal is low voltage level, this first transistor be switched on,
This transistor seconds is not turned on.
8. image element circuit as claimed in claim 1, also includes:
One third transistor, the first end of this third transistor couples this secondary nodal point, and the second end of this third transistor couples
One the 3rd node, the control end of this third transistor is in order to receive one the 3rd control signal, and coupling is distinguished at the two ends of this first electric capacity
Connect this primary nodal point and the 3rd node；And
One the 4th transistor, the first end of the 4th transistor couples the 3rd node, the second end of the 4th transistor in order to
Receiving one second reference voltage, the control end of the 4th transistor is in order to receive this second control signal；
Wherein, this writing unit is one the 5th transistor, and the first end of the 5th transistor couples this primary nodal point, and the 5th is brilliant
Second end of body pipe is in order to receive this first reference voltage, and the control end of the 5th transistor is in order to receive one the 4th control letter
Number.
9. image element circuit as claimed in claim 8, wherein in a pre-charging stage, this first control signal controls with the 3rd
Signal is low voltage level, and this second control signal and the 4th control signal are high-voltage level, this transistor seconds, this
Four transistor AND gate the 5th transistors are switched on, and this first transistor is not turned on this third transistor.
10. image element circuit as claimed in claim 9, wherein in the compensated stage after this pre-charging stage, the 3rd control
Signal processed and the 4th control signal are low voltage level, and this first control signal and this second control signal are high voltage electricity
Flat, this first transistor, this transistor seconds are switched on the 4th transistor, and this third transistor is with the 5th transistor not
Conducting.
11. image element circuits as claimed in claim 10, wherein in the glow phase after this compensated stage, this second control
Signal and the 4th control signal are low voltage level, and this first control signal and the 3rd control signal are high-voltage level,
This first transistor is switched on this third transistor, and this transistor seconds, the 4th transistor AND gate the 5th transistor are not led
Logical.
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| TW105121049A TWI569249B (en) | 2016-07-01 | 2016-07-01 | Pixel circuit |
| TW105121049 | 2016-07-01 |
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| CN106157886A true CN106157886A (en) | 2016-11-23 |
| CN106157886B CN106157886B (en) | 2019-05-24 |
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Also Published As
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| TW201802788A (en) | 2018-01-16 |
| CN106157886B (en) | 2019-05-24 |
| TWI569249B (en) | 2017-02-01 |
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