CN106157886B - Pixel circuit - Google Patents

Pixel circuit Download PDF

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Publication number
CN106157886B
CN106157886B CN201610754255.6A CN201610754255A CN106157886B CN 106157886 B CN106157886 B CN 106157886B CN 201610754255 A CN201610754255 A CN 201610754255A CN 106157886 B CN106157886 B CN 106157886B
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transistor
node
control signal
voltage level
pixel circuit
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CN106157886A (en
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叶荫平
曾卿杰
蔡永胜
徐国城
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AU Optronics Corp
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AU Optronics Corp
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/06Details of flat display driving waveforms

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

A pixel circuit comprises a first transistor, a second transistor, a first capacitor, a writing unit and a light emitting diode element. The first terminal of the first transistor is used for receiving a first voltage. The second terminal of the first transistor is coupled to the first node. The first control end of the first transistor is coupled with the second node. The second control end of the first transistor is used for receiving a first control signal. The first end of the second transistor is used for receiving a data signal. The second end of the second transistor is coupled to the second node. The control end of the second transistor is used for receiving a second control signal. Two ends of the first capacitor are respectively coupled with the first node and the second node. The write unit is coupled to the first node. The write unit is used for adjusting the voltage level of the first node according to the first reference voltage. One end of the light emitting diode element is coupled to the first node, and the other end of the light emitting diode element is coupled to a second voltage.

Description

Pixel circuit
Technical field
The present invention relates to a kind of pixel circuit, especially a kind of pixel circuit with double gate transistor element.
Background technique
With the gradually development of display technology, mobile phone screen resolution ratio is from earliest video image array (Video Graphics Array, VGA) or video image array a quarter size (Quarter Video Graphics Array, QVGA), gradually improve into the 720p for making people pleasing.Thereafter, with the raising of industrywide standard, mobile phone screen resolution ratio mentions again It has been raised to 1080p.Under the specification of 1080P, user has been difficult with the naked eye to distinguish pixel.Finally, with display technology Progress, mobile phone screen resolution ratio more evolved to the basic 2K resolution ratio distinguished do not come out pixel completely.
The resolution ratio the high also to represent in same screen size, and elemental area must be smaller and smaller.But just at present Technology for, pixel circuit has to have multiple thin film transistor (TFT)s (thin film transistor, TFT), could be appropriate The light emission luminance of pixel light emission either compensation pixel is driven kindly.Therefore, it is planning in the area to a pixel, pixel Circuit will certainly account for the area of part, and reduce the area that luminous zone can use in pixel.In other words, when reducing The parts number of pixel circuit or when reducing area shared by pixel circuit, the entire area of pixel can effectively decline.But Just so far, the elemental area of industry still can not further decline because pixel circuit need to occupy certain area.
Summary of the invention
The invention reside in a kind of pixel circuit is provided, to overcome the elemental area of current industry still because pixel circuit need to occupy Certain area and the problem of can not further decline.
A kind of pixel circuit disclosed in this invention includes the first transistor, second transistor, first capacitor, writing unit With light-emitting diode.The first end of the first transistor is to receive first voltage.The second end coupling the of the first transistor One node.First control terminal of the first transistor couples second node.Second control terminal of the first transistor is to receive first Control signal.The first transistor is selectively led according to the voltage level of second node and the voltage level of first control signal It is logical.The first end of second transistor is to receive data-signal.The second end of second transistor couples second node.Second crystal The control terminal of pipe is to receive second control signal.The both ends of first capacitor are respectively coupled to first node and second node.Write-in Unit couples first node.Writing unit is to the voltage level according to the first reference voltage adjustment first node.Light-emitting diodes One end of tube elements couples first node, and the other end couples second voltage.
In summary, the first transistor in pixel circuit has first the present invention provides a kind of pixel circuit Control terminal and the second control terminal, the first transistor are controlled by the voltage electricity of second node via the first control terminal and the second control terminal Flat and first control signal.Pixel circuit is able to realize complicated timing control by less element, thus reducing element In the case where number, the two-body element that shines properly is driven to shine or compensate the light emission luminance of light-emitting diode.
Above is to demonstrate and explain this hair about the explanation of present disclosure and the explanation of the following embodiments and the accompanying drawings Bright spirit and principle, and scope of the presently claimed invention is provided and is further explained.
Detailed description of the invention
Fig. 1 is the circuit diagram of the pixel circuit according to depicted in one embodiment of the invention.
Fig. 2 is the time diagram of coherent signal depicted in pixel circuit according to Fig. 1 of the present invention.
Fig. 3 is the circuit diagram of the pixel circuit according to depicted in another embodiment of the present invention.
Fig. 4 is the time diagram of coherent signal depicted in pixel circuit according to Fig. 3 of the present invention.
Description of symbols:
1,1 ' pixel circuit
12,12 ' writing unit
C1, C1 ' first capacitor
The second capacitor of C2
D, D ' light-emitting diode
N1, N1 ' first node
N2, N2 ' second node
N3 ' third node
P1, P1 ' pre-charging stage
P2, P2 ' compensated stage
P3 write phase
P4, P3 ' light emitting phase
T1, T1 ' the first transistor
T2, T2 ' second transistor
T3 ' third transistor
The 4th transistor of T4 '
The 5th transistor of T5 '
V1, V1 ' first voltage
V2, V2 ' second voltage
VC1, VC1 ' first control signal
VC2, VC2 ' second control signal
VC3 ' third controls signal
VC ' 4 the 4th controls signal
Vdata, Vdata ' data signal
Vofs offset voltage value
Vref1, Vref1 reference voltage of ' first
The second reference voltage of Vref2 '
Vsig signal voltage value
Specific embodiment
Describe detailed features and advantage of the invention in detail in embodiments below, content is enough to make this field skill Art personnel understand technology contents of the invention and implement accordingly, and according to content disclosed in this specification, claim and attached Figure, anyone skilled in the art can be readily understood upon the relevant purpose of the present invention and advantage.Embodiment below is further The viewpoint that the present invention will be described in detail, but it is non-anyways to limit scope of the invention.
Fig. 1 is please referred to, Fig. 1 is the circuit diagram of the pixel circuit according to depicted in one embodiment of the invention.Such as Fig. 1 institute Show, pixel circuit 1 has the first transistor T1, second transistor T2, first capacitor C1, writing unit 12 and light emitting diode member Part D.
The first end of the first transistor T1 is to receive first voltage V1.The second end of the first transistor T1 couples first segment Point N1.The first control terminal of the first transistor T1 couples second node N2.The second control terminal of the first transistor T1 is to receive First control signal VC1.The first transistor T1 is according to the voltage level of second node N2 and the voltage electricity of first control signal VC1 It is flat to selectively turn on.In one embodiment, the first transistor T1 is, for example, double gate transistor (dual gate Transistor) or multi-gated transistor, first voltage V1 are, for example, the opposing high voltage potentials level in system, but not as Limit.
The first end of second transistor T2 is to receive data-signal Vdata.The second end coupling the of second transistor T2 Two node N2.The control terminal of second transistor T2 is to receive second control signal VC2.In this embodiment, first capacitor C1 Both ends be respectively coupled to first node N1 and second node N2.Second transistor T2 is, for example, thin film transistor (TFT) (thin film Transistor, TFT), but not limited to this.In this embodiment, second transistor T2 is the thin film transistor (TFT) of n-type doping, But in other embodiments, in the case where cooperation adjusts the relative level height of other signals, second transistor T2 can also For the thin film transistor (TFT) of p-type doping.
Writing unit 12 couples first node N1.Writing unit 12 is to according to the first reference voltage Vref 1 adjustment first The voltage level of node N1.In this embodiment, writing unit 12 is, for example, one second capacitor C2, one end coupling of the second capacitor C2 First node N1 is met, the other end of the second capacitor C2 is to receive the first reference voltage Vref 1.In other embodiments, write Enter the interlock circuit that unit 12 can be the element other than capacitor or be formed with multiple element, without being limited with the example lifted System.
One end of light-emitting diode D couples first node N1, and the other end couples second voltage V2.Light emitting diode member Part D is, for example, Organic Light Emitting Diode (organic light emitting diode, OLED) element, and but not limited to this. Second voltage V2 is, for example, the relative low voltage level in system, and but not limited to this.
Please with reference to Fig. 2 with the flowing mode of making of pixels illustrated circuit 1, Fig. 2 is according to the pixel circuit of Fig. 1 of the present invention institute The time diagram for the coherent signal being painted.Definition has pre-charging stage P1, compensated stage P2, write-in rank in time diagram Section P3 and light emitting phase P4.Wherein, pre-charging stage P1 writes prior to compensated stage P2, compensated stage P2 prior to write phase P3 Enter stage P3 prior to light emitting phase P4.
In pre-charging stage P1, first control signal VC1 is opposite high-voltage level, and second control signal VC2 is Opposite high-voltage level, the first reference voltage Vref 1 are opposite high-voltage level, the voltage level of data-signal Vdata For an offset voltage value Vofs.At this point, the first transistor T1 can be conducting or be not turned on, second transistor T2 conducting.First The voltage level VN1 of node N1 can be expressed such as formula (1):
VN1=Vofs formula (1)
In compensated stage P2, first control signal VC1 is opposite high-voltage level, and second control signal VC2 is phase Pair high-voltage level, the first reference voltage Vref 1 be opposite low voltage level, data-signal Vdata have offset voltage Value Vofs.At this point, the first transistor T1 is connected, and second transistor T2 is connected.The voltage level of first node N1 and the second section The voltage level of point N2 can be expressed such as formula (2) and formula (3).Wherein, the Vth1 in formula (3) is the conducting threshold of the first transistor T1 Voltage.At this point, the first reference voltage Vref 1 is that opposite low voltage level is written into the voltage level for ensuring second node N2 Desired voltage level.
VN1=Vofs formula (2)
VN2=Vofs-Vth1 formula (3)
In write phase P3, first control signal VC1 is opposite low voltage level, and second control signal VC2 is phase Pair high-voltage level, the first reference voltage Vref 1 be opposite low voltage level, data-signal Vdata have signal voltage Value Vsig.At this point, the first transistor T1 is not turned on, second transistor T2 conducting.The voltage level of first node N1 and the second section The voltage level of point N2 can be expressed such as formula (4) and formula (5).Wherein, a in formula (5) is first capacitor C1 and the second capacitor C2 shape At dividing ratios.If briefly representing the capacitance of first capacitor C1 with label C1, and the second capacitor C2 is represented with label C2 Capacitance, dividing ratios a can express such as formula (6).At this point, the signal voltage value Vsig of data-signal Vdata is written into first Node N1, and the signal voltage value Vsig of data-signal Vdata is via the capacitance coupling effect and first capacitor of first capacitor C1 The partial pressure of C1 and the second capacitor C2 further influences the voltage level of second node N2.In this embodiment, signal voltage value Vsig is higher than offset voltage value Vofs, but in practice, offset voltage value Vofs can also be higher than signal voltage value Vsig and not With for embodiment be limitation.
VN1=Vsig formula (4)
VN2=Vofs-Vth1+a (Vsig-Vofs) formula (5)
In light emitting phase P4, first control signal VC1 is opposite high-voltage level, and second control signal VC2 is phase Pair low voltage level, the first reference voltage Vref 1 be opposite high-voltage level, data-signal Vdata have offset voltage Value Vofs.At this point, the first transistor T1 is connected, second transistor T2 is not turned on.The voltage of first node N1 and second node N2 Level can be expressed such as formula (7) and formula (8).Wherein, the conducting voltage that the Vd in formula (7) and formula (8) is light-emitting diode D. At this point, light-emitting diode D is switched on, and light-emitting diode D is according to ID pairs of electric current provided by the first transistor T1 It shines with answering.Electric current ID can be expressed such as formula (9-1).The parameter k of electric current ID can then be expressed such as formula (9-2).Wherein in formula (9-2) μnFor carrier transport factor (carrier mobility), COXFor the specific capacitance size of grid oxic horizon,For MOS field Imitate the grid width of transistor and the ratio of grid length.
VN1=Vth+ (1-a) (Vsig-Vofs)+V2+Vd formula (7)
VN2=V2+Vd formula (8)
ID=k [(1-a) (Vsig-Vofs)]2Formula (9-1)
Via the first control terminal and the second control terminal of the first transistor T1, it is able to carry out the first transistor T1 more multiple Miscellaneous timing control.Therefore, in this embodiment, it is able to reduce the transistor in pixel circuit 1 to only the first transistor T1 and second transistor T2, and form quite brief two capacitor of two transistor (2transistor 2capacitor, 2T2C) Structure, to reduce area occupied by pixel circuit 1.On the other hand, in the case where suitably adjusting each control signal, The stabilization that the electric current that the more general thin film transistor (TFT) of electric current ID can be provided provided by the first transistor T1 comes, is accordingly promoted The stable luminescence degree of light-emitting diode D.
Referring to figure 3., Fig. 3 is the circuit diagram of the pixel circuit according to depicted in another embodiment of the present invention.It compares In embodiment shown in FIG. 1, the pixel circuit 1 ' of Fig. 3 is with more third transistor T3 ' and the 4th transistor T4 '.In addition, scheming In embodiment shown in 3, the writing unit 12 ' of pixel circuit 1 ' is the 5th transistor T5 '.
In more detail, the first end of third transistor T3 ' couples second node N2 '.The second end of third transistor T3 ' Couple third node N3 '.The control terminal of third transistor T3 ' is to receive third control signal VC3 '.The two of first capacitor C1 ' End is respectively coupled to first node N1 ' and third node N3 '.The first end of 4th transistor T4 ' couples third node N3 '.4th The second end of transistor T4 ' is to receive the second reference voltage Vref 2 '.The control terminal of 4th transistor T4 ' is to receive second Control signal VC2 '.The first end of 5th transistor T5 ' couples first node N1 '.The second end of 5th transistor T5 ' is to connect Receive the first reference voltage Vref 1 '.The control terminal of 5th transistor T5 ' is to receive the 4th control signal VC4 '.Third transistor T3 ', the 4th transistor T4 ' and the 5th transistor T5 ' are, for example, thin film transistor (TFT), but are not limited thereto.Third transistor T3 ', the 4th transistor T4 ' and the 5th transistor T5 ' are the thin film transistor (TFT) of n-type doping, but in other embodiments, are being matched In the case where closing the relative level for adjusting other signals, third transistor T3 ', the 4th transistor T4 ' and the 5th transistor T5 ' It can be the thin film transistor (TFT) of p-type doping.
Since the circuit framework of embodiment shown in Fig. 4 and embodiment shown in Fig. 3 are different, in the control of signal It is also different in timing processed.Referring to figure 4. with the actuation timing of pixels illustrated circuit 1 ', Fig. 4 is the picture according to Fig. 3 of the present invention The time diagram of coherent signal depicted in plain circuit.Pre-charging stage P1 ', compensated stage P2 ' and hair have been painted in Fig. 4 Photophase P3 '.Wherein, pre-charging stage P1 ' is prior to compensated stage P2 ', and compensated stage P2 ' is prior to light emitting phase P3 '.
In pre-charging stage P1 ', first control signal VC1 ' and third control signal VC3 ' are opposite low-voltage electricity Flat, second control signal VC2 ' and the 4th control signal VC4 ' is opposite high-voltage level, second transistor T2 ', the 4th crystalline substance Body pipe T4 ' and the 5th transistor T5 ' is switched on, and the first transistor T1 ' is not turned on third transistor T3 '.First node N1's ' Voltage level, the voltage level of second node N2 ' and the voltage level of third node N3 ' can express as formula (10), formula (11) with Formula (12).Wherein, VN1' is the voltage level of first node N1 ', and VN2' is the voltage level of second node N2 ', VN3' the The voltage level of three node N3 '.
VN1'=Vdata formula (10)
VN2'=Vref1' formula (11)
VN3'=Vref2' formula (12)
In compensated stage P2 ', third control signal with the 4th control signal be low voltage level, first control signal and Second control signal is high-voltage level.The first transistor T1 ', second transistor T2 ' and the 4th transistor T4 ' are switched on, the Three transistor T3 ' and the 5th transistor T5 ' is not turned on.The voltage level of the voltage level of first node N1 ', second node N2 ' It can express with the voltage level of third node N3 ' such as formula (13), formula (14) and formula (15).Wherein, Vth' is the first transistor T1 ' Conducting threshold voltage.
VN1'=Vdata' formula (13)
VN2'=Vdata'-Vth' formula (14)
VN3'=Vref2' formula (15)
In light emitting phase P3 ', second control signal VC2 ' and the 4th control signal VC4 ' is low voltage level, the first control Signal VC1 ' processed and third control signal VC3 ' is high-voltage level.The first transistor T1 ' and third transistor T3 ' is switched on, Second transistor T2 ', the 4th transistor T4 ' and the 5th transistor T5 ' are not turned on.The voltage level of first node N1 ' and second The voltage level of node N2 ' can be expressed such as formula (16) and formula (17).At this point, light-emitting diode D ' is according to the first transistor The electric current ID ' that T1 ' is provided accordingly shines.Wherein, electric current ID ' can be expressed such as formula (18-1).The parameter beta of electric current ID ' then can table Up to such as formula (18-2).Wherein, in formula (18-2), μnFor carrier transport factor (carriermobility), COXFor grid oxic horizon Specific capacitance size,For the grid width of metal-oxide half field effect transistor and the ratio of grid length.
VN1'=Vref2'-Vdata'+Vth'+V2'+Vd' formula (16)
VN2'=V2'+Vd' formula (17)
In summary, the first transistor in pixel circuit has first the present invention provides a kind of pixel circuit Control terminal and the second control terminal, the first transistor are controlled by the voltage electricity of second node via the first control terminal and the second control terminal Flat and first control signal.The circuit structure formed by the first transistor and other elements, pixel circuit can be with less Element realizes complicated timing control, and the output electric current of the first transistor is less susceptible to the influence by noise.To subtract In the case where few parts number, the two-body element that shines properly is driven to shine or compensate the light emission luminance of light-emitting diode, Reduce the entire area of pixel unit.
Although the present invention is disclosed as above with embodiment above-mentioned, however, it is not to limit the invention.This hair is not being departed from In bright spirit and scope, carried out by variation and retouching, belong to claims of the invention.About institute circle of the present invention Fixed protection scope please refers to the attached claims.

Claims (11)

1. a kind of pixel circuit, comprising:
One the first transistor, a first end of the first transistor is to receive a first voltage, and the one of the first transistor Two ends couple a first node, and the first control terminal of the first transistor couples a second node, and the one the of the first transistor Two control terminals are to receive a first control signal, voltage level and first control of the first transistor according to the second node The voltage level of signal processed selectively turns on;
One second transistor, the first end of the second transistor is to receive a data-signal, the second end of the second transistor The second node is coupled, the control terminal of the second transistor is to receive a second control signal;
One first capacitor, the both ends of the first capacitor are respectively coupled to the first node and the second node;
One writing unit, the writing unit couple the first node, and the writing unit according to one first reference voltage to adjust The voltage level of the first node;And
One light-emitting diode, one end of the light-emitting diode couple the first node, one second electricity of other end coupling Pressure.
2. pixel circuit as described in claim 1, wherein the writing unit is one second capacitor, one end coupling of second capacitor The first node is connect, the other end of second capacitor is to receive first reference voltage.
3. pixel circuit as claimed in claim 2, wherein in a pre-charging stage, the first control signal, second control Signal and first reference voltage are high-voltage level, and the voltage level of the data-signal is an offset voltage value, second crystalline substance Body pipe is switched on.
4. pixel circuit as claimed in claim 3, wherein in a compensated stage after the pre-charging stage, first control Signal and the second control signal are high-voltage level, which is low voltage level, the voltage of the data-signal Level is the offset voltage value, and the first transistor and the second transistor are switched on.
5. pixel circuit as claimed in claim 4, wherein in a write phase after the compensated stage, the second control letter It number is high-voltage level, the first control signal and first reference voltage are low voltage level, the voltage electricity of the data-signal It puts down as a signal voltage value, which is not turned on, which is switched on.
6. pixel circuit as claimed in claim 5, wherein the signal voltage value is higher than the offset voltage value.
7. pixel circuit as claimed in claim 5, wherein in a light emitting phase after the write phase, the first control letter Number with first reference voltage be high-voltage level, the second control signal be low voltage level, the first transistor be switched on, The second transistor is not turned on.
8. a kind of pixel circuit, comprising:
One the first transistor, a first end of the first transistor is to receive a first voltage, and the one of the first transistor Two ends couple a first node, and the first control terminal of the first transistor couples a second node, and the one the of the first transistor Two control terminals are to receive a first control signal, voltage level and first control of the first transistor according to the second node The voltage level of signal processed selectively turns on;
One second transistor, the first end of the second transistor is to receive a data-signal, the second end of the second transistor The second node is coupled, the control terminal of the second transistor is to receive a second control signal;
One writing unit, the writing unit couple the first node, and the writing unit according to one first reference voltage to adjust The voltage level of the first node;And
One light-emitting diode, one end of the light-emitting diode couple the first node, one second electricity of other end coupling Pressure,
The pixel circuit further include:
One third transistor, the first end of the third transistor couple the second node, the second end coupling of the third transistor One third node, the control terminal of the third transistor is to receive third control signal;
One first capacitor, the both ends of the first capacitor are respectively coupled to the first node and the third node;And
One the 4th transistor, the first end of the 4th transistor couple the third node, the second end of the 4th transistor to One second reference voltage is received, the control terminal of the 4th transistor is to receive the second control signal;
Wherein, which is one the 5th transistor, and the first end of the 5th transistor couples the first node, and the 5th is brilliant The second end of body pipe is to receive first reference voltage, and the control terminal of the 5th transistor is to receive one the 4th control letter Number.
9. pixel circuit as claimed in claim 8, wherein the first control signal and the third control in a pre-charging stage Signal is low voltage level, and the second control signal and the 4th control signal are high-voltage level, the second transistor, this Four transistors and the 5th transistor are switched on, which is not turned on the third transistor.
10. pixel circuit as claimed in claim 9, wherein in a compensated stage after the pre-charging stage, the third control Signal processed is low voltage level with the 4th control signal, and the first control signal and the second control signal are high voltage electricity Flat, the first transistor, the second transistor and the 4th transistor are switched on, and the third transistor and the 5th transistor are not Conducting.
11. pixel circuit as claimed in claim 10, wherein in a light emitting phase after the compensated stage, second control Signal is low voltage level with the 4th control signal, and the first control signal and third control signal are high-voltage level, The first transistor and the third transistor are switched on, and the second transistor, the 4th transistor and the 5th transistor are not led It is logical.
CN201610754255.6A 2016-07-01 2016-08-29 Pixel circuit Active CN106157886B (en)

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TW105121049 2016-07-01

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