CN106132078A - Multiple-printed-panel for circuit board and the method manufacturing multiple-printed-panel for circuit board - Google Patents
Multiple-printed-panel for circuit board and the method manufacturing multiple-printed-panel for circuit board Download PDFInfo
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- CN106132078A CN106132078A CN201610726570.8A CN201610726570A CN106132078A CN 106132078 A CN106132078 A CN 106132078A CN 201610726570 A CN201610726570 A CN 201610726570A CN 106132078 A CN106132078 A CN 106132078A
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- Prior art keywords
- circuit board
- reference identification
- veneer
- printed
- panel
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0266—Marks, test patterns or identification means
- H05K1/0269—Marks, test patterns or identification means for visual or optical inspection
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/36—Assembling printed circuits with other printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09918—Optically detected marks used for aligning tool relative to the PCB, e.g. for mounting of components
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Supply And Installment Of Electrical Components (AREA)
Abstract
A kind of multiple-printed-panel for circuit board of disclosure of the invention and the method manufacturing multiple-printed-panel for circuit board, the method comprise the steps that the multiple-printed-panel for circuit board main body including multiple circuit board veneer；With the tag slot being arranged in described multiple-printed-panel for circuit board main body, described tag slot includes the multiple reference identification for positioning the plurality of circuit board veneer.The present invention makes to establish corresponding relation between multiple reference identification and the circuit board veneer arranged by the way of arranging tag slot on multiple-printed-panel for circuit board and being provided for positioning multiple reference identification of multiple circuit board veneer on tag slot.Before SMT processes can by centralized detecting tag slot in set by reference identification realize the purpose of the circuit board veneer scrapped present in locating circuit board jigsaw, shorten whether testing circuit plate jigsaw exists and scrap the time that circuit board veneer is consumed, thus improve the SMT working (machining) efficiency to multiple-printed-panel for circuit board on the whole.
Description
Technical field
The present invention relates to electronic technology field, particularly to a kind of multiple-printed-panel for circuit board and the method for manufacture multiple-printed-panel for circuit board.
Background technology
PCB is in board making process, and in order to technique is simple, economizing in raw materials all can use jigsaw form (multiple PCB are mono-
Plate is integrated on one piece of PCB jigsaw).Man-hour is added carrying out SMT (Surface Mount Technology, surface mounting technology)
Directly whole PCB jigsaw is processed.But, in carrying out PCB jigsaw production process, whole PCB jigsaw there may be
Waste product.Add have no man-hour to select all veneers in PCB jigsaw are all processed if carried out SMT, be then attached to scrap
Components and parts on veneer will result in waste, also result in the waste of process time simultaneously.
In prior art, when PCB producer finds, during producing PCB jigsaw, the PCB single board scrapped, this is scrapped
PCB single board blacking or report abandoned tender to know at the edge of the PCB single board scrapped, then shipment is to SMT factory, and SMT factory is raw
Skip during product and labeled scrap PCB single board.
But, inventor finds during realizing the present invention, and SMT factory needs before being processed PCB jigsaw
(this is accomplished by being completed institute by SMT equipment camera loopy moving in the range of PCB jigsaw to travel through whole PCB jigsaw
Have the detection of veneer), to position the PCB single board scrapped present in whole PCB jigsaw.But, prior art often detects one
The time that block veneer needs is at least 1 second, plus controlling the time that SMT equipment camera moves, will seriously reduce SMT processing
Efficiency, reduce production capacity.
Summary of the invention
Embodiments of the invention provide a kind of multiple-printed-panel for circuit board and the method manufacturing multiple-printed-panel for circuit board, at least solving
One of above-mentioned technical problem.
On the one hand, the present invention provides a kind of multiple-printed-panel for circuit board, comprising:
Multiple-printed-panel for circuit board main body including multiple circuit board veneers；With
It is arranged on the tag slot in described multiple-printed-panel for circuit board main body, described tag slot includes for positioning the plurality of electricity
Multiple reference identification of road plate veneer.
On the other hand, the present invention provides a kind of method manufacturing multiple-printed-panel for circuit board, including:
Generate the multiple-printed-panel for circuit board main body including multiple circuit board veneer；
Described multiple-printed-panel for circuit board main body arranges tag slot；
Described tag slot is provided for positioning multiple reference identification of the plurality of circuit board veneer.
The method of multiple-printed-panel for circuit board of the present invention and manufacture multiple-printed-panel for circuit board is by arranging tag slot also on multiple-printed-panel for circuit board
The mode being provided for positioning multiple reference identification of multiple circuit board veneer on tag slot makes the multiple references arranged mark
Know and establish corresponding relation between circuit board veneer.Therefore, it can the reference identification by the present embodiment identify institute right
The circuit board veneer scrapped answered.Can be real by reference identification set in centralized detecting tag slot before SMT processes
Whether the purpose of the circuit board veneer scrapped present in existing locating circuit board jigsaw, shorten in testing circuit plate jigsaw and exist
Scrap the time that circuit board veneer is consumed, thus improve the SMT working (machining) efficiency to multiple-printed-panel for circuit board on the whole, improve product
Energy.
Accompanying drawing explanation
In order to be illustrated more clearly that the technical scheme of the embodiment of the present invention, required use in embodiment being described below
Accompanying drawing be briefly described, it should be apparent that, below describe in accompanying drawing be some embodiments of the present invention, for ability
From the point of view of the those of ordinary skill of territory, on the premise of not paying creative work, it is also possible to obtain the attached of other according to these accompanying drawings
Figure.
Fig. 1 is the structural representation of multiple-printed-panel for circuit board one embodiment of the present invention；
Fig. 2 is the structural representation of another embodiment of multiple-printed-panel for circuit board of the present invention；
Fig. 3 is the structural representation of the another embodiment of multiple-printed-panel for circuit board of the present invention；
Fig. 4 is the structural representation of the multiple-printed-panel for circuit board another embodiment of the present invention.
Specific embodiment
For making the purpose of the embodiment of the present invention, technical scheme and advantage clearer, below in conjunction with the embodiment of the present invention
In accompanying drawing, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is
The a part of embodiment of the present invention rather than whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art
The every other embodiment obtained under not making creative work premise, broadly falls into the scope of protection of the invention.
It should be noted that in the case of not conflicting, the embodiment in the application and the feature in embodiment can phases
Combination mutually.
Finally, in addition it is also necessary to explanation, in this article, the relational terms of such as first and second or the like be used merely to by
One entity or operation separate with another entity or operating space, and not necessarily require or imply these entities or operation
Between exist any this reality relation or order.And, term " includes ", " comprising ", not only includes those key elements, and
And also include other key elements being not expressly set out, or also include intrinsic for this process, method, article or equipment
Key element.In the case of there is no more restriction, statement " including ... " key element limited, it is not excluded that including described wanting
Process, method, article or the equipment of element there is also other identical element.
In some embodiments of the invention, multiple-printed-panel for circuit board includes:
Multiple-printed-panel for circuit board main body including multiple circuit board veneers；With
It is arranged on the tag slot in described multiple-printed-panel for circuit board main body, described tag slot includes for positioning the plurality of electricity
Multiple reference identification of road plate veneer.
The present embodiment is by arranging tag slot and being provided for positioning multiple circuit on tag slot on multiple-printed-panel for circuit board
The mode of multiple reference identification of plate veneer make arrange multiple reference identification and circuit board veneer between establish corresponding
Relation.Therefore, it can the reference identification by the present embodiment and identify the corresponding circuit board veneer scrapped.Process at SMT
Can realize scrapping present in locating circuit board jigsaw by reference identification set in centralized detecting tag slot before
Whether the purpose of circuit board veneer, shorten to exist in testing circuit plate jigsaw and scrap the time that circuit board veneer is consumed, from
And improve the SMT working (machining) efficiency to multiple-printed-panel for circuit board on the whole, improve production capacity.
As it is shown in figure 1, in certain embodiments, multiple-printed-panel for circuit board includes:
Multiple-printed-panel for circuit board main body 12 including multiple circuit board veneers 11；With
It is arranged on the tag slot 13 in described multiple-printed-panel for circuit board main body, described tag slot includes for positioning the plurality of
Multiple reference identification 14 of circuit board veneer；Wherein, the plurality of reference identification 14 is with the plurality of circuit board veneer 11 one by one
Correspondence, for indicating the upstate of corresponding circuit board veneer.Each reference identification 14 is for judging corresponding electricity
Road plate veneer 11 is the most qualified.
The present embodiment gives the example of the multiple-printed-panel for circuit board including 4 circuit board veneers 11, but is not limited to this.
The multiple-printed-panel for circuit board of the present embodiment can be the multiple-printed-panel for circuit board of arbitrary n × m matrix, and wherein n and m is value and is more than or equal to
The numerical value of 1.The present embodiment is connected with each other by dowel 15 between circuit board veneer 11, and multiple-printed-panel for circuit board includes use
In the frame 16 of protection circuit plate veneer, certain multiple-printed-panel for circuit board can not also include frame.Tag slot in the present embodiment sets
Put on frame.When multiple-printed-panel for circuit board does not includes frame, tag slot can be to be connected with circuit board veneer by dowel
The region as tag slot connect.The present embodiment gives and 4 circuit board veneers, 4 reference identification one to one, and 4
The arrangement mode of the arrangement mode of individual reference identification and 4 circuit board veneers is consistent (being all the matrix of 2 × 2), and square
In Zhen, the reference identification of relevant position is corresponding with circuit board veneer.Certainly, 4 reference identification can also is that with 2 × 2 rectangulars
Formula arbitrary form unexpectedly arranges, if the corresponding relation guaranteed between reference identification and circuit board veneer.
During the multiple-printed-panel for circuit board produced, when determining that some circuit board veneer has been scrapped, then will be corresponding
It is labeled as being different from reference identification corresponding to other qualified circuit board veneer in this reference identification scrapping circuit board veneer
Color and/or pattern and/or shape, for showing that its corresponding circuit board veneer is defective.
Had only to detect whether tag slot exists before the multiple-printed-panel for circuit board of the present embodiment is carried out SMT processing marked
Whether the reference marker of note is assured that in multiple-printed-panel for circuit board to exist scraps veneer, is if it is carrying out multiple-printed-panel for circuit board
The SMT course of processing is directly skipped and corresponding to labeled reference marker, scraps veneer.Thus, the circuit board of the present embodiment is spelled
Plate can be clear and definite demonstrate whether jigsaw exists underproof veneer, defective if there is then orienting accurately
Veneer.
As in figure 2 it is shown, in certain embodiments, multiple-printed-panel for circuit board includes:
Multiple-printed-panel for circuit board main body 12 including multiple circuit board veneers 11；With
It is arranged on the tag slot 13 in described multiple-printed-panel for circuit board main body 12, described tag slot includes for positioning described many
Multiple reference identification of individual circuit board veneer 11；
The plurality of reference identification includes a main reference identification 21 and many sub-reference identification 14；Wherein, the plurality of
Sub-reference identification 14 and the plurality of circuit board veneer 11 one_to_one corresponding, for indicating the available shape of corresponding circuit board veneer
State.
A main reference identification 21 that the present embodiment is many compared to the embodiment shown in Fig. 1.Main reference identification 21 can be used
In showing in multiple-printed-panel for circuit board whether there is defective veneer.Therefore, the multiple-printed-panel for circuit board of the present embodiment is being carried out SMT processing
Detection main reference identification can be first passed through during detection tag slot do not conform to determine whether whole multiple-printed-panel for circuit board exists before
Lattice veneer (that is, it is determined whether needing remaining sub-reference identification is detected).If main reference identification shows that circuit board is spelled
Plate exists defective veneer, is then positioning defective veneer by the sub-reference identification of detection.If main reference identification shows
Multiple-printed-panel for circuit board does not exist defective veneer, then can save and all sub-reference identification are carried out the time overhead that detection judges.
Therefore, the multiple-printed-panel for circuit board of the present embodiment eliminates unnecessary time overhead, improves the efficiency of SMT processing, thus enters one
Step improves production capacity.
As it is shown on figure 3, in certain embodiments, multiple circuit board veneers are arranged in arrays；The plurality of reference identification is also
Including multiple reference identification 31；
Line number that the number of the plurality of reference identification 31 is arranged in arrays with the plurality of circuit board veneer 11 and/or
Columns is equal.
In the present embodiment, when the line number that the number of multiple reference identification 31 is arranged in arrays with circuit board veneer 11
Time, each time reference identification 31 is corresponding to a line circuit board veneer 11, and each reference identification 31 is used for judging corresponding
A line circuit board veneer 11 in whether there is underproof veneer.Number and circuit board veneer when multiple reference identification 31
During 11 columns arranged in arrays, each reference identification 31 is corresponding to string circuit board veneer 11, and each time is with reference to mark
Know 31 for judging whether corresponding string circuit board veneer 11 exists underproof veneer.Therefore, to the present embodiment
Multiple-printed-panel for circuit board carry out SMT processing before scrap plate detection time, when being determined in whole multiple-printed-panel for circuit board by main reference identification
When there is defective veneer, can by multiple the reference identification 31 being arranged on tag slot, defective veneer be navigated to further
In concrete row or row, then in many sub-reference identification from the row determined or row, orient defective veneer.This
The multiple-printed-panel for circuit board of embodiment avoids and travels through to position the time that defective veneer is caused to all sub-reference identification
The waste of cost.Such as, for the multiple-printed-panel for circuit board of 10 × 10 matrixes, save the time cost of nearly 90%.
As shown in Figure 4, in certain embodiments, multiple-printed-panel for circuit board includes:
Multiple-printed-panel for circuit board main body 12 including multiple circuit board veneers 11；With
It is arranged on the tag slot 13 in described multiple-printed-panel for circuit board main body, described tag slot includes for positioning the plurality of
Multiple reference identification of circuit board veneer.
Wherein, multiple circuit board veneers are arranged in arrays；The plurality of reference identification includes:
One main reference identification 21, multiple first sub-reference identification 41 and multiple second sub-reference identification 42；Wherein,
The line number that the quantity of the plurality of first sub-reference identification 41 is arranged in arrays with multiple circuit board veneers is equal, institute
State the row one_to_one corresponding that multiple first sub-reference identification 41 is arranged in arrays with the plurality of circuit board veneer；
The columns that the quantity of the plurality of second sub-reference identification 42 is arranged in arrays with multiple circuit board veneers is equal, institute
State the row one_to_one corresponding that multiple second sub-reference identification 42 is arranged in arrays with the plurality of circuit board veneer；
The plurality of first sub-reference identification 41 and the plurality of second sub-reference identification 42 are described many for common location
Individual circuit board veneer, for the upstate of the circuit board veneer that instruction is positioned.
In the present embodiment, whether main reference identification exists underproof veneer in decision circuitry plate jigsaw.Each
Individual first sub-reference identification 41 is for judging whether there is defective veneer in corresponding a line circuit board veneer 11.Each
Second sub-reference identification 42 is for judging whether there is defective veneer in corresponding string circuit board veneer 11.
The multiple-printed-panel for circuit board of the present embodiment is real by multiple first sub-reference identification 41 and multiple second sub-reference identification 42
The location to all of circuit board veneer 11 included in multiple-printed-panel for circuit board and mark are showed.In the present embodiment arranged in arrays
Multiple circuit board veneers 11 in each circuit board veneer 11 coordinate in a matrix be well-determined, therefore, pass through
Multiple first sub-reference identification 41 and multiple second sub-reference identification 42 achieve the location of all circuit board veneers.And need not be
Each circuit board veneer one reference identification of configuration.Therefore, the present embodiment achieves circuit board with less reference identification
The location of all of circuit board veneer 11 in jigsaw, saves and arranges the one-tenth that the reference identification of too much redundancy is brought in tag slot
(line number of matrix is the biggest with the value of columns, and this beneficial effect is the most notable for this expense.Such as, for 10 × 10 matrixes, this reality
Execute example to have only to arrange 20 (10 the first sub-reference identification and 10 the second sub-reference identification) for locating circuit board veneer
The reference identification of 11, saves 80 reference identification relative to arranging a reference identification for each circuit board veneer).
In above-described embodiment of the multiple-printed-panel for circuit board of the present invention, reference identification is circle, triangle, rectangle, rhombus, side
Shape or polygon.
In above-described embodiment of the multiple-printed-panel for circuit board of the present invention, reference identification have predetermined color and/or pattern and/
Or shape.
On the other hand, the present invention provides a kind of method manufacturing multiple-printed-panel for circuit board, including:
Generate the multiple-printed-panel for circuit board main body including multiple circuit board veneer；
Described multiple-printed-panel for circuit board main body arranges tag slot；
Described tag slot is provided for positioning multiple reference identification of the plurality of circuit board veneer.
The method manufacturing multiple-printed-panel for circuit board of the present embodiment is by arranging tag slot and in tag slot on multiple-printed-panel for circuit board
On be provided for positioning multiple reference identification and the circuit that the mode of multiple reference identification of multiple circuit board veneer makes to arrange
Corresponding relation is established between plate veneer.Therefore, it can the reference identification by the present embodiment and identify corresponding scrapping
Circuit board veneer.Location electricity can be realized by reference identification set in centralized detecting tag slot before SMT processes
Whether the purpose of the circuit board veneer scrapped present in the plate jigsaw of road, shorten to exist in testing circuit plate jigsaw and scrap circuit
The time that plate veneer is consumed, thus improve the SMT working (machining) efficiency to multiple-printed-panel for circuit board on the whole, improve production capacity.
In the embodiment of some methods manufacturing multiple-printed-panel for circuit board, multiple reference identification and the plurality of circuit board veneer
One_to_one corresponding, for indicating the upstate of corresponding circuit board veneer.
In the embodiment of some methods manufacturing multiple-printed-panel for circuit board, multiple reference identification include: a main reference identification
With many sub-reference identification；
The plurality of sub-reference identification and the plurality of circuit board veneer one_to_one corresponding, for indicating corresponding circuit board
The upstate of veneer.
In the embodiment of some methods manufacturing multiple-printed-panel for circuit board, multiple circuit board veneers are arranged in arrays；Described many
Individual reference identification also includes multiple reference identification；
Line number that the number of the plurality of reference identification is arranged in arrays with the plurality of circuit board veneer and/or columns
Equal.
In the embodiment of some methods manufacturing multiple-printed-panel for circuit board, many sub-reference identification are arranged in and the plurality of electricity
The matrix that the matrix of road plate veneer arrangement is identical.
In the embodiment of some methods manufacturing multiple-printed-panel for circuit board, multiple circuit board veneers are arranged in arrays；Described many
Individual reference identification includes:
One main reference identification, multiple first sub-reference identification and multiple second sub-reference identification；Wherein,
The line number that the quantity of the plurality of first sub-reference identification is arranged in arrays with multiple circuit board veneers is equal, described
The row one_to_one corresponding that multiple first sub-reference identification are arranged in arrays with the plurality of circuit board veneer；
The columns that the quantity of the plurality of second sub-reference identification is arranged in arrays with multiple circuit board veneers is equal, described
The row one_to_one corresponding that multiple second sub-reference identification are arranged in arrays with the plurality of circuit board veneer；
The plurality of first sub-reference identification and the plurality of second sub-reference identification position the plurality of electricity for common
Road plate veneer, for the upstate of the circuit board veneer that instruction is positioned.
Some manufacture multiple-printed-panel for circuit boards methods embodiment in, reference identification be circle, triangle, rectangle, rhombus,
Square or polygon.
In the embodiment of some methods manufacturing multiple-printed-panel for circuit board, reference identification has predetermined color and/or pattern
And/or shape.
It should be noted that for aforesaid each method embodiment, in order to be briefly described, therefore it is all expressed as a series of
Action merge, but those skilled in the art should know, the disclosure is not limited by described sequence of movement because
According to the disclosure, some step can use other orders or carry out simultaneously.Secondly, those skilled in the art also should know
Knowing, embodiment described in this description belongs to preferred embodiment, involved action and the module not necessarily disclosure
Necessary.
Last it is noted that above example is only in order to illustrate technical scheme, it is not intended to limit；Although
With reference to previous embodiment, the present invention is described in detail, it will be understood by those within the art that: it still may be used
So that the technical scheme described in foregoing embodiments to be modified, or wherein portion of techniques feature is carried out equivalent；
And these amendment or replace, do not make appropriate technical solution essence depart from various embodiments of the present invention technical scheme spirit and
Scope.
Claims (16)
1. a multiple-printed-panel for circuit board, including:
Multiple-printed-panel for circuit board main body including multiple circuit board veneers；With
It is arranged on the tag slot in described multiple-printed-panel for circuit board main body, described tag slot includes for positioning the plurality of circuit board
Multiple reference identification of veneer.
Multiple-printed-panel for circuit board the most according to claim 1, wherein, the plurality of reference identification and the plurality of circuit board veneer
One_to_one corresponding, for indicating the upstate of corresponding circuit board veneer.
Multiple-printed-panel for circuit board the most according to claim 1, wherein, the plurality of reference identification includes: a main reference identification
With many sub-reference identification；
The plurality of sub-reference identification and the plurality of circuit board veneer one_to_one corresponding, for indicating corresponding circuit board veneer
Upstate.
Multiple-printed-panel for circuit board the most according to claim 3, wherein, the plurality of circuit board veneer is arranged in arrays；Described many
Individual reference identification also includes multiple reference identification；
Line number that the number of the plurality of reference identification is arranged in arrays with the plurality of circuit board veneer and/or columns phase
Deng.
Multiple-printed-panel for circuit board the most according to claim 4, wherein, the plurality of sub-reference identification is arranged in and the plurality of electricity
The matrix that the matrix of road plate veneer arrangement is identical.
Multiple-printed-panel for circuit board the most according to claim 1, wherein, the plurality of circuit board veneer is arranged in arrays；Described many
Individual reference identification includes:
One main reference identification, multiple first sub-reference identification and multiple second sub-reference identification；Wherein,
The line number that the quantity of the plurality of first sub-reference identification is arranged in arrays with multiple circuit board veneers is equal, the plurality of
The row one_to_one corresponding that first sub-reference identification is arranged in arrays with the plurality of circuit board veneer；
The columns that the quantity of the plurality of second sub-reference identification is arranged in arrays with multiple circuit board veneers is equal, the plurality of
The row one_to_one corresponding that second sub-reference identification is arranged in arrays with the plurality of circuit board veneer；
The plurality of first sub-reference identification and the plurality of second sub-reference identification position the plurality of circuit board for common
Veneer, for the upstate of the circuit board veneer that instruction is positioned.
7. according to the multiple-printed-panel for circuit board described in any one of claim 1-6, wherein, described reference identification is circle, triangle, square
Shape, rhombus, square or polygon.
Multiple-printed-panel for circuit board the most according to claim 7, wherein, described reference identification has predetermined color and/or pattern
And/or shape.
9. the method manufacturing multiple-printed-panel for circuit board, including:
Generate the multiple-printed-panel for circuit board main body including multiple circuit board veneer；
Described multiple-printed-panel for circuit board main body arranges tag slot；
Described tag slot is provided for positioning multiple reference identification of the plurality of circuit board veneer.
Method the most according to claim 9, wherein, the plurality of reference identification is with the plurality of circuit board veneer one by one
Correspondence, for indicating the upstate of corresponding circuit board veneer.
11. methods according to claim 9, wherein, the plurality of reference identification includes: a main reference identification and multiple
Sub-reference identification；
The plurality of sub-reference identification and the plurality of circuit board veneer one_to_one corresponding, for indicating corresponding circuit board veneer
Upstate.
12. methods according to claim 11, wherein, the plurality of circuit board veneer is arranged in arrays；The plurality of ginseng
Examine mark and also include multiple reference identification；
Line number that the number of the plurality of reference identification is arranged in arrays with the plurality of circuit board veneer and/or columns phase
Deng.
13. methods according to claim 12, wherein, the plurality of sub-reference identification is arranged in and the plurality of circuit board
The identical matrix of matrix of veneer arrangement.
14. methods according to claim 9, wherein, the plurality of circuit board veneer is arranged in arrays；The plurality of reference
Mark includes:
One main reference identification, multiple first sub-reference identification and multiple second sub-reference identification；Wherein,
The line number that the quantity of the plurality of first sub-reference identification is arranged in arrays with multiple circuit board veneers is equal, the plurality of
The row one_to_one corresponding that first sub-reference identification is arranged in arrays with the plurality of circuit board veneer；
The columns that the quantity of the plurality of second sub-reference identification is arranged in arrays with multiple circuit board veneers is equal, the plurality of
The row one_to_one corresponding that second sub-reference identification is arranged in arrays with the plurality of circuit board veneer；
The plurality of first sub-reference identification and the plurality of second sub-reference identification position the plurality of circuit board for common
Veneer, for the upstate of the circuit board veneer that instruction is positioned.
15. according to the method described in claim 9-14, and wherein, described reference identification is circle, triangle, rectangle, rhombus, side
Shape or polygon.
16. methods according to claim 15, wherein, described reference identification have predetermined color and/or pattern and/or
Shape.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610726570.8A CN106132078A (en) | 2016-08-25 | 2016-08-25 | Multiple-printed-panel for circuit board and the method manufacturing multiple-printed-panel for circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610726570.8A CN106132078A (en) | 2016-08-25 | 2016-08-25 | Multiple-printed-panel for circuit board and the method manufacturing multiple-printed-panel for circuit board |
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| Publication Number | Publication Date |
|---|---|
| CN106132078A true CN106132078A (en) | 2016-11-16 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610726570.8A Pending CN106132078A (en) | 2016-08-25 | 2016-08-25 | Multiple-printed-panel for circuit board and the method manufacturing multiple-printed-panel for circuit board |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106535492A (en) * | 2016-11-17 | 2017-03-22 | 苏州河图电子科技有限公司 | SMT machine with fast identification of circuit board bad mark and identification method thereof |
| CN113361667A (en) * | 2020-03-04 | 2021-09-07 | 奥特斯科技(重庆)有限公司 | Component carrier inspection station for inspecting component carriers during their manufacture |
| CN113777113A (en) * | 2021-08-02 | 2021-12-10 | 景旺电子科技(珠海)有限公司 | Optical detection method of lamp panel and lamp panel manufacturing method |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030128531A1 (en) * | 2000-02-15 | 2003-07-10 | Portman Roland F. | Removable visual indication structure for a printed circuit board |
| JP2007214494A (en) * | 2006-02-13 | 2007-08-23 | Yamaha Motor Co Ltd | Mark recognition method and surface mounter |
| CN202143302U (en) * | 2011-07-13 | 2012-02-08 | 龚晓刚 | PCB jointed board |
| CN104411091A (en) * | 2014-10-27 | 2015-03-11 | 苏州河图电子科技有限公司 | Circuit board sign method based on bad mark two-dimensional codes |
| CN105873358A (en) * | 2016-05-31 | 2016-08-17 | 广东欧珀移动通信有限公司 | Circuit board jointed board |
-
2016
- 2016-08-25 CN CN201610726570.8A patent/CN106132078A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030128531A1 (en) * | 2000-02-15 | 2003-07-10 | Portman Roland F. | Removable visual indication structure for a printed circuit board |
| JP2007214494A (en) * | 2006-02-13 | 2007-08-23 | Yamaha Motor Co Ltd | Mark recognition method and surface mounter |
| CN202143302U (en) * | 2011-07-13 | 2012-02-08 | 龚晓刚 | PCB jointed board |
| CN104411091A (en) * | 2014-10-27 | 2015-03-11 | 苏州河图电子科技有限公司 | Circuit board sign method based on bad mark two-dimensional codes |
| CN105873358A (en) * | 2016-05-31 | 2016-08-17 | 广东欧珀移动通信有限公司 | Circuit board jointed board |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106535492A (en) * | 2016-11-17 | 2017-03-22 | 苏州河图电子科技有限公司 | SMT machine with fast identification of circuit board bad mark and identification method thereof |
| CN113361667A (en) * | 2020-03-04 | 2021-09-07 | 奥特斯科技(重庆)有限公司 | Component carrier inspection station for inspecting component carriers during their manufacture |
| CN113361667B (en) * | 2020-03-04 | 2024-02-27 | 奥特斯科技(重庆)有限公司 | Component carrier inspection station for inspecting component carriers during the manufacture thereof |
| CN113777113A (en) * | 2021-08-02 | 2021-12-10 | 景旺电子科技(珠海)有限公司 | Optical detection method of lamp panel and lamp panel manufacturing method |
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Application publication date: 20161116 |