CN106127280B - A kind of TPP decoding circuit based on UHF RFID chip - Google Patents
A kind of TPP decoding circuit based on UHF RFID chip Download PDFInfo
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- CN106127280B CN106127280B CN201610422498.XA CN201610422498A CN106127280B CN 106127280 B CN106127280 B CN 106127280B CN 201610422498 A CN201610422498 A CN 201610422498A CN 106127280 B CN106127280 B CN 106127280B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/0723—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
Abstract
The invention discloses a kind of TPP decoding circuits based on UHF RFID chip, including input sample module, two ripple counters, counter output selecting module and comparator.The present invention calculates the length of TPP coded identification using two ripple counters instead of traditional coincidence counter, is not only simple in structure, manufacturing cost is low, and greatly reduces the operation power consumption of circuit.In addition, ripple counter structure of the invention is simple, only it is made of several triggers, and the clock end of next stage trigger is the data output of upper level trigger, therefore, the overturning rate of next stage trigger is the half of upper level trigger, power consumption when operation is greatly reduced as a result,.
Description
Technical field
The present invention relates to a kind of TPP decoding circuits based on UHF RFID chip.
Background technique
At present, UHF RFID technique has been widely used for the fields such as logistics, traffic, gate inhibition.In UHF RFID system
In, reader sends TPP coding, and chip is decoded TPP coding after receiving, to execute the order of reader transmission.
It therefore, is exactly the basis of entire UHF RFID chip to the decoding of TPP coding.
Conventional decoding process is to be recorded the length of TPP coding using one group of counter, then decoded according to its value.
Its defect is that in decoding, power consumption is bigger, and the requirement to timing is stringent.
And the power consumption of UHF RFID chip is a serious challenge to performance.Power consumption when reduction TPP coding and decoding is then
It is an important measure for reducing chip power-consumption.As it can be seen that power consumption is a vital index for passive label.
And energy consumed by decoded portion occupies very big specific gravity in entire chip, so the direct shadow of quality of downlink coding mode
The function of having arrived label is rung, self-developed standard proposes TPP coding, while bringing high level lasting time to significantly improve,
Also no small challenge is brought to design.
In general, the value of Tc can be 6.25us in TPP coding, it is also possible to 12.5us, the coding mode of data is 2
One group of data is encoded, and symbol lengths corresponding to 00,01, ll, 10 are respectively 2Tc, 3Tc, 4Tc, 5Tc, and reader is sent
Mass data can be approximately considered be random, so the probability that these types of coded identification occurs can consider it is approximately equal,
Average length needed for so finally indicating two data are as follows:
LTPP=(2TC+3TC+4TC+5TC)/4=3.5TC (1)
LTPP=21.875 or 43.75us (2)
Compare from formula (1), (2) as can be seen that TPP coding transmission similarly counts in the case where high-speed fl transmission
It is slightly longer than the time needed for PIE coding according to amount, result in label when being decoded to it in this way, decoded counter needs to count
Count to a bigger value.
More serious, TPP coding is that a coded identification is taken to represent the mode of two data to send data,
And mono- coded identification of PIE represents a data, it is meant that in circuit TPP decode counter after decoding two data
It can reset, and PIE decoding counter will reset after decoding a data, so the counter used in TPP decoding
The count value for the counter used when will decode than PIE is big, brings the disadvantage in power consumption.
Counter can bring bigger power dissipation overhead in the design of UHF RFID chip, especially work as actuation counter
When clock frequency is very high, counter overturning will relatively frequently, power consumption will raising sharply, there is in decoded portion
Such problems counts symbol lengths using 1.92M clock, and is judged count value therefore, it is determined that received number
According to what is, if a coded identification duration is long, the count value of counter will be big, the number of overturning
It will be very much.
Shown in Fig. 1, traditional TPP decoding process calculates the length of TPP coded identification using coincidence counter.Synchronous counting
It can be regarded as combinational logic and trigger by calculating next count value in device structure to form, the clock end of all triggers is
The same clock pulses, combinational logic and trigger can generate bigger power consumption at runtime.And for UHF RFID chip
For, influence of the power consumption to identification distance is very big, and therefore, reducing power consumption is critically important challenge.
Summary of the invention
Object of the present invention is to provide a kind of TPP decoding electricity based on UHF RFID chip in view of the defects existing in the prior art
Road, the structure for the dual-travel-wave counter that traditional unit count device is changed to work alternatively.By using the double of alternation
Counter, when recording the length of next TPP coding, the counter of record previous group TPP code length is remained unchanged, and is reduced
Requirement to timing.And conventional counter is replaced using ripple counter, then greatly reduce power consumption.
The present invention to achieve the above object, adopts the following technical scheme that the TPP decoding electricity in a kind of UHF RFID chip
Road, including input sample module, two ripple counters, counter output selecting module and comparator;Wherein,
The input sample mould is used to sample the TPP encoded signal of input, exports two-way ripple counter
Enable signal give two ripple counters, export counter all the way export selection signal give the counter output selecting module;
Two ripple counters are used to calculate the length of TPP coding, use the mode of alternation, when
At work, the count value before another holding is constant by one in two ripple counters;
The counter exports selecting module, is exported and is selected according to the counter of the output of the input sample module
Signal, the count value for that ripple counter for selecting two ripple counter count values to remain unchanged is as the comparator
Input, to decoded digital signal;
The comparator is used to be compared preset value by the count value to input, decodes phase
The digital signal answered.
Preferably, in two ripple counters, each ripple counter is made of multiple concatenated triggers
Cascade structure;Wherein, the clock of first order trigger terminates master clock, and the clock end of trigger then connects level-one triggering
The output of device.
Beneficial effects of the present invention: the present invention is calculated using two ripple counters instead of traditional coincidence counter
The length of TPP coded identification, is not only simple in structure, and manufacturing cost is low, and greatly reduces the operation power consumption of circuit.In addition,
Ripple counter structure of the invention is simple, is only made of several triggers, and the clock end of next stage trigger is upper level
The data of trigger export, and therefore, the overturning rate of next stage trigger is the half of upper level trigger, as a result, significantly
Reduce power consumption when operation.
Detailed description of the invention
Fig. 1 traditional coincidence counter structural schematic diagram.
Circuit theory schematic diagram Fig. 2 of the invention.
Ripple counter structural schematic diagram Fig. 3 of the invention.
Specific embodiment
Shown in Fig. 2, it is related to a kind of TPP decoding circuit based on UHF RFID chip, including input sample module, two rows
Wave counter, counter output selecting module and comparator;Wherein,
The input sample mould is used to sample the TPP encoded signal of input, exports two-way ripple counter
Enable signal give two ripple counters, export counter all the way export selection signal give the counter output selecting module;
Two ripple counters are used to calculate the length of TPP coding, use the mode of alternation, when
At work, the count value before another holding is constant by one in two ripple counters;
The counter exports selecting module, is exported and is selected according to the counter of the output of the input sample module
Signal, the count value for that ripple counter for selecting two ripple counter count values to remain unchanged is as the comparator
Input, to decoded digital signal;
The comparator is used to be compared preset value by the count value to input, decodes phase
The digital signal answered.
Its working principle is that: input sample samples TPP coded identification, while exporting making for two ripple counters simultaneously
It can signal and counter output selection signal.The selection signal of two ripple counters negates each other, guarantees two counters only
There is one working, another value remains unchanged.While sampling, after a ripple counter in work is to sampling
TPP coded identification length counts, and after the completion of a TPP coded identification, enable signal is negated, which stops work
Make, count value remains unchanged.Count value output selecting module exports the count value of the ripple counter to comparator, comparator
By comparing the count value compared with preset value, decoded result is obtained.
As shown in figure 3, preferred technical solution is that each traveling wave counts in two ripple counters 1,2 in the present invention
Device is the cascade structure being made of multiple concatenated triggers;Wherein, the clock of first order trigger terminates master clock, then
The clock end of trigger connects the output of level-one trigger.Therefore, the overturning rate of next stage trigger is upper level trigger
Half greatly reduces power consumption when operation.
Present invention employs the modes of ripple counter to carry out counting decoding come the coding to TPP, below with 1.92MHz when
The decoded optimised power consumption situation of TPP is analyzed for clock decoding.
If illustrating so that bit wide is 5 counter as an example, if 5 registers are all using traditional coincidence counter
It is driven by 1.92MHz clock, state of 5 registers all in high-speed turnover when work;If using ripple counter,
Only the counter of lowest order is driven by 1.92MHz clock, remaining high register is driven step by step by the register of low level,
When work, only the overturning rate of lowest order is 1.92MHz, and a more past high position is then successively decreased with the multiplying power of 2 index.It is counted by formula (3)
It calculates it is found that this final bit wide is that more than half part of 5 power consumption of counter all concentrates on the register of lowest order, and most
The power consumption of high-order counter almost can be ignored.
TPP decoding when in this way, allow for TPP decoding itself brought by need counter modulus value it is larger,
Disadvantage in the excessive bring power consumption of counter bit wide is eased.Because of either TPP or PIE coding, their power consumption
It all concentrates on the counter of lowest order, unrelated with the size of counter bit wide and modulus value, the height of power consumption is only by lowest order
The working time of register determines.And the efficiency that TPP coding sends data is integrally above PIE coding, so self-developed standard
The power consumption of TPP decoder module will be by that will be better than the decoding power consumption of PIE coding in 6C standard after optimization.
The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all in spirit of the invention and
Within principle, any modification, equivalent replacement, improvement and so on be should all be included in the protection scope of the present invention.
Claims (1)
1. a kind of TPP decoding circuit based on UHF RFID chip, which is characterized in that including input sample module, two traveling waves
Counter, counter output selecting module and comparator;Wherein,
The input sample module is used to sample the TPP encoded signal of input, and output two-way ripple counter makes
Can signal give two ripple counters, export counter all the way export selection signal give the counter output selecting module;
Two ripple counters are used to calculate the length of TPP coding, the mode of alternation are used, when two
At work, the count value before another holding is constant by one in ripple counter;
The counter exports selecting module, exports selection letter according to the counter of the output of the input sample module
Number, the count value for that ripple counter for selecting two ripple counter count values to remain unchanged is as the comparator
Input, to decoded digital signal;
The comparator is used to be compared preset value by the count value to input, decodes corresponding
Digital signal;In two ripple counters, each ripple counter is the cascade being made of multiple concatenated triggers
Structure;Wherein, the clock of first order trigger terminates master clock, and the clock end of trigger then connects the defeated of level-one trigger
Out.
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CN105356972A (en) * | 2015-11-19 | 2016-02-24 | 国网天津市电力公司 | Low-power-consumption RFID-tag-based PIE decoding method and decoder using the same |
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CN1663114A (en) * | 2002-04-25 | 2005-08-31 | 塞乐丝半导体公司 | Demodulator using digital circuitry |
CN101662289A (en) * | 2009-09-11 | 2010-03-03 | 西安电子科技大学 | Passive ultrahigh-frequency radio-frequency identification chip decoder and decoding method |
US9130580B2 (en) * | 2011-08-10 | 2015-09-08 | University of Pittsburgh —of the Commonwealth System of Higher Education | Low-power pulse width encoding scheme and counter-less shift register that may be employed therewith |
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