CN106100781A - Clock tracing method and system based on E1 passage - Google Patents
Clock tracing method and system based on E1 passage Download PDFInfo
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- CN106100781A CN106100781A CN201610345086.0A CN201610345086A CN106100781A CN 106100781 A CN106100781 A CN 106100781A CN 201610345086 A CN201610345086 A CN 201610345086A CN 106100781 A CN106100781 A CN 106100781A
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- H—ELECTRICITY
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- H04J3/0667—Bidirectional timestamps, e.g. NTP or PTP for compensation of clock drift and for compensation of propagation delays
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
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Abstract
The present invention relates to a kind of clock tracing method and system based on E1 passage, comprise the following steps based on the clock tracing method of E1 passage: when Synchronization Clock completes to initialize, respectively according to the frequency source priority orders preset and the time source priority orders of presetting, obtain effective frequency reference source and effective time reference source；When present clock period of supervision arrives, according to effective frequency reference source and effective time reference source, obtain the clock jitter between local clock and master clock in Synchronization Clock by calculating；When clock jitter is more than corresponding predetermined deviation threshold value, the frequency and phase place of local clock is adjusted, obtains real-time adjusted value；According to real-time adjusted value and the model fitting parameter preset, carry out punctual Model Weight parameter tuning；According to the result of punctual Model Weight parameter tuning, clock tracing is carried out to local clock.The present invention can improve reliability and the precision of the whole network time synchronized.
Description
Technical field
The present invention relates to the intelligent substation of electric power system Clock Synchronization Technology field based on E1 passage, particularly relate to one
Plant the clock tracing method and system based on E1 passage.
Background technology
Intelligent substation electric power network technique is the main trend of following power network development, and it is intelligent with primary equipment, secondary device
Networking, computer-aided traffic control etc. are essential characteristic.The collection of power system one next state is completed by distributed apparatus, and certain
A little secondary devices need the data of synchronization, therefore it is required that distributed apparatus synchronizes work under a unified clock network
Make.
The precision and stability of time synchronized is to improve phasor and the dynamic monitoring of work(angle, line fault range finding, unit and electricity
The key factor of the network parameters verification degree of accuracy, is related to network stability control and accident is accurately analyzed, and is also to improve electrical network simultaneously
Operational efficiency and the key factor of reliability, be the crucial requirement adapting to the development such as UHV transmission, bulk power grid interconnection.Electrical network
Increasingly sophisticated and intelligentized improve constantly, for generating in electrical network, transmission of electricity, power transformation and other all kinds of business, in high precision,
The whole network unified time has become one of necessary supporting method of modernization electrical network.
During realizing, inventor finds that in conventional art, at least there are the following problems: conventional art achieves power transformation
Time synchronized and unification thereof, but cannot realize the time unification of full electric network in standing, and causes the precision of the whole network time synchronized and reliable
Property is low.
Content of the invention
Based on this, it is necessary to the problem that full electric network time unification cannot be realized for conventional art, provide a kind of based on E1
The clock tracing method and system of passage.
To achieve these goals, the embodiment of technical solution of the present invention is:
On the one hand, provide a kind of clock tracing method based on E1 passage, comprise the following steps:
When Synchronization Clock completes to initialize, respectively according to the frequency source priority orders preset and the time of presetting
Source priority orders, obtains effective frequency reference source and effective time reference source；The frequency source priority orders preset
Setting principle includes the highest priority of the 2MBITS frequency source of E1 passage；The setting principle of the time source priority orders preset
Including the highest priority of the PTP time source of E1 passage；
When present clock period of supervision arrives, according to effective frequency reference source and effective time reference source, pass through
Calculate and obtain the clock jitter between local clock and master clock in Synchronization Clock；
When clock jitter is more than corresponding predetermined deviation threshold value, the frequency and phase place of local clock is adjusted,
To real-time adjusted value；
According to real-time adjusted value and the model fitting parameter preset, carry out punctual Model Weight parameter tuning；
According to the result of punctual Model Weight parameter tuning, clock tracing is carried out to local clock.
On the other hand, a kind of clock tracing system based on E1 passage is provided, comprising:
Obtain frequency reference source module, for when Synchronization Clock completes to initialize, excellent according to default frequency source
First level order, obtains effective frequency reference source；The setting principle of the frequency source priority orders preset includes E1 passage
The highest priority of 2MBITS frequency source；
Obtain time reference source module, for when Synchronization Clock completes to initialize, excellent according to default time source
First level order, obtains effective time reference source；The setting principle of the time source priority orders preset includes the PTP of E1 passage
The highest priority of time source；
Deviation computing module, for when present clock period of supervision arrives, according to effective frequency reference source and effective
Time reference source, obtain the clock jitter between local clock and master clock in Synchronization Clock by calculating；
Adjusting module, is used for when clock jitter is more than corresponding predetermined deviation threshold value, frequency and the phase to local clock
Position is adjusted, and obtains real-time adjusted value；
Parameter tuning module, for according to real-time adjusted value and the model fitting parameter preset, carries out punctual Model Weight
Parameter tuning；
Clock tracking module, for the result according to punctual Model Weight parameter tuning, local clock is entered row clock with
Track.
Technique scheme has the advantages that
The present invention is based on the clock tracing method and system of E1 passage, it is proposed that be applied to the reference source selecting party of E1 passage
The on-line study method of method and total factor parameter；By being applied to the system of selection of E1 passage, it is achieved the group in clock external source
Net configuration and reference source priority are arranged, it is ensured that the time consistency of SDH network the whole network clockwork and frequency source precision, strengthen
The reliability of intelligent substation and stability；By the on-line study method of total factor parameter, during on-line operation, to temperature, fortune
The collective frequency impact of the factors such as row duration carries out parameter tuning, improves the timekeeping performance of clock system；The invention enables intelligence
Each transformer station clockwork in energy transformer station electrical network can share same set of master clock by corresponding network such as SDH network,
Thus realize the whole network time unification, the synchronous method being proposed by the present invention, it is possible to increase the reliability of the whole network time synchronized and
Precision.
Brief description
Fig. 1 is the schematic flow sheet based on the clock tracing embodiment of the method 1 of E1 passage for the present invention；
Fig. 2 is that the present invention is based on the overall frame of E1 channel time synchronization in clock tracing method one specific embodiment of E1 passage
Frame schematic diagram；
Fig. 3 is that the present invention shows based on E1 channel time synchronization flow process in clock tracing method one specific embodiment of E1 passage
It is intended to；
Fig. 4 is the structural representation based on the clock tracing system embodiment 1 of E1 passage for the present invention.
Detailed description of the invention
For the ease of understanding the present invention, below with reference to relevant drawings, the present invention is described more fully.In accompanying drawing
Give the first-selected embodiment of the present invention.But, the present invention can realize in many different forms, however it is not limited to institute herein
The embodiment describing.On the contrary, provide the purpose of these embodiments to be to make to the disclosure more thoroughly comprehensively.
Unless otherwise defined, all of technology used herein and scientific terminology and the technical field belonging to the present invention
The implication that technical staff is generally understood that is identical.The term being used in the description of the invention herein is intended merely to describe tool
The purpose of the embodiment of body, it is not intended that in the restriction present invention.Term as used herein " and/or " include one or more phase
Arbitrary and all of combination of the Listed Items closing.
The present invention is based on the clock tracing embodiment of the method 1 of E1 passage:
Full electric network time unification cannot be realized in order to solve conventional art, cause precision and the reliability of the whole network time synchronized
Low problem, the invention provides a kind of clock tracing embodiment of the method 1 based on E1 passage；Fig. 1 is that the present invention is led to based on E1
The schematic flow sheet of the clock tracing embodiment of the method 1 in road；As it is shown in figure 1, may comprise steps of:
Step S110: Synchronization Clock complete initialize when, respectively according to preset frequency source priority orders and
The time source priority orders preset, obtains effective frequency reference source and effective time reference source；The frequency source preset is excellent
The setting principle of first level order includes the highest priority of the 2MBITS frequency source of E1 passage；The time source priority orders preset
Setting principle include the highest priority of PTP time source of E1 passage；
In a concrete enforcement, the frequency source priority orders preset can be E1 passage from high to low successively
2MBITS frequency source, BDS frequency source and GPS frequency source；The time source priority orders preset can be E1 from high to low successively
The PTP time source of passage, BDS time source and gps time source；
Step S120: when present clock period of supervision arrives, joins according to effective frequency reference source and effective time
Examine source, obtain the clock jitter between local clock and master clock in Synchronization Clock by calculating；
Wherein in an example, clock jitter can include phase deviation sequence and frequency departure；
Step S130: when clock jitter is more than corresponding predetermined deviation threshold value, the frequency and phase place of local clock is entered
Row adjusts, and obtains real-time adjusted value；
Wherein in an example, predetermined deviation threshold value can include phase deviation queue thresholds and frequency departure threshold value；
Real-time adjusted value can include real-time frequency adjusted value and real-time phase adjusted value；
Step S140: according to real-time adjusted value and the model fitting parameter preset, carries out punctual Model Weight parameter tuning；
In a specific example, the model fitting parameter preset can include that temperature frequency response model offline simulation is whole
Determine parameter and aging frequency response model offline simulation setting parameter；
Step S150: according to the result of punctual Model Weight parameter tuning, clock tracing is carried out to local clock.
Specifically, the E1 passage in the present invention also refers to 30 tunnel pulse-code modulation PCM: use synchronous time division multiplexing skill
Art is compounded in 30 voice channels and 2 control channels on the IA High Speed Channel of one 2.048Mbit/s.(same at clock apparatus
Step clock apparatus) initialize complete after, first judge frequency reference source validity, synchronised clock prioritizing selection is from SDH
E1 (2Mbits signal, the i.e. 2 megabits letters of (Synchronous Digital Hierarchy, SDH) network
Number) as frequency source, frequency source priority orders: 2M (E1) > BD > GPS > PTP (E1).Time source priority orders: E1 passage
Transmission ground elapsed time signal PTP (E1) > BD > GPS, wherein BDS can refer to the Big Dipper (China Beidou satellite navigation system:
BeiDou Navigation Satellite System)；GPS can refer to Global Positioning System, and (whole world is fixed
Position system)；PTP can refer to Precision Time Protocol (accurate clock synchronization protocol)；
1) the 2MBITS frequency source priority from E1 passage is set to the highest, is primarily due to it when coming from BITS
Clock, and BITS Clock Frequency Accuracy is higher.
2) the PTP time source priority from E1 passage is set to the highest, primarily to guarantee the whole network clockwork
Time one source cause property, i.e. its plastic source property.
The reference source system of selection of the E1 passage in the embodiment of the present invention, allows precision and the more preferable reference source of stability obtain
Higher priority, so will preferentially be chosen to be a reference source when reference source is simultaneously effective, makes clock obtain more preferable benchmark,
So that phase place and frequency are more accurate.By the option and installment to reference source, greatly strengthen the validity in frequency reference source
And stability, and then fundamentally improve the accuracy of clock synchronization.
And tame in process (i.e. calculating the process of clock jitter) at clock, respectively to local clock and master clock (SDH net
Network master clock) between frequency departure and phase deviation sequence calculate；When phase deviation sequence and frequency departure are higher than in advance
During value of limiting, just enter horizontal phasing control and frequency adjusts, it is achieved clock tracing.
Additionally, the purpose of employing total factor parameter on-line study method is: owing to clock individuality there are differences, and temperature
The frequency influence of aging action needs comprehensive adjusting.In this case, temperature-time linear weight is used to analyze method.In fortune
During row, the frequency of real time record clock adjusts situation, sets up the sample space of temperature, duration, actual frequency.Punctual beginning
After, i.e. carry out weight parameter and adjust, and according to the temperature during punctual, duration, periodically adjust frequency values.Pass through on-line tuning
Temperature, the weight of aging influence factor, complete the individual self-adaptive processing of clock further, improves punctual reliable of clock
Property.
In a specific embodiment, step S120 can include step:
The data-signal sending the SDH network equipment of E1 passage opposite end carries out Slicer amplitude limit and DPLL successively
(Digital Phase Locked Loop: digital phase-locked loop) processes and recovers clock frequency, obtains effective clock jitter number
The number of it is believed that；
Low pass high-pass filtering and vector average value-based algorithm process are carried out successively to the phase difference sequence of clock bias data signal,
Obtain phase deviation sequence；
According to once linear functional equation model, least square fitting is carried out to phase deviation sequence, obtains frequency inclined
Difference.
Specifically, synchronised clock is in normal operating conditions, the data sending E1 passage opposite end SDH network equipment
Signal is recovered clock jitter by internal DPLL after Slicer (limiter) amplitude limit.When period of supervision starts, use
Least square method calculates frequency departure.I.e. during taming, high pass is carried out respectively to difference sequential value, after low-pass filtering treatment
Vector average value filtering method is used to ask for phase deviation sequence；And based on once linear equation prototype, use least square method
Ask for the slope of once linear equation, transformed after obtain frequency departure.
In a specific embodiment, step after step S120, can also be included:
When clock jitter is respectively less than corresponding predetermined deviation threshold value, the data of store clock deviation；
Clock period of supervision is changed to the present clock period of supervision of 1.5 times, passes back through calculating and obtain synchronised clock
The step of the clock jitter between local clock and master clock in device.
Specifically, when calculated frequency departure is less or is not enough to adjust clock crystal oscillator/rubidium clock, this week is retained
The clock bias data receiving in phase T, and 1.5T will be extended to the cycle, recalculate frequency departure after end cycle；Otherwise
Then recover period of supervision T.
During the clock based on E1 is tamed, it will usually when appearing that clock frequency departure is less when in sync,
If investigated according to fixed cycle T, arise that " previous cycle less stress, difference is accumulative；The toning of one week after phase, phase place is shaken
Swing " situation.After using above-mentioned period of supervision adaptive clock frequency tracking week, can greatly improve and tame effect
Really.I.e. when E1 passage is normal, fix for conventional period of supervision, cause frequency to adjust the problem of overshoot or less stress, carry out week
Phase online adaptive, self-adjusting, make up the limitation that fixed cycle frequency adjusts, and strengthens the stability of synchronised clock.
In a specific embodiment, step before step S110, can also be included:
Run the temperature frequency One-place 2-th Order function response model of foundation according to Synchronization Clock at different temperatures, logical
Cross least square method and carry out adjusting of model parameter, obtain temperature frequency response model offline simulation setting parameter；
Run the aging frequency logarithmic function curve response model of foundation according to Synchronization Clock at ambient temperature, logical
Cross least square method and carry out adjusting of model parameter, obtain aging frequency response model offline simulation setting parameter.
Specifically, temperature-responsive test experiment method and parameter tuning method: clock system runs at different temperatures,
Set up temperature frequency One-place 2-th Order function response model (parabola model) of constant-temperature crystal oscillator/rubidium clock, use least square method to enter
Adjusting of row model parameter.
Aging response test experiment method and parameter tuning method: clock system runs at ambient temperature, sets up constant temperature
The aging frequency logarithmic function curve response model of crystal oscillator/rubidium clock, uses least square method to carry out adjusting of model parameter.
Above two method belongs to single factor test offline parameter setting method, it is therefore an objective to by temperature, run duration single factor test
Clock frequency affects experimental technique, parameter tuning method, builds temperature, the Ageing Model of clock.So that during on-line operation,
The collective frequency impact of temperature, operation duration can be modeled and parameter tuning, improve the timekeeping performance of clock system.
In a specific embodiment, the present invention based in the clock tracing embodiment of the method 1 of E1 passage, synchronised clock
Device is the clock apparatus being configured with multichannel 2MBITS interface；Multichannel 2MBITS interface includes that the E1 of at least 1 unidirectional reception in tunnel connects
Mouthful；Master clock is SDH network master clock；Punctual Model Weight parameter tuning for set up according to the sample space preset based on
The weight parameter of SVM (SVMs) is adjusted.
Specifically, synchronised clock should configure multichannel 2M interface, and wherein 1 tunnel is the E1 interface of unidirectional reception, is used for obtaining
The 2Mbits frequency resource of LCN local communications network (SDH equipment).Other are two-way E1 interface, are used for ground elapsed time signal transduction chain road
Networking (for reception and the transmission of landline time reference signal), to ensure the whole network time unification of SDH network.Also should
Configuration reference source GPS/BD wireless signal accesses；
The i.e. reference source of the E1 passage that the present invention proposes configures and reference source system of selection, and also referring to synchronised clock should
Configuration multichannel 2M interface, wherein 1 tunnel is the E1 interface of unidirectional reception, is used for obtaining the 2Mbits of LCN local communications network (SDH equipment)
Frequency resource.Owing to reference source is directly from SDH network (reference clock is bits clock), its frequency accuracy is higher；Further, since be
The E1 interface of unidirectional reception, on this one way link, SDH equipment factor data will not be transmitted and be adjusted, thus ensures it
Precision, i.e. unidirectional E1 link does not transmit data, and carrier is not affected by transmitting, the frequency essence that therefore this frequency allocation method brings
Degree and reliability are higher.
In the present invention, the temperature-time linear weight based on SVM can be used to analyze method.In running, real
When recording clock frequency adjust situation, set up the sample space of temperature, duration, actual frequency.After punctual beginning, i.e. carry out base
Adjust in the weight parameter of SVM, and according to the temperature during punctual, duration, periodically adjust frequency values.
The present invention, based on the clock tracing embodiment of the method 1 of E1 passage, elaborates the overall process that clock is tamed, including source is joined
Put and select with source, Frequency Synchronization/time synchronized and punctual parameter tuning method；The adaptive clock rate synchronization side of period of supervision
When method includes that E1 passage is normal, fix for conventional period of supervision, cause frequency to adjust the problem of overshoot or less stress, enter line period
Online adaptive, self-adjusting, make up the limitation that fixed cycle frequency adjusts, and strengthens the stability of synchronised clock；Single factor test off-line
Parameter tuning, total factor parameter on-line study method includes that temperature, operation duration single factor test clock frequency affect experimental technique, ginseng
Number setting method, builds temperature, the Ageing Model of clock.During on-line operation, on temperature, run duration collective frequency affect into
Row modeling and parameter tuning, improve the timekeeping performance of clock system；It is applied to reference source configuration and the system of selection of E1 passage
Including the networking configuration in clock external source and reference source priority method to set up, it is ensured that the time of SDH network the whole network clockwork
Uniformity and frequency source precision, strengthen reliability and the stability of intelligent substation.The invention enables in intelligent substation electrical network
Each transformer station clockwork can share same set of master clock by corresponding network such as SDH network, thus when realizing the whole network
Between unified, the synchronous method being proposed by the present invention, it is possible to increase the reliability of the whole network time synchronized and precision.
The present invention is based on clock tracing method one specific embodiment of E1 passage:
Based on the technical scheme of the above-mentioned clock tracing embodiment of the method 1 based on E1 passage, simultaneously in order to further in detail
Illustrate the present invention, special as a example by SDH network master clock and E1 passage, technical scheme is described, Fig. 2 be the present invention based on
E1 channel time synchronization general frame schematic diagram in clock tracing method one specific embodiment of E1 passage；As shown in Figure 2:
The present invention with the clock of intelligent substation for investigating object, according in on-the-spot actual motion by pair when system cause
Clock synchronization issue, proposes reliable solution, provides intelligent substation clock system and realizes the synchronization of the whole network time unification
Method,
The present invention mainly may comprise steps of based on clock tracing method one specific embodiment of E1 passage:
(1) period of supervision adaptive clock frequency tracking
Synchronised clock at normal operating conditions, the data-signal that E1 passage opposite end SDH network equipment is come via
After Slicer amplitude limit, internal DPLL is recovered clock frequency.When period of supervision T then, use least square method calculate frequency
Deviation.When calculated frequency departure is less or is not enough to the demand adjusting clock crystal oscillator/rubidium clock, retain in this cycle T
The data receiving, and 1.5T will be extended to the cycle, recalculate frequency departure after end cycle；Otherwise then recover period of supervision
T.After using the clock frequency synchronization method of periodic time self-adapting, taming effect can be improved.
(2) single factor test offline parameter is adjusted, total factor parameter on-line study；
Temperature-responsive test experiment method and parameter tuning method: clock system runs at different temperatures, sets up constant temperature
Temperature frequency One-place 2-th Order function response model (parabola model) of crystal oscillator/rubidium clock, uses least square method to carry out model ginseng
Adjusting of number.
Aging response test experiment method and parameter tuning method: clock system runs at ambient temperature, sets up constant temperature
The aging frequency logarithmic function curve response model of crystal oscillator/rubidium clock, uses least square method to carry out adjusting of model parameter.
Total factor parameter on-line study method: owing to clock individuality there are differences, and the frequency influence of aging at temperature factor
Need comprehensive adjusting.In this case, the temperature-time linear weight based on SVM is used to analyze method.In running,
The frequency of real time record clock adjusts situation, sets up the sample space of temperature, duration, actual frequency.After punctual beginning, i.e. carry out
Adjust based on the weight parameter of SVM, and according to the temperature during punctual, duration, periodically adjust frequency values.
(3) reference source configuration and the reference source of E1 passage selects
Synchronised clock should configure multichannel 2M interface, and wherein 1 tunnel is the E1 interface of unidirectional reception, is used for obtaining LCN local communications network
The 2Mbits frequency resource of (SDH equipment).Other are two-way E1 interface, (are used for for the road networking of ground elapsed time signal transduction chain
The reception of landline time reference signal and transmission), to ensure the whole network time unification of SDH network.Also should configure reference
Source GPS/BD wireless signal accesses；
Synchronised clock prioritizing selection from the E1 (2M signal) of SDH network as frequency source, frequency source priority orders: 2M
(E1)>BD>GPS>PTP(E1).Time source priority orders: ground elapsed time signal PTP (E1) of E1 channel transfer > BD > GPS；
During Xun Fuing, carry out frequency departure respectively and phase deviation sequence calculates；When phase deviation sequence is higher than certain
During limit value, just enter horizontal phasing control.
Fig. 3 is that the present invention shows based on E1 channel time synchronization flow process in clock tracing method one specific embodiment of E1 passage
It is intended to；As it is shown on figure 3, a kind of clock tracing method based on E1 passage of the present invention can comprise the steps:
(1) off-line learning, parameter tuning
1) temperature frequency response model parameter tuning；
Design temperature frequency response models prototype ft=AX2+ BX+C, collects the temperature frequency under different temperatures in temperature control box
Rate sample data (Xi, fi), utilize least square method to carry out curve fitting, obtain fitting parameter A, B, C.Wherein, ftRepresent temperature
The real-time frequency of response, i represents sample number, and X represents temperature, and A, B, C are fitting parameter.
2) aging frequency response model parameter tuning；
Set aging response model prototype f of clock modulea=[a ln (bY+1)+c ln (dY+1)+1] f0；(at one
In specific example, f0Can be 10MHZ), insulating box is collected the aging sample data (Y under different time nodei, fi), profit
Carry out curve fitting by least square method, obtain fitting parameter a, b, c, d；Wherein, f0On the basis of frequency, Y represents time, i table
Showing sample number, a, b, c, d are fitting parameter.
(2) reference source selects；
Clock apparatus initializes after completing, and first judges the validity in frequency reference source, and according to frequency source set in advance
Priority orders 2MBITS (E1) > BD > GPS selects frequency reference source；Then according to time source priority orders set in advance
PTP (SDH) > BD > GPS selects time reference source.
1) the 2MBITS frequency source priority of the unidirectional E1 link from E1 passage is set to the highest, is primarily due to it
Come from BITS clock；On the one hand, BITS Clock Frequency Accuracy is higher；On the other hand, unidirectional E1 link does not transmit data, carrier
Do not affected by transmitting.
2) the PTP time source priority from E1 passage is set to the highest, primarily to guarantee the whole network clockwork
Time one source cause property, i.e. its plastic source property.
(3) clock is tamed；
The initial of constant-temperature crystal oscillator adjusts the clock cycle to be 10S (second), and rubidium clock is 20S.During Xun Fuing, to difference sequential value respectively
Carry out high pass, use after low-pass filtering treatment vector average value filtering method to ask for phase deviation sequenceWherein,For phase deviation sequence, N is sequential value；Based on once linear equation prototype y=kx
(wherein x is time counting to+b；Y is instantaneous phase biased sequence；K is once linear function slope, has direct proportion to close with frequency difference
System), use least square method to ask for slope k, transformed after obtain frequency departure and beΔfFor frequency departure.
After clock lock, if difference hop value exceedes difference saltus step threshold valueWherein, VpvFor difference saltus step
Value,For difference saltus step threshold value；Can confirm that and there occurs that phase place adjusts or saltus step for reference source；If now frequency source is
2MBITS (E1), then it is assumed that ΔfCredible, otherwise restart statistics.
1) when phase deviation sequence(in a specific example, δpCan be 40ns, i.e. 40 nanoseconds；δpFor partially
Difference limit value), and Δf＜ δf(δfMinimum frequency for constant-temperature crystal oscillator/rubidium clock adjusts unit) when, preserve phase deviation sequence Pei(i
=1,2...N), update period of supervision T '=1.5*T, proceed the calculating of phase deviation sequence and frequency departure；
2) otherwise, clock frequency Δ is adjustedf, adjust phase place
Preserve and run duration t, frequency adjusted value Δf, the mean temperature of this time periodAs sample source data
(4) online keep time parameter tuning；
Clock is tamed after completing, and carries out punctual parameter tuning, and sample set is
WhereinFor the frequency adjusted value of i & lt,Actual frequency values for i & lt.Clock module frequency synthesis mould
Type is:
F=ω1*ft+ω2*fa
=ω1*(AX2+BX+C)+ω2*[a ln(bY+1)+c ln(dY+1)+1]f0
After SVM study is carried out to sample set, respectively obtain respective weights apportioning cost ω1, ω2, update ω1, ω2。
Clock source is lost or behind the available effective source of nothing, according to T=10min interval time and frequency model f=ω1*ft+
ω2*faCalculate the ongoing frequency f in the case of not adjusting, consider modulated whole frequencyCalculate and currently should adjust
Whole frequency valuesLine frequency of going forward side by side adjusts.
The present invention is based on the clock tracing system embodiment 1 of E1 passage:
Full electric network time unification cannot be realized in order to solve conventional art, cause precision and the reliability of the whole network time synchronized
Low problem, is simultaneously based on the technological thought of said method, present invention also offers a kind of clock tracing system based on E1 passage
System embodiment 1；Fig. 4 is the structural representation based on the clock tracing system embodiment 1 of E1 passage for the present invention, as shown in Figure 4, and can
To include:
Obtain frequency reference source module 410, for when Synchronization Clock completes to initialize, according to default frequency source
Priority orders, obtains effective frequency reference source；The setting principle of the frequency source priority orders preset includes E1 passage
The highest priority of 2MBITS frequency source；
In a specific example, the frequency source priority orders preset can be E1 passage from high to low successively
2MBITS frequency source, BDS frequency source and GPS frequency source；
Obtain time reference source module 420, for when Synchronization Clock completes to initialize, according to default time source
Priority orders, obtains effective time reference source；The setting principle of described default time source priority orders includes that E1 leads to
The highest priority of the PTP time source in road；
In a specific example, the time source priority orders preset can be the PTP of E1 passage from high to low successively
Time source, BDS time source and gps time source；
Deviation computing module 430, for when present clock period of supervision arrives, according to effective frequency reference source with have
The time reference source of effect, obtains the clock jitter between local clock and master clock in Synchronization Clock by calculating；
In a specific example, clock jitter can include phase deviation sequence and frequency departure；
Adjusting module 440, for clock jitter more than corresponding predetermined deviation threshold value when, to the frequency of local clock and
Phase place is adjusted, and obtains real-time adjusted value；
In a specific example, predetermined deviation threshold value can include phase deviation queue thresholds and frequency departure threshold value；
Real-time adjusted value can include real-time frequency adjusted value and real-time phase adjusted value；
Parameter tuning module 450, for according to real-time adjusted value and the model fitting parameter preset, carries out punctual model power
Weight parameter tuning；
In a specific example, the model fitting parameter preset can include that temperature frequency response model offline simulation is whole
Determine parameter and aging frequency response model offline simulation setting parameter；
Clock tracking module 460, for the result according to punctual Model Weight parameter tuning, enters row clock to local clock
Follow the tracks of.
In a specific embodiment, deviation computing module 430 may include that
Data-signal module 432, enters successively for the data-signal sending the SDH network equipment of E1 passage opposite end
Row amplitude limit and DPLL process, obtain clock bias data signal；
Phase deviation computing module 434, for carrying out low pass high pass successively to the phase difference sequence of clock bias data signal
Filtering and vector average value-based algorithm process, obtain phase deviation sequence；
Frequency departure calculates module 436, for according to once linear functional equation model, carries out phase deviation sequence
Little square law matching, obtains frequency departure.
In a specific embodiment, the present invention can also include based on the clock tracing system embodiment 1 of E1 passage:
Memory module 470, is used for when clock jitter is respectively less than corresponding predetermined deviation threshold value, the number of store clock deviation
According to；
Clock, for when clock jitter is respectively less than corresponding predetermined deviation threshold value, is investigated week by modification cycle module 480
Phase changes to the present clock period of supervision of 1.5 times.
In a specific embodiment, the present invention can also include based on the clock tracing system embodiment 1 of E1 passage:
Temperature parameter is adjusted module 490, for running the temperature frequency of foundation at different temperatures according to Synchronization Clock
Rate One-place 2-th Order function response model, carries out adjusting of model parameter by least square method, obtains temperature frequency response model
Offline simulation setting parameter；
Ageing parameter is adjusted module 492, for running the aging frequency of foundation at ambient temperature according to Synchronization Clock
Rate logarithmic function curve response model, carries out adjusting of model parameter by least square method, obtains aging frequency response model
Offline simulation setting parameter.
In a specific embodiment, the present invention is based on synchronised clock in the clock tracing system embodiment 1 of E1 passage
Device is the clock apparatus being configured with multichannel 2MBITS interface；Multichannel 2MBITS interface includes that the E1 of at least 1 unidirectional reception in tunnel connects
Mouthful；Master clock is SDH network master clock；Punctual Model Weight parameter tuning for set up according to the sample space preset based on
The weight parameter of SVM is adjusted.
The present invention, based on the clock tracing system embodiment 1 of E1 passage, elaborates the overall process that clock is tamed, including source is joined
Put and select with source, Frequency Synchronization/time synchronized and punctual parameter tuning method；The adaptive clock rate synchronization side of period of supervision
When method includes that E1 passage is normal, fix for conventional period of supervision, cause frequency to adjust the problem of overshoot or less stress, enter line period
Online adaptive, self-adjusting, make up the limitation that fixed cycle frequency adjusts, and strengthens the stability of synchronised clock；Single factor test off-line
Parameter tuning, total factor parameter on-line study method includes that temperature, operation duration single factor test clock frequency affect experimental technique, ginseng
Number setting method, builds temperature, the Ageing Model of clock.During on-line operation, on temperature, run duration collective frequency affect into
Row modeling and parameter tuning, improve the timekeeping performance of clock system；It is applied to reference source configuration and the system of selection of E1 passage
Including the networking configuration in clock external source and reference source priority method to set up, it is ensured that the time of SDH network the whole network clockwork
Uniformity and frequency source precision, strengthen reliability and the stability of intelligent substation.The invention enables in intelligent substation electrical network
Each transformer station clockwork can share same set of master clock by corresponding network such as SDH network, thus when realizing the whole network
Between unified, the synchronous method being proposed by the present invention, it is possible to increase the reliability of the whole network time synchronized and precision.
Each technical characteristic of embodiment described above can combine arbitrarily, for making description succinct, not to above-mentioned reality
The all possible combination of each technical characteristic executed in example is all described, but, as long as the combination of these technical characteristics is not deposited
It in contradiction, is all considered to be the scope that this specification is recorded.
Embodiment described above only have expressed the several embodiments of the present invention, and it describes more concrete and detailed, but simultaneously
Can not therefore be construed as limiting the scope of the patent.It should be pointed out that, come for those of ordinary skill in the art
Saying, without departing from the inventive concept of the premise, can also make some deformation and improve, these broadly fall into the protection of the present invention
Scope.Therefore, the protection domain of patent of the present invention should be as the criterion with claims.
Claims (10)
1. the clock tracing method based on E1 passage, it is characterised in that comprise the following steps:
When Synchronization Clock completes to initialize, excellent according to the frequency source priority orders preset and the time source of presetting respectively
First level order, obtains effective frequency reference source and effective time reference source；Described default frequency source priority orders
Setting principle includes the highest priority of the 2MBITS frequency source of E1 passage；The setting of described default time source priority orders
Principle includes the highest priority of the PTP time source of E1 passage；
When present clock period of supervision arrives, according to described effective frequency reference source and described effective time reference source,
Obtain the clock jitter between local clock and master clock in described Synchronization Clock by calculating；
When described clock jitter is more than corresponding predetermined deviation threshold value, the frequency and phase place of described local clock is adjusted
Whole, after being adjusted real-time adjusted value；
According to described real-time adjusted value and the model fitting parameter preset, carry out punctual Model Weight parameter tuning；
According to the result of described punctual Model Weight parameter tuning, clock tracing is carried out to described local clock.
2. the clock tracing method based on E1 passage according to claim 1, it is characterised in that investigate week at present clock
When phase arrives, according to described effective frequency reference source and described effective time reference source, obtain described synchronization by calculating
In clock apparatus, the step of the clock jitter between local clock and master clock includes:
The data-signal sending the SDH network equipment of E1 passage opposite end carries out Slicer amplitude limit successively and DPLL processes extensive
Appear again clock frequency, obtain effective clock bias data signal；
Low pass high-pass filtering and vector average value-based algorithm process are carried out successively to the phase difference sequence of described clock bias data signal,
Obtain phase deviation sequence；
According to once linear functional equation model, least square fitting is carried out to described phase deviation sequence, obtains frequency inclined
Difference；
Wherein, described clock jitter includes described phase deviation sequence and described frequency departure；Described predetermined deviation threshold value includes
Phase deviation queue thresholds and frequency departure threshold value；Described real-time adjusted value includes that real-time frequency adjusted value and real-time phase adjust
Value.
3. the clock tracing method based on E1 passage according to claim 1, it is characterised in that described clock is inclined obtaining
After difference, further comprise the steps of:
When described clock jitter is less than corresponding described predetermined deviation threshold value, store the data of described clock jitter；
Clock period of supervision is changed to the described present clock period of supervision of 1.5 times, passes back through calculating and obtain described synchronization
The step of the clock jitter between local clock and master clock in clock apparatus.
4. the clock tracing method based on E1 passage according to claim 1, it is characterised in that obtaining effective frequency
Before the step in reference source and effective time reference source, further comprise the steps of:
Run the temperature frequency One-place 2-th Order function response model of foundation according to described Synchronization Clock at different temperatures, logical
Cross least square method and carry out adjusting of model parameter, obtain temperature frequency response model offline simulation setting parameter；
Run the aging frequency logarithmic function curve response model of foundation according to described Synchronization Clock at ambient temperature, logical
Cross least square method and carry out adjusting of model parameter, obtain aging frequency response model offline simulation setting parameter；
Wherein, described default model fitting parameter includes described temperature frequency response model offline simulation setting parameter and described
Aging frequency response model offline simulation setting parameter.
5. the clock tracing method based on E1 passage according to Claims 1-4 any one, it is characterised in that described
Synchronization Clock is to be configured with the clock apparatus of multichannel 2MBITS interface；Described multichannel 2MBITS interface includes that at least 1 tunnel is single
To the E1 interface receiving；Described master clock is SDH network master clock；Described punctual Model Weight parameter tuning is preset for basis
The weight parameter based on SVM that sample space is set up is adjusted.
6. the clock tracing system based on E1 passage, it is characterised in that include:
Obtain frequency reference source module, for when Synchronization Clock completes to initialize, according to default frequency source priority
Sequentially, effective frequency reference source is obtained；The setting principle of described default frequency source priority orders includes E1 passage
The highest priority of 2MBITS frequency source；
Obtain time reference source module, for when Synchronization Clock completes to initialize, according to default time source priority
Sequentially, effective time reference source is obtained；The setting principle of described default time source priority orders includes the PTP of E1 passage
The highest priority of time source；
Deviation computing module, for when present clock period of supervision arrives, according to described effective frequency reference source and described
Effective time reference source, inclined by calculating the clock between local clock and master clock in the described Synchronization Clock of acquisition
Difference；
Adjusting module, is used for when described clock jitter is more than corresponding predetermined deviation threshold value, the frequency to described local clock
It is adjusted with phase place, obtain real-time adjusted value；
Parameter tuning module, for according to described real-time adjusted value and the model fitting parameter preset, carries out punctual Model Weight
Parameter tuning；
Clock tracking module, for the result according to described punctual Model Weight parameter tuning, when carrying out described local clock
Clock is followed the tracks of.
7. the clock tracing system based on E1 passage according to claim 6, it is characterised in that described deviation computing module
Including:
Data-signal module, carries out amplitude limit successively for the data-signal sending the SDH network equipment of E1 passage opposite end
With DPLL process, obtain clock bias data signal；
Phase deviation computing module, for carrying out low pass high-pass filtering successively to the phase difference sequence of described clock bias data signal
With vector average value-based algorithm process, obtain phase deviation sequence；
Frequency departure calculates module, for according to once linear functional equation model, carries out minimum to described phase deviation sequence
Square law matching, obtains frequency departure；
Wherein, described clock jitter includes described phase deviation sequence and described frequency departure；Described predetermined deviation threshold value includes
Phase deviation queue thresholds and frequency departure threshold value；Described real-time adjusted value includes that real-time frequency adjusted value and real-time phase adjust
Value.
8. the clock tracing system based on E1 passage according to claim 6, it is characterised in that also include:
Memory module, for when described clock jitter is less than corresponding described predetermined deviation threshold value, storing described clock jitter
Data；
Modification cycle module, for when described clock jitter is less than corresponding described predetermined deviation threshold value, investigating week by clock
Phase changes to the described present clock period of supervision of 1.5 times.
9. the clock tracing system based on E1 passage according to claim 6, it is characterised in that also include:
Temperature parameter is adjusted module, for running the temperature frequency one of foundation at different temperatures according to described Synchronization Clock
Unit's quadratic function response model, carries out adjusting of model parameter by least square method, obtains temperature frequency response model off-line
Matching setting parameter；
Ageing parameter is adjusted module, for running the aging frequency pair of foundation at ambient temperature according to described Synchronization Clock
Number function curve response model, carries out adjusting of model parameter by least square method, obtains aging frequency response model off-line
Matching setting parameter；
Wherein, described default model fitting parameter includes described temperature frequency response model offline simulation setting parameter and described
Aging frequency response model offline simulation setting parameter.
10. the clock tracing system based on E1 passage according to claim 6 to 9 any one, it is characterised in that described
Synchronization Clock is to be configured with the clock apparatus of multichannel 2MBITS interface；Described multichannel 2MBITS interface includes that at least 1 tunnel is single
To the E1 interface receiving；Described master clock is SDH network master clock；Described punctual Model Weight parameter tuning is preset for basis
The weight parameter based on SVM that sample space is set up is adjusted.
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Effective date of registration: 20210803 Address after: 510663 3 building, 3, 4, 5 and J1 building, 11 building, No. 11, Ke Xiang Road, Luogang District Science City, Guangzhou, Guangdong. Patentee after: China South Power Grid International Co.,Ltd. Patentee after: WUHAN ZHONGYUAN HUADIAN SCIENCE & TECHNOLOGY Co.,Ltd. Patentee after: ELECTRIC POWER RESEARCH INSTITUTE, GUIZHOU POWER GRID Co.,Ltd. Patentee after: ELECTRIC POWER SCIENCE & RESEARCH INSTITUTE OF GUANGXI POWER GRID Corp. Address before: 510080 water Donggang 8, Dongfeng East Road, Yuexiu District, Guangzhou, Guangdong. Patentee before: POWER GRID TECHNOLOGY RESEARCH CENTER. CHINA SOUTHERN POWER GRID Patentee before: China South Power Grid International Co.,Ltd. Patentee before: WUHAN ZHONGYUAN HUADIAN SCIENCE & TECHNOLOGY Co.,Ltd. Patentee before: ELECTRIC POWER RESEARCH INSTITUTE, GUIZHOU POWER GRID Co.,Ltd. Patentee before: ELECTRIC POWER SCIENCE & RESEARCH INSTITUTE OF GUANGXI POWER GRID Corp. |