CN106096498B - A kind of on piece fingerprint circuit and its ID generation unit based on antenna effect - Google Patents
A kind of on piece fingerprint circuit and its ID generation unit based on antenna effect Download PDFInfo
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- CN106096498B CN106096498B CN201610363759.5A CN201610363759A CN106096498B CN 106096498 B CN106096498 B CN 106096498B CN 201610363759 A CN201610363759 A CN 201610363759A CN 106096498 B CN106096498 B CN 106096498B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
- G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
- G06V40/12—Fingerprints or palmprints
Abstract
The on piece fingerprint circuit and its ID that the present invention relates to a kind of based on antenna effect generate unit, it includes resistance and the first metal-oxide-semiconductor respectively N-channel type that the ID, which generates unit, second metal-oxide-semiconductor, third metal-oxide-semiconductor, 4th metal-oxide-semiconductor and the 5th metal-oxide-semiconductor, wherein, the grid of the grid of first metal-oxide-semiconductor and the 5th metal-oxide-semiconductor, source electrode and drain electrode connects high level, the source electrode of first metal-oxide-semiconductor, drain electrode and the drain electrode of the second metal-oxide-semiconductor connect the grid of third metal-oxide-semiconductor respectively, the grid and source electrode of second metal-oxide-semiconductor are grounded, the source electrode of third metal-oxide-semiconductor is grounded, the drain electrode of third metal-oxide-semiconductor connects the drain electrode of the 4th metal-oxide-semiconductor, the grid of 4th metal-oxide-semiconductor is that the high level of ID generation unit chooses end, one end of the source electrode connection resistance of 4th metal-oxide-semiconductor, the other end of resistance is that the ID generates list The output end of member, moreover, the grid of the grid of the first metal-oxide-semiconductor and the 5th metal-oxide-semiconductor is randomly punctured in chip generating process by antenna effect.Implement technical solution of the present invention, reduces the area of circuit.
Description
Technical field
The present invention relates to chip identification and anti-counterfeit field more particularly to a kind of on piece fingerprint circuit based on antenna effect and
Its ID generates unit.
Background technique
Current chip-scale physics can not copy function system architecture consist of three parts substantially: on piece fingerprint, challenge ring
It answers, stabiloity compensation.
As the fingerprint of the mankind, the on piece fingerprint of integrated circuit characterizes the physics uniqueness of the chip, is to develop
Chip-scale physics can not copy function basis.And ID generates the basic unit that unit is on piece fingerprint circuit, imitates in antenna
It should descend to generate the random number of one 0 or 1.Generating unit extensions based on ID is the on piece fingerprint circuit for producing ID array, on piece
ID sequence caused by fingerprint circuit has the fabulous truly random property of physics and physics uniqueness.Moreover, antenna effect there is only
Among chip production process, once chip production is completed, the logic sequence of on piece ID array is kept constant, in normal work
Make that there is high stability under environment.The above feature ensure that be had not in different chips based on antenna effect ID array
The characteristics of repeatability and permanent stability, therefore the CMOS on piece fingerprint of high quality can be generated.
Fig. 1 be a kind of on piece fingerprint circuit in the prior art ID generate unit circuit diagram, the ID generate unit by
Symmetrical two parts composition, be illustrated by taking a part of the right as an example: the grid of N-channel MOS pipe M1 connects zero potential, p-type metal-oxide-semiconductor
M2 is used to draw leakage current, and metal-oxide-semiconductor M3 and M4 composition reverser are used as buffer isolation load.The ID generates the defeated of unit
Logical value is by the whether breakdown determination of metal-oxide-semiconductor M1 and M5 out (caused by antenna effect).When metal-oxide-semiconductor M1 breakdown, metal-oxide-semiconductor M5 is not hit
When wearing, the drain electrode (originally voltage is VDD) of metal-oxide-semiconductor M2 can be grounded by metal-oxide-semiconductor M1 pipe, at this point, node Internal node is
Low level, exporting after the phase inverter as composed by metal-oxide-semiconductor M3 and M4, at OUT1 is high level, as 1.In addition, due to
Metal-oxide-semiconductor M5 due to no breakdown, at OUT2 output be low level, as 0.So the output valve of OUT1, OUT2 are logic mutuals
It mends.Similarly, when metal-oxide-semiconductor M5 punctures and metal-oxide-semiconductor M1 does not puncture, output is that output is 1 at 0, OUT2 at OUT1.
But the ID generates unit due to having PMOS tube, so needing to be arranged NWELL layers, moreover, the quantity of metal-oxide-semiconductor
It is more, it is unfavorable for complying with the trend of chip miniaturization.
Summary of the invention
The technical problem to be solved in the present invention is that the defect big for the above-mentioned area of the prior art, provides a kind of base
Unit is generated in the on piece fingerprint circuit and its ID of antenna effect.
The technical solution adopted by the present invention to solve the technical problems is: it is single to construct a kind of ID generation based on antenna effect
Member, for generating a random code, including resistance and the first metal-oxide-semiconductor respectively N-channel type, the second metal-oxide-semiconductor, third metal-oxide-semiconductor, the
Four metal-oxide-semiconductors and the 5th metal-oxide-semiconductor, wherein the grid of the grid of first metal-oxide-semiconductor and the 5th metal-oxide-semiconductor, source electrode and drain electrode are equal
High level is connect, source electrode, drain electrode and the drain electrode of second metal-oxide-semiconductor of first metal-oxide-semiconductor connect the grid of the third metal-oxide-semiconductor respectively
Pole, grid and the source electrode ground connection of second metal-oxide-semiconductor, the source electrode ground connection of the third metal-oxide-semiconductor, the drain electrode of the third metal-oxide-semiconductor
Connecing the drain electrode of the 4th metal-oxide-semiconductor, the grid of the 4th metal-oxide-semiconductor is that the ID generates the high level of unit and chooses end, described the
The source electrode of four metal-oxide-semiconductors connects one end of the resistance, and the other end of the resistance is the output end that the ID generates unit, moreover,
The grid of the grid of first metal-oxide-semiconductor and the 5th metal-oxide-semiconductor in chip generating process by antenna effect with
Puncture to machine.
Preferably, the polysilicon layer of chip is arranged in first metal-oxide-semiconductor and the 5th metal-oxide-semiconductor, moreover, the polycrystalline
The area of silicon layer is greater than 7.92um2。
Preferably, the first contact hole and the connection institute of the grid of first metal-oxide-semiconductor and the respective metal layers of chip are connected
The area for stating the second contact hole of the grid of the 5th metal-oxide-semiconductor and the respective metal layers of chip is all larger than 0.396um2。
The present invention also constructs a kind of on piece fingerprint circuit based on antenna effect, comprising: including multiple above-described ID
Generate unit.
Preferably, the multiple ID generates the array of unit composition M*N, and at least one of M, N are the nature greater than 1
Number, the on piece fingerprint circuit further includes selector and N number of switch, moreover, the high level that the ID of every a line generates unit is chosen
End is connected with the corresponding output end of the selector, and the output end of the ID of each column generation unit is all connected with the of respective switch
One end, and the second end of N number of switch is connected, and is the output end of the on piece fingerprint circuit.
Implement technical solution of the present invention, ID generates unit reduces three metal-oxide-semiconductors compared with prior art, reduces circuit
Area, improve the wafer density of unit area.Moreover, because the switching tube that each ID is generated in unit is all N-channel type
Metal-oxide-semiconductor, thus no setting is required NWELL layers, further decrease the area of circuit.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with
It obtains other drawings based on these drawings.In attached drawing:
Fig. 1 is that a kind of ID of on piece fingerprint circuit in the prior art generates the circuit diagram of unit；
Fig. 2 is that the present invention is based on the circuit diagrams that the ID of antenna effect generates unit embodiment one；
Fig. 3 is the circuit diagram of the on piece fingerprint circuit embodiments one the present invention is based on antenna effect.
Specific embodiment
Fig. 2 is the present invention is based on the circuit diagram that the ID of antenna effect generates unit embodiment one, and the ID of the embodiment is generated
Unit further includes a resistance including being respectively metal-oxide-semiconductor M1, metal-oxide-semiconductor M2, metal-oxide-semiconductor M3, metal-oxide-semiconductor M4 and metal-oxide-semiconductor M5 N-channel type
(not shown).Moreover, the grid and the grid of metal-oxide-semiconductor M5, source electrode and drain electrode of metal-oxide-semiconductor M1 meet high level VDD, metal-oxide-semiconductor M1's
Source electrode, drain electrode and the drain electrode of metal-oxide-semiconductor M2 connect the grid of metal-oxide-semiconductor M3 respectively, and the grid and source electrode of metal-oxide-semiconductor M2 is grounded, metal-oxide-semiconductor M3's
Source electrode ground connection, the drain electrode of metal-oxide-semiconductor M3 connect the drain electrode of metal-oxide-semiconductor M4, and the grid of metal-oxide-semiconductor M4 is that the high level of ID generation unit is chosen
It holds (SEL), one end of the source electrode connection resistance (not shown) of metal-oxide-semiconductor M4, the other end of resistance is the output that the ID generates unit
It holds (OUT).Moreover, the grid of metal-oxide-semiconductor M1 and the grid of metal-oxide-semiconductor M5 are randomly hit in chip generating process by antenna effect
It wears.
Illustrate that the ID generates the working principle of unit below:
About antenna effect, illustrate first, during chip production, the grid of small size metal-oxide-semiconductor with have compared with
The first layer metal line of large area links together, and metal wire can collect charge so as to cause current potential raising, when the charge of collection
When sufficiently high, high voltage may puncture the thin gate oxide of metal-oxide-semiconductor, and metal-oxide-semiconductor is made to fail, and this phenomenon is referred to as " antenna
Effect ".
In this embodiment, metal-oxide-semiconductor M1 is connected with the grid of metal-oxide-semiconductor M5, when the charge on the grid of the two metal-oxide-semiconductors exists
When gradually accumulating during chip production, the grid of the two metal-oxide-semiconductors will randomly puncture one of them, when one of them
After the grid of metal-oxide-semiconductor is breakdown, the grid of the metal-oxide-semiconductor is connected to generate a charge leakage channel with source electrode, therefore, once
The grid of one of metal-oxide-semiconductor is breakdown, and charge will not be accumulated by again, to guarantee the grid of one and only one metal-oxide-semiconductor
Because antenna effect is randomly punctured.
When the high level that the ID generates unit chooses end input high level, if the grid of metal-oxide-semiconductor M1 is breakdown, metal-oxide-semiconductor
The grid of M5 is not breakdown, then the active area of metal-oxide-semiconductor M1 will be raised, and metal-oxide-semiconductor M3 is as amplifier, the height electricity that will be inputted
Pressure is converted to high current, and exports in metal-oxide-semiconductor M4 conducting, and the concatenated resistance (not shown) of source electrode institute of metal-oxide-semiconductor M4 can
The high current is converted into big voltage, that is, the ID generates the output end output 1 of unit；If the grid of metal-oxide-semiconductor M5 is breakdown, MOS
The grid of pipe M1 is not breakdown, then metal-oxide-semiconductor M2 can be dragged down its drain voltage due to channel leakage, and metal-oxide-semiconductor M3 will be inputted
Low voltage transition be low current, and exported in metal-oxide-semiconductor M4 conducting, and the concatenated resistance of source electrode institute of metal-oxide-semiconductor M4 (does not show
The low current can be converted into low-voltage out), that is, the ID generates the output end output 0 of unit.
In order to improve the efficiency that metal-oxide-semiconductor M1 and metal-oxide-semiconductor M5 generates antenna effect, it is possible to increase the face of the polysilicon layer of chip
Product, alternatively, increasing the area of contact hole.For example, the area of the polysilicon layer of setting chip is greater than 7.92um2, wherein metal-oxide-semiconductor
The polysilicon layer of chip is arranged in M1 and metal-oxide-semiconductor M5；Alternatively, the grid of setting connection metal-oxide-semiconductor M1 and the respective metal layers of chip
The first contact hole and connect the grid of metal-oxide-semiconductor M5 and the area of the second contact hole of the respective metal layers of chip is greater than
0.396um2。
The present invention also constructs a kind of on piece fingerprint circuit based on antenna effect, which includes more than multiple
The ID generates unit.
Fig. 3 is the circuit diagram of the on piece fingerprint circuit embodiments one the present invention is based on antenna effect, the on piece of the embodiment
Fingerprint circuit includes that selector (not shown), 3 switches and 9 ID generate unit, and selector is, for example, 2 lines/4 line decoders.
This 9 ID generate the array that unit is combined into a 3*3.Moreover, every a line ID generate unit high level choose end with choosing
An output end for selecting device is connected, for example, the high level that 3 ID of the first row generate unit chooses end defeated with the first of selector
Outlet is connected (not shown), and the high level that the second ID of row 3 generates unit chooses end to be connected with the second output terminal of selector
(not shown), the high level that 3 ID of the third line generate unit, which is chosen, holds the (not shown) that is connected with the third output end of selector.
The output end that the ID of each column generates unit is all connected with the first end of respective switch, for example, 3 ID of first row generate the defeated of unit
The first end that outlet is switched with first is connected, and 3 ID of secondary series generate the of the output ends of units with second switch
One end is connected, and the output end that 3 ID of third column generate unit is connected with the first end of third switch.The of this 3 switches
Two ends are connected (not shown), and are the output end of the on piece fingerprint circuit.
Illustrate the working principle of the on piece fingerprint circuit of the embodiment below:
Firstly, from the foregoing, it will be observed that each ID generates unit when choosing, can be according to metal-oxide-semiconductor M1 and M5 random breakdown the case where
Generate one 0 or 1 random code.
In this embodiment, for example, the first output end of control selections device exports high level, other output ends export low electricity
It is flat, meanwhile, control first closes the switch, and other switches disconnect, at this point, the output end of the on piece fingerprint circuit exports the first row
The ID of first row generates random number caused by unit；For another example the third output end of control selections device exports high level, it is other
Output end exports low level, meanwhile, control second closes the switch, and other switches disconnect, at this point, the on piece fingerprint circuit is defeated
The ID that outlet exports the third line secondary series generates random number caused by unit, etc..Can obtain in such a way one with
Machine Number Sequence, the random number sequence can be used as the on piece fingerprint of the on piece fingerprint circuit.
Finally it should be noted that, above only one embodiment of the present of invention, in other embodiments, multiple ID generate single
The array of the composable M*N of member, at least one of M, N are the natural number greater than 1, the quantity of switch be it is N number of, moreover, every a line
ID generate the high level of unit end chosen to be connected with the corresponding output end of selector, the output of the ID of each column generation unit
End is all connected with the first end of respective switch, and the second end of N number of switch is connected, and is the output end of the on piece fingerprint circuit.
These are only the preferred embodiment of the present invention, is not intended to restrict the invention, for those skilled in the art
For member, the invention may be variously modified and varied.All within the spirits and principles of the present invention, it is made it is any distort,
Equivalent replacement, improvement etc., should be included within scope of the presently claimed invention.
Claims (5)
1. a kind of ID based on antenna effect generates unit, for generating a random code under antenna effect, which is characterized in that packet
Resistance and the first metal-oxide-semiconductor, the second metal-oxide-semiconductor, third metal-oxide-semiconductor, the 4th metal-oxide-semiconductor and the 5th metal-oxide-semiconductor respectively N-channel type are included,
In, the grid of the grid of first metal-oxide-semiconductor and the 5th metal-oxide-semiconductor, source electrode and drain electrode meet high level, the first MOS
Source electrode, drain electrode and the drain electrode of second metal-oxide-semiconductor of pipe connect the grid of the third metal-oxide-semiconductor, the grid of second metal-oxide-semiconductor respectively
Pole and source electrode ground connection, the source electrode ground connection of the third metal-oxide-semiconductor, the drain electrode of the third metal-oxide-semiconductor connect the leakage of the 4th metal-oxide-semiconductor
Pole, the grid of the 4th metal-oxide-semiconductor are that the high level of ID generation unit chooses end, and the source electrode of the 4th metal-oxide-semiconductor connects institute
One end of resistance is stated, the other end of the resistance is the output end that the ID generates unit, moreover,
The grid of the grid of first metal-oxide-semiconductor and the 5th metal-oxide-semiconductor in chip generating process by antenna effect randomly
Breakdown.
2. ID according to claim 1 based on antenna effect generates unit, which is characterized in that first metal-oxide-semiconductor with
The polysilicon layer of chip is arranged in 5th metal-oxide-semiconductor, moreover, the area of the polysilicon layer is greater than 7.92um2。
3. the ID according to claim 1 based on antenna effect generates unit, which is characterized in that
Connect the first contact hole and connection the 5th metal-oxide-semiconductor of the grid of first metal-oxide-semiconductor and the respective metal layers of chip
Grid and the area of the second contact hole of respective metal layers of chip be all larger than 0.396um2。
4. a kind of on piece fingerprint circuit based on antenna effect characterized by comprising any including multiple claim 1-3
ID described in generates unit.
5. the on piece fingerprint circuit according to claim 4 based on antenna effect, which is characterized in that the multiple ID is generated
Unit forms the array of M*N, and at least one of M, N are the natural number greater than 1, and the on piece fingerprint circuit further includes selector
With N number of switch, moreover, every a line ID generate unit high level choose end with the corresponding output end phase of the selector
Even, the output end that the ID of each column generates unit is all connected with the first end of respective switch, and the second end phase of N number of switch
It even, and is the output end of the on piece fingerprint circuit.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610363759.5A CN106096498B (en) | 2016-05-26 | 2016-05-26 | A kind of on piece fingerprint circuit and its ID generation unit based on antenna effect |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610363759.5A CN106096498B (en) | 2016-05-26 | 2016-05-26 | A kind of on piece fingerprint circuit and its ID generation unit based on antenna effect |
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| CN106096498A CN106096498A (en) | 2016-11-09 |
| CN106096498B true CN106096498B (en) | 2019-03-26 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101083264A (en) * | 2006-06-02 | 2007-12-05 | 中芯国际集成电路制造(上海)有限公司 | Proctive circuit of metal-oxide-semiconductor transistor and its producing method |
| CN102800667A (en) * | 2012-07-04 | 2012-11-28 | 北京中电华大电子设计有限责任公司 | Method for solving antenna effect in chip design |
| CN105118829A (en) * | 2015-09-18 | 2015-12-02 | 芯佰微电子（北京）有限公司 | Protecting circuit to remove antenna effect of active shielding layer |
| CN105404739A (en) * | 2015-11-19 | 2016-03-16 | 重庆大学 | CMOS (Complementary Metal Oxide Semiconductor) on-chip constantly stable ID generating circuit based on asymmetric antenna effect |
-
2016
- 2016-05-26 CN CN201610363759.5A patent/CN106096498B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101083264A (en) * | 2006-06-02 | 2007-12-05 | 中芯国际集成电路制造(上海)有限公司 | Proctive circuit of metal-oxide-semiconductor transistor and its producing method |
| CN102800667A (en) * | 2012-07-04 | 2012-11-28 | 北京中电华大电子设计有限责任公司 | Method for solving antenna effect in chip design |
| CN105118829A (en) * | 2015-09-18 | 2015-12-02 | 芯佰微电子（北京）有限公司 | Protecting circuit to remove antenna effect of active shielding layer |
| CN105404739A (en) * | 2015-11-19 | 2016-03-16 | 重庆大学 | CMOS (Complementary Metal Oxide Semiconductor) on-chip constantly stable ID generating circuit based on asymmetric antenna effect |
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Effective date of registration: 20200914 Address after: 518000 no.1207, building 4, Meidu community, Meilin street, Futian District, Shenzhen City, Guangdong Province Patentee after: Shenzhen Huashi Intelligent Technology Co., Ltd Address before: 518000, Shenzhen, Guangdong, Futian District Futian street, China Road, excellent Merlin Center Plaza (North District) 4, 1206 Patentee before: CHINA VISION MICROELECTRONIC Co.,Ltd. |