CN106067821A - The protection circuit of a kind of high-speed buffer and its implementation - Google Patents

The protection circuit of a kind of high-speed buffer and its implementation Download PDF

Info

Publication number
CN106067821A
CN106067821A CN201610572272.8A CN201610572272A CN106067821A CN 106067821 A CN106067821 A CN 106067821A CN 201610572272 A CN201610572272 A CN 201610572272A CN 106067821 A CN106067821 A CN 106067821A
Authority
CN
China
Prior art keywords
circuit
source
operating point
input
current path
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201610572272.8A
Other languages
Chinese (zh)
Other versions
CN106067821B (en
Inventor
谭昭禹
蒋奇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Chengdu Bosiwei Technology Co Ltd
Original Assignee
Chengdu Bosiwei Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Chengdu Bosiwei Technology Co Ltd filed Critical Chengdu Bosiwei Technology Co Ltd
Priority to CN201610572272.8A priority Critical patent/CN106067821B/en
Publication of CN106067821A publication Critical patent/CN106067821A/en
Application granted granted Critical
Publication of CN106067821B publication Critical patent/CN106067821B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/18Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging
    • H03M1/181Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging in feedback mode, i.e. by determining the range to be selected from one or more previous digital output values

Abstract

The invention discloses protection circuit and its implementation of a kind of high-speed buffer; circuit includes that testing circuit, operating point protection circuit, many power supply electrifyings testing circuit, clamp circuit, the first main current path switch, the second main current path switch are set up in operating point; testing circuit is set up in operating point, is used for detecting whether normal operating point is set up;Operating point protection circuit, before setting up at normal working point, makes MOSFET without departing from pressure scope;Many power supply electrifyings testing circuit, the most normally powers on for detecting many power supplys of association;Many power supply electrifyings testing circuit, is used for detecting many power supplys and the most all completes to power on.Can ensure that high-speed buffer before operating point has been set up and before many power supply electrifyings complete, its source is pressure not over pressure scope with each port of MOSFET pipe.

Description

The protection circuit of a kind of high-speed buffer and its implementation
Technical field
The present invention relates to protection circuit and its implementation of a kind of high-speed buffer.
Background technology
Owing to high-speed AD converter (abbreviation high-speed ADC) is when carrying out sampling/keeping switching, corresponding input impedance is poor Away from relatively big, this gap will cause when switching, and high-speed ADC carries out temporary impact to outside passive impedance matching network, punching Hit intensity is directly related with input signal, ultimately causes high-speed ADC and connected its on same impedance matching network The performance of his transducer or signal processor produces bigger decline.
In order to solve the problems referred to above, introduce high-speed buffer, be used for isolating ADC kernel and external passive impedance matching net Network.For high performance high-speed buffer, it is good that design requires that it both must have in the input signal swing range specified Isolation, must have the most again high bandwidth to help it will impact in specifying the sampling time when driving ADC kernel The error brought is down to minimum.Along with the progress of integrated circuit technology, the MOSFET of less technique live width can be used to same Time meet the requirement in terms of the two, but the MOSFET of less technique live width also has unavoidable problem, that is, lower Pressure, when use this MOSFET time, it is necessary to make it be operated in the pressure scope that can bear.But at many Power Management Designs Time, owing to the power-up speeds of different electrical power can not be accomplished completely the same, even under same power domain, building of normal working point Stand and be likely to have long process, without protection circuit, will bear super between each pole of MOSFET in power up Go out the voltage difference of tolerance range and cause damaging.
Summary of the invention
It is an object of the invention to overcome in prior art power up owing to operating point is set up and during many power supply electrifyings Between inconsistent caused MOSFET beyond the deficiency of pressure scope, it is provided that the protection circuit of a kind of high-speed buffer and realization thereof Method.
It is an object of the invention to be achieved through the following technical solutions: the protection circuit of a kind of high-speed buffer, its bag Include operating point set up testing circuit, operating point protection circuit, many power supply electrifyings testing circuit, clamp circuit, the first principal current lead to Way switch, the second main current path switch, and operating point is set up the input of testing circuit and is connected with input service point, and operating point is built The outfan of vertical testing circuit respectively with input and first end of the first main current path switch of operating point protection circuit Connecting, the drain electrode of the outfan of operating point protection circuit, the second end of the first main current path switch and the first metal-oxide-semiconductor connects, First end of the first main current path switch is also connected with the first supply voltage, and the grid of the first metal-oxide-semiconductor is with input service point even Connecing, the source electrode of the first metal-oxide-semiconductor is connected with the first end of the outfan of clamp circuit, the second main current path switch, the second main electricity Second end ground connection of circulation flow path switch;The input of described many power supply electrifyings testing circuit and the first supply voltage and the second electricity Source voltage connects, the first end that the outfan of many power supply electrifyings testing circuit switchs with the second main current path, clamp circuit Input connects.
Described protection circuit also include the first biasing circuit, the second biasing circuit, the 3rd biasing circuit, load circuit and First current source;First end of the first main current path switch is connected by the first biasing circuit and the first supply voltage, and first The source electrode of metal-oxide-semiconductor is connected by the first end of the second biasing circuit and the second main current path switch, and the second main current path is opened The second end and the first current source connection closed, the other end ground connection of the first current source, the source electrode of the first metal-oxide-semiconductor also with load circuit Connecting, the input of load circuit is connected with second source voltage, and the input of the 3rd biasing circuit is connected with input service point.
Described operating point is set up testing circuit and is included comparator, the first input end input predeterminated voltage of comparator, the Two inputs connect input service point, and the first end of the outfan of comparator and the 3rd switch connects, the output of comparator simultaneously The first end also by switching with the first main current path after a phase inverter is held to be connected.
Described operating point protection circuit include the second current source, source with PMOSFET pipe and the 3rd switch, source with The grid of PMOSFET pipe is connected with the second input of comparator, and source is with the source electrode of PMOSFET pipe and the first end of the 3rd switch Connecting with the second current source, the other end of the second current source and the first supply voltage connect, and source connects with the drain electrode of PMOSFET pipe Ground, the second end of the 3rd switch and the second end of the second main current path switch connect.
Described many power supply electrifyings testing circuit include the first resistance, the second resistance, the 3rd metal-oxide-semiconductor, the 4th metal-oxide-semiconductor and or Not gate, the grid of the 3rd metal-oxide-semiconductor is connected with second source voltage, source ground, drain with the first resistance, nor gate first defeated Entering end to connect, the other end of the first resistance and the first supply voltage connect;The grid of the 4th metal-oxide-semiconductor and the first supply voltage are even Connecing, source ground, drain electrode is connected with the second input of the second resistance, nor gate, the other end of the second resistance and second source Voltage connects.
The implementation method of the protection circuit of a kind of high-speed buffer, it includes setting up relevant protection to operating point and with many Protection two parts that power supply electrifying is relevant, the separate operation of two parts;
The described protection relevant to operating point foundation comprises the steps:
S11: operating point is set up testing circuit and is compared with the voltage preset by input service point input comparator, when input work When making point voltage value less than preset voltage value, operating point testing circuit is thought that input service point voltage has not set up, and is redirected Step S12, on the contrary then set up, under setting up completion status, operating point protection circuit is closed, and the 3rd switches off, and first Main current path switch Guan Bi;
S12: operating point is set up testing circuit and is sent the protection circuit unlatching of control signal control operating point, and makes the 3rd switch close Closing, the first main current path switches off;
When S13: operating point protection circuit is opened, making VD1=VG1+VTH2, wherein VD1 is the drain voltage of the first metal-oxide-semiconductor, VG1 Being the first metal-oxide-semiconductor grid voltage, VTH2 is the source threshold voltage with PMOSFET pipe;
S14: after operating point protection circuit is opened, if input service point is higher than predeterminated voltage, operating point testing circuit is thought Quiescent potential has been set up, and control protection electric circuit is closed simultaneously, returns to set up completion status described in S11;
The described protection relevant to many power supply electrifyings comprises the steps:
S21: many power supply electrifyings testing circuit detects multiple power supplys and has the most all powered on, if multiple power supply is the most all Having powered on, many power supply electrifyings testing circuit thinks that power supply has the most all powered on, and jump procedure S22, on the contrary then all on Electricity completes, and when all having powered on, clamp circuit turns off, the second main current path switch Guan Bi;
S22: many power supply electrifyings testing circuit makes to be used in buffer providing electric current for main current path by sending control signal First current source disconnects, and namely the second main current path is switched off, and clamp circuit is opened simultaneously, by buffer output pincers Position is in specified level;
S23: after many power supply electrifyings protection circuit is opened, if all power supplys have all powered on, circuit will return in S21 The whole completion statuses that power on described.
3rd switch Guan Bi when described operating point protection circuit is opened, the first main current path switches off, and now the The drain voltage of one metal-oxide-semiconductor is determined with the source voltage of PMOSFET pipe by source, owing to source is with PMOSFET pipe and the second current source Being connected, source makes VD1=VG1+VTH2 with PMOSFET pipe.
When described many power supply electrifyings testing circuit detects, only all go up when the first supply voltage and second source voltage When electricity completes, nor gate first input end and the second input are low level simultaneously, and nor gate is output as height.
The invention has the beneficial effects as follows: the invention provides a kind of high-speed buffer protection circuit and its implementation, its Including the protection scheme of following two different situations in reply circuit work, make in circuit the MOSFET of minimum feature in both Will not be owing to damaging beyond pressure scope under state.
1., when the operating point of high-speed buffer has been not set up, protection MOSFET avoids it to exceed pressure scope;
2., when using many Power Management Designs, when many power supplys have the most all powered on, it is pressure that protection MOSFET avoids it to exceed Scope.
Accompanying drawing explanation
Fig. 1 is the protection circuit structure chart of high-speed buffer;
Fig. 2 is that testing circuit is set up in operating point and protection circuit structure chart is set up in operating point;
Fig. 3 many power supply electrifyings testing circuit structure chart.
Detailed description of the invention
Technical scheme is described in further detail below in conjunction with the accompanying drawings, but protection scope of the present invention is not limited to The following stated.
As it is shown in figure 1, the protection circuit of a kind of high-speed buffer, it includes that testing circuit is set up in operating point, operating point is protected Protection circuit, many power supply electrifyings testing circuit, clamp circuit, the first main current path switch SW1, the second main current path switch SW2, operating point sets up the input of testing circuit and is connected with input service point, and the outfan of testing circuit is set up respectively in operating point It is connected with the input of operating point protection circuit and first end of the first main current path switch SW1, operating point protection circuit Outfan, the drain electrode connection of the second end and the first metal-oxide-semiconductor M1 of the first main current path switch SW1, the first main current path First end of switch SW1 is also connected with the first supply voltage VDD1, and the grid of the first metal-oxide-semiconductor M1 is connected with input service point, the The source electrode of one metal-oxide-semiconductor M1 is connected with the first end of the outfan of clamp circuit, the second main current path switch SW2, the second main electricity The second end ground connection of circulation flow path switch SW2;The input of described many power supply electrifyings testing circuit and the first supply voltage VDD1 Connecting with second source voltage VDD2, the outfan of many power supply electrifyings testing circuit and the second main current path switch the of SW2 One end, the input of clamp circuit connect.
Described protection circuit also include the first biasing circuit, the second biasing circuit, the 3rd biasing circuit, load circuit and First current source idc1;First end of the first main current path switch SW1 is by the first biasing circuit and the first supply voltage VDD1 connects, and the source electrode of the first metal-oxide-semiconductor M1 is by first end of the second biasing circuit and the second main current path switch SW2 even Connecing, the second end and the first current source idc1 of the second main current path switch SW2 connect, another termination of the first current source idc1 Ground, the source electrode of the first metal-oxide-semiconductor M1 is also connected with load circuit, and the input of load circuit is connected with second source voltage VDD2, The input of the 3rd biasing circuit is connected with input service point.
As in figure 2 it is shown, testing circuit is set up in described operating point includes comparator CMP, the first input end of comparator CMP Input predeterminated voltage V1, the second input connects input service point, the outfan of comparator CMP and the first of the 3rd switch SW3 End connects, and the outfan of comparator CMP switchs first end of SW1 also by after a phase inverter with the first main current path simultaneously Connect.
Described operating point protection circuit includes that the second current source idc2, source are with PMOSFET pipe M2 and the 3rd switch SW3, source is connected with second input of comparator CMP with the grid of PMOSFET pipe M2, source with PMOSFET pipe M2 source electrode with First end and the second current source idc2 of the 3rd switch SW3 connect, the other end of the second current source idc2 and the first supply voltage VDD1 connects, and source is with the grounded drain of PMOSFET pipe M2, second end of the 3rd switch SW3 and the second main current path switch SW2 Second end connect.
As it is shown on figure 3, described many power supply electrifyings testing circuit includes the first resistance R0, the second resistance R1, the 3rd metal-oxide-semiconductor M3, the 4th metal-oxide-semiconductor M4 and nor gate NOR1, the grid of the 3rd metal-oxide-semiconductor M3 is connected with second source voltage VDD2, source ground, Drain electrode is connected with the first resistance R0, the first input end of nor gate NOR1, the other end of the first resistance R0 and the first supply voltage VDD1 connects;The grid of the 4th metal-oxide-semiconductor M4 and the first supply voltage VDD1 connect, source ground, drain electrode and the second resistance R1 or Second input of not gate NOR1 connects, and the other end of the second resistance R1 is connected with second source voltage idc2.
The implementation method of the protection circuit of a kind of high-speed buffer, it includes setting up relevant protection to operating point and with many Protection two parts that power supply electrifying is relevant, the separate operation of two parts;
The described protection relevant to operating point foundation comprises the steps:
S11: operating point is set up testing circuit and is compared with the voltage preset by input service point input comparator, when input work When making point voltage value less than preset voltage value, operating point testing circuit is thought that input service point voltage has not set up, and is redirected Step S12, on the contrary then set up, and under setting up completion status, operating point protection circuit is closed, and the 3rd switch SW3 disconnects, the One main current path switch SW1 Guan Bi;
S12: operating point is set up testing circuit and is sent the protection circuit unlatching of control signal control operating point, and makes the 3rd switch SW3 closes, and the first main current path switch SW1 disconnects;
When S13: operating point protection circuit is opened, making VD1=VG1+VTH2, wherein VD1 is the drain voltage of the first metal-oxide-semiconductor M1, VG1 is the first metal-oxide-semiconductor M1 grid voltage, and VTH2 is the source threshold voltage with PMOSFET pipe M2;
S14: after operating point protection circuit is opened, if input service point is higher than predeterminated voltage, operating point testing circuit is thought Quiescent potential has been set up, and control protection electric circuit is closed simultaneously, returns to set up completion status described in S11;
The described protection relevant to many power supply electrifyings comprises the steps:
S21: many power supply electrifyings testing circuit detects multiple power supplys and has the most all powered on, if multiple power supply is the most all Having powered on, many power supply electrifyings testing circuit thinks that power supply has the most all powered on, and jump procedure S22, on the contrary then all on Electricity completes, and when all having powered on, clamp circuit turns off, the second main current path switch SW2 Guan Bi;
S22: many power supply electrifyings testing circuit makes to be used in buffer providing electric current for main current path by sending control signal First current source idc1 disconnects, and is namely disconnected by the second main current path switch SW2, and clamp circuit is opened simultaneously, will buffering Device output clamper is in specified level;
S23: after many power supply electrifyings protection circuit is opened, if all power supplys have all powered on, circuit will return in S21 The whole completion statuses that power on described.
3rd switch SW3 Guan Bi when described operating point protection circuit is opened, the first main current path switch SW2 disconnects, Now the drain voltage of the first metal-oxide-semiconductor M1 is determined, owing to source is with PMOSFET pipe M2 with the source voltage of PMOSFET pipe M2 by source Being connected with the second current source idc2, source makes VD1=VG1+VTH2 with PMOSFET pipe M2.
When described many power supply electrifyings testing circuit detects, only when the first supply voltage VDD1 and second source voltage When VDD2 has been both powered up, nor gate NOR1 first input end and the second input are low level simultaneously, and nor gate is output as height.

Claims (8)

1. the protection circuit of a high-speed buffer, it is characterised in that: it includes that testing circuit, operating point protection are set up in operating point Circuit, many power supply electrifyings testing circuit, clamp circuit, the first main current path switch, the second main current path switch, operating point The input setting up testing circuit is connected with input service point, and operating point is set up the outfan of testing circuit and protected with operating point respectively First end of the input of protection circuit and the first main current path switch connects, the outfan of operating point protection circuit, first The drain electrode of the second end and first metal-oxide-semiconductor of main current path switch connects, and the first end that the first main current path switchs is also with the One supply voltage connects, and the grid of the first metal-oxide-semiconductor is connected with input service point, and the source electrode of the first metal-oxide-semiconductor is defeated with clamp circuit Go out end, the first end of the second main current path switch connects, the second end ground connection of the second main current path switch;Described is the most electric The input of source power on detection circuit and the first supply voltage and second source voltage connect, many power supply electrifyings testing circuit defeated Go out end to be connected with the first end, the input of clamp circuit of the second main current path switch.
The protection circuit of a kind of high-speed buffer the most according to claim 1, it is characterised in that: described protection circuit is also Including the first biasing circuit, the second biasing circuit, the 3rd biasing circuit, load circuit and the first current source;First principal current is led to First end of way switch is connected by the first biasing circuit and the first supply voltage, and the source electrode of the first metal-oxide-semiconductor is by the second biasing First end of circuit and the second main current path switch connects, and the second end of the second main current path switch and the first current source are even Connecing, the other end ground connection of the first current source, the source electrode of the first metal-oxide-semiconductor is also connected with load circuit, the input of load circuit with Second source voltage connects, and the input of the 3rd biasing circuit is connected with input service point.
The protection circuit of a kind of high-speed buffer the most according to claim 1, it is characterised in that: described operating point is set up Testing circuit includes comparator, the first input end input predeterminated voltage of comparator, and the second input connects input service point, than The outfan of relatively device and the 3rd switch first end connect, simultaneously the outfan of comparator also by after a phase inverter with first First end of main current path switch connects.
The protection circuit of a kind of high-speed buffer the most according to claim 1, it is characterised in that: described operating point protection Circuit include the second current source, source with PMOSFET pipe and the 3rd switch, source with PMOSFET pipe grid and comparator the Two inputs connect, and source connects with the first end of the 3rd switch and the second current source with the source electrode of PMOSFET pipe, the second current source The other end and the first supply voltage connect, source with the grounded drain of PMOSFET pipe, the second end of the 3rd switch and the second main electricity Second end of circulation flow path switch connects.
The protection circuit of a kind of high-speed buffer the most according to claim 1, it is characterised in that: described many power supply electrifyings Testing circuit includes the first resistance, the second resistance, the 3rd metal-oxide-semiconductor, the 4th metal-oxide-semiconductor and nor gate, the grid of the 3rd metal-oxide-semiconductor and Two supply voltages connect, source ground, and drain electrode is connected with the first input end of the first resistance, nor gate, another of the first resistance End is connected with the first supply voltage;The grid of the 4th metal-oxide-semiconductor and the first supply voltage connect, source ground, drain electrode and the second electricity Resistance, the second input of nor gate connect, and the other end of the second resistance is connected with second source voltage.
6. the implementation method of the protection circuit of a kind of high-speed buffer as described in any one in claim 1-5, its feature Being, it includes setting up relevant protection and protection two parts relevant with many power supply electrifyings to operating point, and two parts are the most only Vertical operation;
The described protection relevant to operating point foundation comprises the steps:
S11: operating point is set up testing circuit and is compared with the voltage preset by input service point input comparator, when input work When making point voltage value less than preset voltage value, operating point testing circuit is thought that input service point voltage has not set up, and is redirected Step S12, on the contrary then set up, under setting up completion status, operating point protection circuit is closed, and the 3rd switches off, and first Main current path switch Guan Bi;
S12: operating point is set up testing circuit and is sent the protection circuit unlatching of control signal control operating point, and makes the 3rd switch close Closing, the first main current path switches off;
When S13: operating point protection circuit is opened, making VD1=VG1+VTH2, wherein VD1 is the drain voltage of the first metal-oxide-semiconductor, VG1 Being the first metal-oxide-semiconductor grid voltage, VTH2 is the source threshold voltage with PMOSFET pipe;
S14: after operating point protection circuit is opened, if input service point is higher than predeterminated voltage, operating point testing circuit is thought Quiescent potential has been set up, and control protection electric circuit is closed simultaneously, returns to set up completion status described in S11;
The described protection relevant to many power supply electrifyings comprises the steps:
S21: many power supply electrifyings testing circuit detects multiple power supplys and has the most all powered on, if multiple power supply is the most all Having powered on, many power supply electrifyings testing circuit thinks that power supply has the most all powered on, and jump procedure S22, on the contrary then all on Electricity completes, and when all having powered on, clamp circuit turns off, the second main current path switch Guan Bi;
S22: many power supply electrifyings testing circuit makes to be used in buffer providing electric current for main current path by sending control signal First current source disconnects, and namely the second main current path is switched off, and clamp circuit is opened simultaneously, by buffer output pincers Position is in specified level;
S23: after many power supply electrifyings protection circuit is opened, if all power supplys have all powered on, circuit will return in S21 The whole completion statuses that power on described.
The implementation method of the protection circuit of a kind of high-speed buffer the most according to claim 6, it is characterised in that: described 3rd switch Guan Bi when operating point protection circuit is opened, the first main current path switches off, now the drain electrode electricity of the first metal-oxide-semiconductor Pressing and determined with the source voltage of PMOSFET pipe by source, owing to source is connected with PMOSFET pipe and the second current source, source is with PMOSFET Pipe makes VD1=VG1+VTH2.
The implementation method of the protection circuit of a kind of high-speed buffer the most according to claim 6, it is characterised in that: described When many power supply electrifyings testing circuit detects, only when the first supply voltage and second source voltage have been both powered up or non- Door first input end and the second input are low level simultaneously, and nor gate is output as height.
CN201610572272.8A 2016-07-20 2016-07-20 Protection circuit of high-speed buffer and implementation method thereof Active CN106067821B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201610572272.8A CN106067821B (en) 2016-07-20 2016-07-20 Protection circuit of high-speed buffer and implementation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201610572272.8A CN106067821B (en) 2016-07-20 2016-07-20 Protection circuit of high-speed buffer and implementation method thereof

Publications (2)

Publication Number Publication Date
CN106067821A true CN106067821A (en) 2016-11-02
CN106067821B CN106067821B (en) 2023-04-14

Family

ID=57207567

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201610572272.8A Active CN106067821B (en) 2016-07-20 2016-07-20 Protection circuit of high-speed buffer and implementation method thereof

Country Status (1)

Country Link
CN (1) CN106067821B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107395170A (en) * 2017-08-18 2017-11-24 无锡力芯微电子股份有限公司 Power selection circuit

Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001345687A (en) * 2000-06-02 2001-12-14 Hitachi Ltd Semiconductor switching device driving circuit
JP2003069410A (en) * 2001-08-29 2003-03-07 Fujitsu Ltd Input output buffer circuit
JP2004119842A (en) * 2002-09-27 2004-04-15 Mitsubishi Electric Corp Drive circuit for power semiconductor device
US20060197594A1 (en) * 2005-02-25 2006-09-07 Stmicroelectronics S.R.L. Protection of output stage transistor of an RF power amplifier
US20080136466A1 (en) * 2006-12-06 2008-06-12 Rohm Co., Ltd. Semiconductor Integrated Circuit Driving External FET and Power Supply Incorporating the Same
US20090051427A1 (en) * 2007-08-20 2009-02-26 Rohm Co., Ltd. Output limiting circuit, class d power amplifier and audio equipment
JP2009071370A (en) * 2007-09-10 2009-04-02 Yazaki Corp Overcurrent protection apparatus
CN201528193U (en) * 2009-06-08 2010-07-14 苏州赛芯电子科技有限公司 Intelligent switch for battery protection
CN103575964A (en) * 2012-07-19 2014-02-12 快捷半导体(苏州)有限公司 Over-current detection circuit and method for power switch tube
JPWO2012066839A1 (en) * 2010-11-17 2014-05-12 株式会社日立製作所 High frequency amplifier, high frequency module using the same, and radio
CN105445608A (en) * 2015-11-30 2016-03-30 深圳市英威腾电气股份有限公司 SIC MOSFET over-current short-circuit detection circuit and detection protection system
CN205883204U (en) * 2016-07-20 2017-01-11 成都博思微科技有限公司 Protection circuit of high -speed buffer

Patent Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001345687A (en) * 2000-06-02 2001-12-14 Hitachi Ltd Semiconductor switching device driving circuit
JP2003069410A (en) * 2001-08-29 2003-03-07 Fujitsu Ltd Input output buffer circuit
JP2004119842A (en) * 2002-09-27 2004-04-15 Mitsubishi Electric Corp Drive circuit for power semiconductor device
US20060197594A1 (en) * 2005-02-25 2006-09-07 Stmicroelectronics S.R.L. Protection of output stage transistor of an RF power amplifier
US20080136466A1 (en) * 2006-12-06 2008-06-12 Rohm Co., Ltd. Semiconductor Integrated Circuit Driving External FET and Power Supply Incorporating the Same
US20090051427A1 (en) * 2007-08-20 2009-02-26 Rohm Co., Ltd. Output limiting circuit, class d power amplifier and audio equipment
JP2009071370A (en) * 2007-09-10 2009-04-02 Yazaki Corp Overcurrent protection apparatus
CN201528193U (en) * 2009-06-08 2010-07-14 苏州赛芯电子科技有限公司 Intelligent switch for battery protection
JPWO2012066839A1 (en) * 2010-11-17 2014-05-12 株式会社日立製作所 High frequency amplifier, high frequency module using the same, and radio
CN103575964A (en) * 2012-07-19 2014-02-12 快捷半导体(苏州)有限公司 Over-current detection circuit and method for power switch tube
CN105445608A (en) * 2015-11-30 2016-03-30 深圳市英威腾电气股份有限公司 SIC MOSFET over-current short-circuit detection circuit and detection protection system
CN205883204U (en) * 2016-07-20 2017-01-11 成都博思微科技有限公司 Protection circuit of high -speed buffer

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
GIANLUIGIDE GERONIMO 等: "Analog CMOS peak detect and hold circuits. Part 1. Analysis of the classical configuration", 《NUCLEAR INSTRUMENTS AND METHODS IN PHYSICS RESEARCH SECTION A: ACCELERATORS, SPECTROMETERS, DETECTORS AND ASSOCIATED EQUIPMENT》 *
孙柴成 等: "四旋翼无人飞行器驱动系统设计与性能测试", 《机电工程》 *
陈贤: "基于PI Expert软件的LED驱动电源设计", 《电子技术与软件工程》 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107395170A (en) * 2017-08-18 2017-11-24 无锡力芯微电子股份有限公司 Power selection circuit

Also Published As

Publication number Publication date
CN106067821B (en) 2023-04-14

Similar Documents

Publication Publication Date Title
CN105391279B (en) For the system and method containing normal conducting transistor and the switch of normally-off transistor
CN105244195B (en) Method and apparatus for protective switch and the mems switch including the protective device
CN101447691B (en) Commutation circuit of external power supply and battery and control method thereof
CN105048791B (en) Power tube control system and the external power tube drive circuit for Switching Power Supply
CN203481783U (en) Short circuit and overcurrent protection circuit and mass production test equipment
CN103490374A (en) Mass production test device and short-circuit current foldback circuit thereof
CN102213993A (en) Circuit for soft startup and soft shutdown
WO2019042334A1 (en) Power switching system and method
CN105186444A (en) Power supply protection circuit
CN207321572U (en) SiC Mosfet hyperfrequency drive circuits
CN104578742B (en) A kind of soft-start circuit
US9136698B2 (en) Power supply selector and method for minimizing an inrush current in a power supply selector
CN106067821A (en) The protection circuit of a kind of high-speed buffer and its implementation
CN104300946B (en) A kind of quick power down modul of low-voltage equipment
CN205883204U (en) Protection circuit of high -speed buffer
CN101873346B (en) Remote on-off control system
CN107210296A (en) Self-inductance measurement reverse-current protection is switched
CN114667656B (en) Hybrid circuit breaker, hybrid circuit breaking system and circuit breaking method
WO2020147765A1 (en) Method and apparatus for rapidly switching static transfer switch, storage medium, and terminal device
CN105990900A (en) Redundancy power control circuit and redundancy power supplying system using same
CN104065156B (en) A kind of input wires device that intersects in parallel of 2N power-supply system
CN105929744A (en) Power on/off circuit and household electrical appliance
CN109510483A (en) A kind of circuit of synchronous rectification, charger and circuit of synchronous rectification control method
CN205644429U (en) Supply circuit of polydisc position hard disk
CN101807905A (en) Drive circuit of deplete semiconductor switching element and drive method thereof

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
CB02 Change of applicant information
CB02 Change of applicant information

Address after: 610000 No. 508, floor 5, building 1, No. 3, Gaopeng Avenue, hi tech Zone, Chengdu City, Sichuan Province

Applicant after: CHENGDU BOSIWEI TECHNOLOGY Co.,Ltd.

Address before: High tech Zone Gaopeng road in Chengdu city of Sichuan province 610000 No. 3 Building 1 8 floor No. 812

Applicant before: CHENGDU BOSIWEI TECHNOLOGY Co.,Ltd.

CB02 Change of applicant information
CB02 Change of applicant information

Address after: 610000 No. 202, floor 2, building 4, No. 88, Keyuan South Road, high tech Zone, Chengdu, Sichuan

Applicant after: CHENGDU BOSIWEI TECHNOLOGY Co.,Ltd.

Address before: No. 508, 5th floor, building 1, No. 3, Gaopeng Avenue, high tech Zone, Chengdu, Sichuan 610000

Applicant before: CHENGDU BOSIWEI TECHNOLOGY Co.,Ltd.

GR01 Patent grant
GR01 Patent grant