CN106054711A - Intelligent control system for restaurant - Google Patents
Intelligent control system for restaurant Download PDFInfo
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- CN106054711A CN106054711A CN201610447797.9A CN201610447797A CN106054711A CN 106054711 A CN106054711 A CN 106054711A CN 201610447797 A CN201610447797 A CN 201610447797A CN 106054711 A CN106054711 A CN 106054711A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/24—Pc safety
- G05B2219/24215—Scada supervisory control and data acquisition
Abstract
The invention relates to an intelligent control system for restaurants, which comprises a plurality of electric appliance controllers and a main controller, wherein cycle screening circuits are respectively arranged in the main controller and each electric appliance controller and used for generating synchronous time of the system to keep the system action consistent, the output of each electric appliance controller is connected to an original socket or switch in series, the control of power and time is realized, the design is convenient to change, and wall breaking and wiring are not needed. The master controller communicates with the store owner via a telephone network.
Description
(1) technical field:
The present invention relates to a kind of eating and drinking establishment intelligent control system, comprise multiple appliance controller and a main controller, main
Control device and each appliance controller are respectively mounted cycle discriminator circuit, keep system acting one for producing the lock in time of system
Causing, the output of each appliance controller is all serially connected with on former socket or switch, it is achieved power and the control of time, changes design side
Just, wall paper line need not be broken.Main controller is communicated with storekeeper by telephone network.
(2) background technology:
Thered is provided the control system of power supply by power network, its each electronic equipment or intermodule are all to be communicated by special circuit,
Correct the timing time of each electronic equipment or electronic module, reach to run simultaneously purpose.Owing to using special circuit communication to make
Wiring complicates and increases cost, if timing time is not corrected by line traffic, then due to tradition timing error, runs number
After hour, its accumulation timing error can make system control action inconsistent, is likely to result in system crash, often changes at some and sets
Meter, its products application of occasion that wiring installation amount is big is restricted.
(3) summary of the invention:
The present invention relates to eating and drinking establishment's intelligent control system, comprise multiple appliance controller and a main controller.In the winter time
Or mobile phone can be used to open water heater in advance for shopkeeper in summer or air-conditioning is easy to wash rapidly dish and reception client.Each appliance controller
Panel, equipped with 3 to 5 LED modules with different colors, is first numbered before access system.During the appliance controller one section of setting after just start
Between, sequentially show that LED modules with different colors combines (such as: red, green, blue, red indigo plant green, bluish-green, red, RGB), each combination all with volume
Number number corresponding, when selecting display LED modules with different colors combination, shutdown obtains corresponding numbering and preserves, and labeling know can
Checking verification mark, it is that single-chip microcomputer relies on the storage of its power capacitor in the numbering period when can't detect grid cyclic wave signal
Numbering data can be stored in nonvolatile storage.On eating and drinking establishment's main switchboard, miniature circuit breaker comprises multichannel independent air and opens
Closing, it is guide tracked installation and presser type wiring reconfiguration convenience, and each air switch controls a road electric equipment load, such as
Socket, illumination are a road electric equipment load etc., select an air switch, fill an electrical switch after air switch,
This electrical switch parallel connection isolating diode, during communication, main controller turns off electrical switch and connects its communications electronics switch, by civil power
Sending into system through isolating diode, system uses half wave communication and half-wave through electric lines of force to power.Main controller and each electrical equipment control
Device is respectively mounted cycle discriminator circuit, keeps the lock in time of system system acting consistent for producing, simultaneously at its communication electricity
One communications electronics switch, switch drive module of each installation in road.The output of each appliance controller is through Phototube Coupling and two-way
Controllable silicon is serially connected with in former socket or on-off circuit, it is achieved power and the control of time, and it is convenient to change design, need not break wall
Wiring.Main controller communicate with storekeeper by telephone network, and main controller is at setting time or the mobile phone short message instructions that receives, and needs are partly
During wave communication, i.e. perform the switching action from all-wave to half-wave.When each appliance controller set half-wave call duration time or and
Detecting that power network is isolated half-wave that diode blocks when not having signal, system is in half-wave state, i.e. cuts off its electrical equipment and sets
Standby load power source, is then turn on communications electronics switch；Otherwise, when switching to all-wave from half-wave, main controller is first to each electrical equipment
Controller sends switching command, turns off communications electronics switch, connects appliances power source.
Communication is by controlling lock in time to keep keeping strokes.The communications electronics switch of each appliance controller and main controller
Switch drive module be from electric power netting twine after resistance blood pressure lowering, isolate after cycle bears half-wave further through just connecing diode, connect
In comparator input terminal, its reference voltage is 100Mv to 200Mv, and available diode drop obtains through electric resistance partial pressure, therefore than
The outfan of relatively device is square-wave signal, and it creates corresponding power network cycle after the isolating diode just connect and bears the pros of half-wave
Ripple signal, is connected to the I/O mouth of respective single-chip microcomputer, and single-chip microcomputer performs traffic operation when scanning positive square-wave signal, and this positive square wave is believed
Number being additionally operable to drive communications electronics switch, therefore communications electronics switch turns off when cycle positive half-wave, and cycle is connected when bearing half-wave.
Communications electronics switch is connected to single-chip microcomputer corresponding port according to used communication mode, and carries out signal condition, is leading during sign off
Under control device controls, drive circuit is made to turn off communications electronics switch.
A babyphone programme-controlled exchange is installed by eating and drinking establishment, and one of them extension number is used for appliance remote control.This extension set
Number and the synopsis of instruction code and instruction be saved in mobile phone, and prevent the data of instruction code from letting out by methods such as screen locking passwords
Close.During communication, owner sends the numeral of instruction code from base or mobile phone, and switch is decoded by dual-tone multifrequency after caller is dialled
After device obtains this extension set calling telephone number, simulate off-hook, and keep dual-tone multifrequency to receive state, to receive instruction code letter
Number, as sent out with mobile phone: " switch telephone number " P " numeral of instruction code ", wherein " P " can pin mobile phone simulating keyboard
* key obtain, some types are to press * key to obtain for 2-3 time, or key in after waiting switch solidification voice message in the chips again
Instruction code, after sign off, switch sends, through interface circuit, the digital signal receiving instruction code to main controller, by leading
Corresponding operating is performed after control device decoding.
The present invention utilizes the positive half cycle ascent stage of power network cycle, takes three examination points and realizes sentencing the identification of cycle signal
Fixed, the recycling cycle time sets up lock in time, it is achieved main controller and the synchronous operation of each appliance controller in system.
The cycle discriminator circuit structural representation of main controller and each appliance controller is as in figure 2 it is shown, used hysteresis by three
The voltage comparator composition of comparator, all comprises filter circuit, the reference voltage of its voltage comparator in each voltage comparator
Thered is provided by mu balanced circuit.System arranges clock timer and synchrotimer.If be detected that adjacent two cycle signals are equal
It is true, then takes out the clock timer timing time between these two adjacent cycle signal zero passages, be sequentially stored in the cycle time
In memory element, this cycle time memory cell can deposit 100 cycle times, is often stored in a cycle time, all when being filled with
First remove the cycle time being stored at first, and calculate meansigma methods Tz of the cycle time being stored in and preserve, utilize Tz value to reflect
Cycle signal the most to be identified, to reduce the impact of power network frequency fluctuation, uses three to screen point simultaneously and reduces erroneous judgement probability.
Three comparators are respectively used to three and screen point, i.e. screen point 0, examination point 1, screen point 2, as shown in Figure 1.In week
At the cycle zero passage of ripple positive half cycle ascent stage, i.e. screen point 0 and voltage zero-crossing comparator is set, due to power network cycle negative half period quilt
Commutation diode is isolated, and in order to improve accuracy of detection, the signal input part series diode again in voltage zero-crossing comparator is isolated
Negative half period, its reference voltage brings up to 10mv to 100mv from zero, and depending on the offset voltage of comparator, this reference voltage can profit
Obtain through electric resistance partial pressure with diode drop.Remaining two comparator is separately positioned on cycle positive half cycle ascent stage, crest voltage
35% to 50% place screen point 1 and 50% to the 70% examination point 2 at place.
Cycle signal determining: single-chip microcomputer is had no progeny in the setting time opens, and clock timer resets and starts timing, works as cycle
During voltage zero-cross, it is arranged on the output voltage upset of voltage zero-crossing comparator V0 screening point 0, produces at its voltage trailing edge
Interrupt, record its zero crossing break period Th0 and close interruption；Hereafter, voltage comparator V1 at point 1 is screened in single-chip microcomputer scanning
Output voltage, when week, wave voltage reached the threshold voltage of V1, output voltage overturns from high to low, when scanning records its upset
Between Th1；Voltage comparator V2 output voltage Th2 flip-flop transition at point 2 screened in same scanning record.By Th0 and voltage zero-cross
Output voltage setting value Ts0 flip-flop transition of comparator V0 is made comparisons；The output voltage upset of Th1 and voltage comparator V1
Output voltage setting value Ts2 flip-flop transition of time setting value Ts1 and Th2 and voltage comparator V2 is made comparisons respectively, as
Fruit is in the range of allowable error, then this discriminator signal detected is true, is otherwise false.Above-mentioned judge discriminator signal as true time,
Calculate the clock timer meter between this cycle signal zero passage with the cycle signal zero passage that an adjacent front discriminator signal is true time
Time time Tzu, it is made comparisons with meansigma methods Tz of cycle time, if less than set cycle time error Tzv; cycle
Signal is true, at this moment preserves Tzu and takes 20ms and be added with synchrotimer timing time, and the value that will add up is stored in synchrotimer
In.
When clock timer starts timing with cycle voltage zero-cross, then timing is to opening the break period between 16ms to 18.5ms
Open interruption during setting value Tk, close during pass break period setting value Tn between clock timer timing to 25ms to 27ms and interrupt.
After system boot, clock timer starts timing, when first cycle voltage zero-cross being detected, is arranged on examination
The output voltage upset of voltage zero-crossing comparator V0 of point 0, thus produce interruption, take out the time T0 of cycle voltage over zero
Preserving, reset by clock timer and start timing, at this moment cycle time voltage crosses zero Th0 is 0, and above-mentioned side pressed by single-chip microcomputer simultaneously
Method scans and judges discriminator signal.Due to detection is first cycle, and clock timer is to start when cycle voltage zero-cross
Timing, the value of its Th0, Th1 and Th2 must deduct open the difference of break period setting value Tk plus cycle time 20ms, if
Three discriminator signals are true, i.e. for the first time open the break period next time and take Tk.It is otherwise fictitious time, now clock timer time palpus
Plus T0, continue detection.
When detecting first and during adjacent second cycle voltage zero-cross, owing to not preserving the cycle time of detection,
Therefore the clock timer timing time between twice cycle signal zero passage is to make comparisons with cycle time 20ms, it is determined that cycle signal
For true time, then take out clock timer cumulative time T1=T0+Tk when opening interruption and be stored in synchrotimer as initial time
In, clock timer of having no progeny in opening reset, otherwise judges cycle signal as fictitious time, now the clock timer time must add T1,
Continue first cycle of detection the most again.After first cycle signal of detection is very, recover above-described week
Ripple signal determining.
As it is shown in figure 1, if be detected that cycle signal is false, opens the break period and all open the break period at this next time
After, when meansigma methods Tz of time delay cycle time, open interruption, and have no progeny in opening time delay Tns time close and interrupt, pass is set when interrupting
Between be when cycle signal screen point 0 time do not produce interruption, at this moment must be at the setting time point more than Ts0 allowable error scope
Starting scanning, and scanning examination point 1 is with when screening point 2, voltage comparator output voltage does not produce upset, all interrupts in pass
Time Tns closes and interrupts and stop scanning, and Tns is:
Tns=Tn-Tk
If be detected that cycle signal is true, then next cycle is opened break period Tks and is:
Tks=Tk+Th0
I.e. from opening for the first time after the break period takes Tk, clock timer is all timing opens interruption to Tks, and weight after resetting
Newly start timing, close during timing to Tns and interrupt, so that the synchrotimer time is corrected by cycle time voltage crosses zero.
Repeat said process.If the upper cycle signal detected described in is true, and when this cycle judges, discriminator signal is
Vacation, or the cycle time detected compare with meansigma methods Tz of cycle time and exceed setting cycle time error Tzv, or clock meter
Time device timing to when closing break period setting value Tns, voltage zero-crossing comparator V0 output voltage does not overturns, in not producing
Disconnected, then close when clock timer timing to Tns and interrupt, at this moment remember that not counting cycle N is 1 and stores, when opening interruption next time
Between be to open the break period in last time after Tz, open interruption, clock timer have no progeny in opening clearing and timing, during timing to Tns
Close and interrupt, judge the cycle signal true and false the most every time, though if false or this detection discriminator signal is true last time is false, then take
N, restores after N+1 in memorizer.
When detecting that cycle signal is true time, then take out N in memorizer and preserve, and by N zero setting in memorizer, and recover to make
Using setting value Tks, the value at this moment taking (N+1) × 20ms is added in synchrotimer.
The system synchronization time is the time of synchrotimer, adds current the most just in time of clock timer of timing.
When judging to screen the some signal true and false, Th0, Th1, Th2 are by setting flip-flop transition with voltage comparator output voltage
Definite value Ts0, Ts1, Ts2 make comparisons and see the most overproof, judge to screen a some signal true and false, can select: Th0, Th1, Th2 are
This cycle discriminator signal of true time is true, or Th0 is true and one of Th1, Th2 are true time, or Th1, Th2 are true time, this week
Ripple discriminator signal is true, depending on to judging that cycle signal true and false difference requires.
If system fault, when N is more than a setting value between 25 to 70, due to main controller and each electrical equipment in system
Controller, the Tz value of its detection may be different with N value, and at this moment, power network frequency cumulative error, when being likely to result in synchrotimer
Between cannot by true cycle signal being detected time corrected, when detecting that cycle signal is true time, at this moment use clock meter
Time device accumulative clocking value be directly added in synchrotimer, to reduce the asynchronous time of system, accumulative clocking value is N × Tz
+20ms.In the case of power network normal operation, N is much smaller than 25.
The cycle time error Tzv allowed and setting value flip-flop transition of voltage comparator output voltage, by test assessment
Take its meansigma methods to obtain.
(4) accompanying drawing explanation:
Fig. 1 is that cycle screens data relationship schematic diagram；
Fig. 2 is cycle discriminator circuit structural representation；
The circuit structure block diagram of Tu3Shi eating and drinking establishment intelligent control system.
(5) detailed description of the invention:
The circuit structure block diagram of Tu3Shi eating and drinking establishment intelligent control system includes: main controller 10, communications electronics leave
Pass 11, switch drive module 12, interface circuit 13, babyphone programme-controlled exchange 14, electric equipment 15, cycle
Discriminator circuit 16, appliance controller 17, electrical switch 18, wherein communications electronics switch 11, switch drive module
12 and cycle discriminator circuit 16 and Fig. 2 in single-chip microcomputer U0 be included in appliance controller 17 and main controller 10 respectively
In, its electrical switch 11, communications electronics switch 11 use bidirectional triode thyristor is as switch, and electric equipment 15 finger is in opening
Close the original electrical equipment in circuit.
Fig. 2 is the structural representation of cycle discriminator circuit 16, by: input circuit S0, voltage zero-cross detection module
V0, voltage comparator V1 and voltage comparator V2 are constituted.Single-chip microcomputer U0 refers to appliance controller 17 and main controller
Single-chip microcomputer in 10.Input circuit S0, for mains AC voltage is passed through resistance and the dividing potential drop of diode, is converted to electricity
The input voltage that pressure comparator is the most stable.Single-chip microcomputer U0 uses 89C55WD voltage zero-cross detection module V0, voltage ratio
All using special voltage comparator LM339 compared with device V1, voltage comparator V2, its reference voltage is the steady of employing stabilivolt
Volt circuit carrys out the threshold voltage of burning voltage comparator.
When mains AC voltage cycle signal zero passage, the output voltage saltus step of voltage zero-cross detection module V0, single
Sheet machine U0 produces interruption, records the break period, and single-chip microcomputer U0 is additionally operable to scanning voltage comparator V1 and voltage ratio simultaneously
The relatively output voltage of device V2, records bound-time, is used for judging power network cycle signal thus produces when output voltage saltus step
Raw lock in time.
Microprocessor AT89C2051 in interface circuit 13 is provided with I2C serial communication module, is used for entering between main controller
Row communication, its EEPRAM is used for preserving data.During communication, select institute's palpus code from cell-phone function interface, by telephone network to little
Type telephone exchanger sends data, after main controller receives relevant character string, is translated into corresponding function and carries out
Control or communication.
Claims (2)
1. the present invention relates to eating and drinking establishment's intelligent control system, it is characterized in that, the panel of each appliance controller is equipped with 3 to 5 not
With color LED, the appliance controller one setting period after just start, when selecting display LED modules with different colors combination, shut down
To corresponding numbering and preserve, it is that single-chip microcomputer relies on its power supply in the numbering period when can't detect grid cyclic wave signal
Numbering data are stored in nonvolatile storage by the energy storage of electric capacity；An electrical switch, this electronic cutting is filled after air switch
Closing isolating diode in parallel, during communication, civil power sends into system through isolating diode, system use through electric lines of force half wave communication and
Half-wave is powered；The output of each appliance controller in Phototube Coupling and bidirectional triode thyristor are serially connected with former socket or on-off circuit,
Realize the control of power and time；Main controller and each appliance controller are respectively mounted cycle discriminator circuit, simultaneously at its communication electricity
Each in road communications electronics switch, a switch drive module are installed, when each appliance controller at the half-wave call duration time set or
And detect that power network is isolated half-wave that diode blocks when not having signal, i.e. turn off the load power source of its electric equipment, so
It is followed by all believing electrical switch；
The switch driving circuit of communications electronics switch is to isolate further through just connecing diode after resistance blood pressure lowering from electric power netting twine
After cycle bears half-wave, being connected to comparator input terminal, its reference voltage is 100Mv to 200Mv, and available diode drop is through resistance
Dividing potential drop obtains, and therefore the outfan of comparator is square-wave signal, and it creates corresponding power network after the isolating diode just connect
Cycle bears the positive square-wave signal of half-wave, is connected to the I/O mouth of respective single-chip microcomputer, and single-chip microcomputer performs communication when scanning positive square-wave signal
Operation, this positive square-wave signal is additionally operable to drive communications electronics switch,；
Eating and drinking establishment installs the synopsis of a babyphone programme-controlled exchange, this extension number and instruction code and instruction and is saved in hands
In machine, main controller is communicated with storekeeper by telephone network, and after sign off, switch will receive the digital signal of instruction code through connecing
Mouth circuit sends main controller to, main controller perform corresponding operating after decoding；
The cycle discriminator circuit of main controller and each appliance controller is made up of three voltage comparators using hysteresis loop comparator, is
System arranges clock timer and synchrotimer, if be detected that adjacent two cycle signals are very, then takes out these two
The adjacent clock timer timing time between cycle signal zero passage, is sequentially stored in cycle time memory cell, is filled with 100
Often it is stored in a cycle time during the individual cycle time, the most first removes the cycle time being stored at first, and calculate the week being stored in
Meansigma methods Tz of ripple time also preserves, and utilizes Tz value to differentiate cycle signal to be identified；
Three comparators are respectively used to three and screen point, i.e. screen point 0, examination point 1, screen point 2, in the cycle positive half cycle ascent stage
Cycle zero passage at, i.e. screen point and 0 voltage zero-crossing comparator be set, due to power network cycle negative half period be rectified diode every
From, the signal input part series diode again in voltage zero-crossing comparator isolates negative half period, and its reference voltage brings up to from zero
10mv to 100mv, depending on the offset voltage of comparator, this reference voltage may utilize diode drop and obtains through electric resistance partial pressure,
Remaining two comparator is separately positioned on the cycle positive half cycle ascent stage, examination point 1 He at 35% to 50% place of crest voltage
The examination point 2 at 50% to 70% place；
Cycle signal determining: single-chip microcomputer is had no progeny in the setting time opens, and clock timer resets and starts timing, when week wave voltage
During zero passage, it is arranged on the output voltage upset of voltage zero-crossing comparator V0 screening point 0, in its voltage trailing edge produces
Disconnected, record its zero crossing break period Th0 and close interruption；Hereafter, voltage comparator V1 defeated at point 1 is screened in single-chip microcomputer scanning
Going out voltage, when week, wave voltage reached the threshold voltage of V1, output voltage overturns from high to low, and scanning records its flip-flop transition
Th1；Same scanning record screens voltage comparator V2 output voltage Th2 flip-flop transition at point 2, if existed described flip-flop transition
In the range of allowable error, then this discriminator signal detected is true, is otherwise false, above-mentioned judges that discriminator signal, as true time, calculates
During clock timer timing between this cycle signal zero passage with the cycle signal zero passage that an adjacent front discriminator signal is true time
Between Tzu, it is made comparisons with meansigma methods Tz of cycle time, if less than set cycle time error Tzv; cycle signal
Being true, at this moment preserve Tzu and take 20ms and be added with synchrotimer timing time, the value that will add up is stored in synchrotimer,
When clock timer starts timing with cycle voltage zero-cross, then timing set to the break period of opening between 16ms to 18.5ms
Open interruption during value Tk, close during pass break period setting value Tn between clock timer timing to 25ms to 27ms and interrupt；
After system boot, clock timer starts timing, when first cycle voltage zero-cross being detected, is arranged on examination point 0
The output voltage upset of voltage zero-crossing comparator V0, thus produce interruption, the time T0 taking out cycle voltage over zero protects
Depositing, reset by clock timer and start timing, at this moment cycle time voltage crosses zero Th0 is 0, and single-chip microcomputer is as stated above simultaneously
Scanning and judge discriminator signal, the value of its Th0, Th1 and Th2 must deduct open break period setting value plus cycle time 20ms
The difference of Tk, if three discriminator signals are true, i.e. for the first time open the break period takes Tk next time, is otherwise fictitious time, and this is constantly
Clock timer periods must continue detection plus T0；
When detecting first and during adjacent second cycle voltage zero-cross, it is determined that cycle signal is true time, then take out in opening
Clock timer cumulative time T1=T0+Tk time disconnected is stored in synchrotimer as initial time, clock meter of having no progeny in opening
Time device reset, otherwise judges cycle signal as fictitious time, now the clock timer time must be plus T1, and continuation is the most again
Detect first cycle, after first cycle signal of detection is very, recover above-described cycle signal determining；
If be detected that cycle signal is false, open the break period all after this opens the break period, when time delay cycle next time
Between meansigma methods Tz time open interruption, and have no progeny in opening time delay Tns time close and interrupt, arranging the pass break period is when cycle signal exists
Screening is fictitious time, closes interruption closing break period Tns and stops scanning, and Tns is:
Tns=Tn-Tk
If be detected that cycle signal is true, then next cycle is opened break period Tks and is:
Tks=Tk+Th0
I.e. from opening for the first time after the break period takes Tk, clock timer is all timing opens interruption to Tks, and again opens after resetting
Beginning timing, closes during timing to Tns and interrupts, so that the synchrotimer time is corrected by cycle time voltage crosses zero,
Repeat said process, if described in the upper cycle signal that detects be true, when this cycle judges, discriminator signal is false,
Then closing when clock timer timing to Tns and interrupt, at this moment remember that not counting cycle N is 1 and stores, open the break period is next time
Opening the break period in last time and open interruption after Tz, clock timer is had no progeny in opening and is reset and timing, Central Shanxi Plain during timing to Tns
Disconnected, judge the cycle signal true and false the most every time, though if false or this detection discriminator signal is true last time is false, then take N, will
Restore in memorizer after N+1；
When detecting that cycle signal is true time, then take out N in memorizer and preserve, and by N zero setting in memorizer, and recover use and set
Definite value Tks, the value at this moment taking (N+1) × 20ms is added in synchrotimer；
The system synchronization time is the time of synchrotimer, adds current the most just in time of clock timer of timing；
When judging to screen the some signal true and false, select: it is true that Th0, Th1, Th2 are this cycle discriminator signal of true time, or Th0 is
Very, one of Th1, Th2 are true time simultaneously, or Th1, Th2 are true time, and this cycle discriminator signal is true, depending on to judging cycle letter
Depending on number true and false difference requires, when a setting value between N is more than 25 to 70, the accumulative clocking value using clock timer is straight
Connecing and be added in synchrotimer, to reduce the asynchronous time of system, accumulative clocking value is N × Tz+20ms.
Eating and drinking establishment the most according to claim 1 intelligent control system, it is characterised in that including:
Main controller 10, communications electronics switch 11, switch drive module 12, interface circuit 13, the program control friendship of babyphone
Change planes 14, cycle discriminator circuit 16, appliance controller 17, electrical switch 18, wherein single-chip microcomputer U0 and the electricity that communicates
Son switch 11, switch drive module 12 and cycle discriminator circuit 16 are included in appliance controller 17 and master control respectively
In device 10；
Cycle discriminator circuit 16 is by input circuit S0, voltage zero-cross detection module V0, voltage comparator V1 and voltage
Comparator V2 is constituted, and input circuit S0, for mains AC voltage is passed through resistance and the dividing potential drop of diode, is converted to
The input voltage that voltage comparator is the most stable；
Single-chip microcomputer in interface circuit 13 is provided with I2C serial communication module, is used for communicating between main controller, its
EEPRAM is used for preserving data.
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| CN101447847A (en) * | 2008-06-19 | 2009-06-03 | 张广涵 | Method for time base determination of simple and convenient multi-node synchrosystem and system thereof |
| US20120026765A1 (en) * | 2010-07-27 | 2012-02-02 | Stmicroelectronics S.R.L. | Control device of a switching power supply |
| CN102571150A (en) * | 2011-03-22 | 2012-07-11 | 张广涵 | Time-sharing communication system on basis of power grid |
| CN104684204A (en) * | 2013-10-10 | 2015-06-03 | Zf腓德烈斯哈芬股份公司 | Method and control device for operating at least one light source |
| CN104360144A (en) * | 2014-12-08 | 2015-02-18 | 广东美的环境电器制造有限公司 | Method for determining zero crossing point of alternating current signal and system for determining zero crossing point of alternating current signal |
| CN104821806A (en) * | 2015-05-12 | 2015-08-05 | 广东美的厨房电器制造有限公司 | Clock control device and control method thereof |
| CN105490262A (en) * | 2016-01-15 | 2016-04-13 | 史晓平 | System and method for load monitoring of smart home |
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| CN106054711B (en) | 2018-12-04 |
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