CN106030663B - 具有共享数据信道的着色器管线 - Google Patents

具有共享数据信道的着色器管线 Download PDF

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Publication number
CN106030663B
CN106030663B CN201580008868.9A CN201580008868A CN106030663B CN 106030663 B CN106030663 B CN 106030663B CN 201580008868 A CN201580008868 A CN 201580008868A CN 106030663 B CN106030663 B CN 106030663B
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Prior art keywords
data channel
shared data
graphics processing
processing pipeline
shared
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CN201580008868.9A
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Chinese (zh)
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CN106030663A (zh
Inventor
梅春惠
维尼特·戈尔
金东炫
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Qualcomm Inc
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Qualcomm Inc
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/60—Memory management
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T15/00—3D [Three Dimensional] image rendering
    • G06T15/005—General purpose rendering architectures
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T15/00—3D [Three Dimensional] image rendering
    • G06T15/50—Lighting effects
    • G06T15/80—Shading

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Graphics (AREA)
  • Image Processing (AREA)
  • Image Generation (AREA)
CN201580008868.9A 2014-02-18 2015-01-26 具有共享数据信道的着色器管线 Active CN106030663B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/182,976 2014-02-18
US14/182,976 US9679347B2 (en) 2014-02-18 2014-02-18 Shader pipeline with shared data channels
PCT/US2015/012917 WO2015126574A1 (en) 2014-02-18 2015-01-26 Shader pipeline with shared data channels

Publications (2)

Publication Number Publication Date
CN106030663A CN106030663A (zh) 2016-10-12
CN106030663B true CN106030663B (zh) 2018-10-30

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CN201580008868.9A Active CN106030663B (zh) 2014-02-18 2015-01-26 具有共享数据信道的着色器管线

Country Status (7)

Country Link
US (1) US9679347B2 (enExample)
EP (1) EP3108452B1 (enExample)
JP (1) JP6271768B2 (enExample)
KR (1) KR101813429B1 (enExample)
CN (1) CN106030663B (enExample)
ES (1) ES2820716T3 (enExample)
WO (1) WO2015126574A1 (enExample)

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US10460513B2 (en) * 2016-09-22 2019-10-29 Advanced Micro Devices, Inc. Combined world-space pipeline shader stages
US20180173560A1 (en) * 2016-12-21 2018-06-21 Apple Inc. Processing circuit hardware resource allocation system
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CN107613046B (zh) * 2017-08-22 2020-12-18 创新先进技术有限公司 滤镜管道系统、图像数据处理方法、装置以及电子设备
US11120603B2 (en) 2019-06-18 2021-09-14 Samsung Electronics Co., Ltd. Heavy-weight/light-weight GPU shader core pair architecture
US11508110B2 (en) 2020-02-03 2022-11-22 Sony Interactive Entertainment Inc. System and method for efficient multi-GPU rendering of geometry by performing geometry analysis before rendering
US11263718B2 (en) * 2020-02-03 2022-03-01 Sony Interactive Entertainment Inc. System and method for efficient multi-GPU rendering of geometry by pretesting against in interleaved screen regions before rendering
US12112394B2 (en) 2020-02-03 2024-10-08 Sony Interactive Entertainment Inc. System and method for efficient multi-GPU rendering of geometry by pretesting against screen regions using configurable shaders
US11514549B2 (en) 2020-02-03 2022-11-29 Sony Interactive Entertainment Inc. System and method for efficient multi-GPU rendering of geometry by generating information in one rendering phase for use in another rendering phase
US11416961B2 (en) 2020-05-29 2022-08-16 Samsung Electronics Co., Ltd. Variable entry transitional ring storage for efficiently accessing graphics states
US12175300B2 (en) 2021-08-11 2024-12-24 Apple Inc. Software control techniques for graphics hardware that supports logical slots and reservation of graphics hardware based on a priority threshold
US12190164B2 (en) 2021-08-11 2025-01-07 Apple Inc. Kickslot manager circuitry for graphics processors
US12333339B2 (en) * 2021-08-11 2025-06-17 Apple Inc. Affinity-based graphics scheduling
US12062126B2 (en) 2021-09-29 2024-08-13 Advanced Micro Devices, Inc. Load multiple primitives per thread in a graphics pipeline
US12169896B2 (en) * 2021-09-29 2024-12-17 Advanced Micro Devices, Inc. Graphics primitives and positions through memory buffers
US11941723B2 (en) * 2021-12-29 2024-03-26 Advanced Micro Devices, Inc. Dynamic dispatch for workgroup distribution

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US20060070079A1 (en) * 2004-09-08 2006-03-30 Franchuk Brian A Discarding a partially received message from a data queue
CN101438319A (zh) * 2006-05-08 2009-05-20 Ati技术无限责任公司 使用多图形处理单元的改进的图形去阶梯
US7973804B2 (en) * 2008-03-11 2011-07-05 International Business Machines Corporation Image processing with highly threaded texture fragment generation
US20110285711A1 (en) * 2010-05-21 2011-11-24 Kilgard Mark J Path rendering by covering the path based on a generated stencil buffer
US8184120B2 (en) * 2008-05-19 2012-05-22 Siemens Aktiengesellschaft Framework for processing and rendering large volume data
CN103460618A (zh) * 2011-02-07 2013-12-18 英特尔公司 开环多输入多输出（mimo）的大延迟循环延迟分集（cdd）预编码器
US20140043341A1 (en) * 2012-08-09 2014-02-13 Qualcomm Incorporated Gpu-accelerated path rendering

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US20080074429A1 (en) 2003-11-19 2008-03-27 Reuven Bakalash Multi-mode parallel graphics rendering system (MMPGRS) supporting real-time transition between multiple states of parallel rendering operation in response to the automatic detection of predetermined operating conditions
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US6911985B1 (en) * 2003-12-10 2005-06-28 Lsi Logic Corporation Method and apparatus for reducing frame buffer size in graphics systems
US20060070079A1 (en) * 2004-09-08 2006-03-30 Franchuk Brian A Discarding a partially received message from a data queue
CN101438319A (zh) * 2006-05-08 2009-05-20 Ati技术无限责任公司 使用多图形处理单元的改进的图形去阶梯
US7973804B2 (en) * 2008-03-11 2011-07-05 International Business Machines Corporation Image processing with highly threaded texture fragment generation
US8184120B2 (en) * 2008-05-19 2012-05-22 Siemens Aktiengesellschaft Framework for processing and rendering large volume data
US20110285711A1 (en) * 2010-05-21 2011-11-24 Kilgard Mark J Path rendering by covering the path based on a generated stencil buffer
CN103460618A (zh) * 2011-02-07 2013-12-18 英特尔公司 开环多输入多输出（mimo）的大延迟循环延迟分集（cdd）预编码器
US20140043341A1 (en) * 2012-08-09 2014-02-13 Qualcomm Incorporated Gpu-accelerated path rendering

Also Published As

Publication number Publication date
EP3108452B1 (en) 2020-06-24
US9679347B2 (en) 2017-06-13
WO2015126574A1 (en) 2015-08-27
US20150235341A1 (en) 2015-08-20
JP6271768B2 (ja) 2018-01-31
JP2017509092A (ja) 2017-03-30
ES2820716T3 (es) 2021-04-22
CN106030663A (zh) 2016-10-12
KR20160123311A (ko) 2016-10-25
EP3108452A1 (en) 2016-12-28
KR101813429B1 (ko) 2017-12-28

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