CN106030584A - 基于温度的导线布线 - Google Patents
基于温度的导线布线 Download PDFInfo
- Publication number
- CN106030584A CN106030584A CN201580006885.9A CN201580006885A CN106030584A CN 106030584 A CN106030584 A CN 106030584A CN 201580006885 A CN201580006885 A CN 201580006885A CN 106030584 A CN106030584 A CN 106030584A
- Authority
- CN
- China
- Prior art keywords
- prospective
- temperature
- lines
- line
- point
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/394—Routing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0005—Apparatus or processes for manufacturing printed circuits for designing circuits by computer
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2119/00—Details relating to the type or aim of the analysis or the optimisation
- G06F2119/08—Thermal analysis or thermal optimisation
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2119/00—Details relating to the type or aim of the analysis or the optimisation
- G06F2119/12—Timing analysis or timing optimisation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49162—Manufacturing circuit on or in base by using wire as conductive path
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Networks & Wireless Communication (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/175,429 | 2014-02-07 | ||
| US14/175,429 US20150227667A1 (en) | 2014-02-07 | 2014-02-07 | Temperature-based wire routing |
| PCT/US2015/014770 WO2015120244A1 (en) | 2014-02-07 | 2015-02-06 | Temperature-based wire routing |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106030584A true CN106030584A (zh) | 2016-10-12 |
Family
ID=52577974
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201580006885.9A Pending CN106030584A (zh) | 2014-02-07 | 2015-02-06 | 基于温度的导线布线 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20150227667A1 (enExample) |
| EP (1) | EP3103041A1 (enExample) |
| JP (1) | JP2017512331A (enExample) |
| CN (1) | CN106030584A (enExample) |
| WO (1) | WO2015120244A1 (enExample) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11157676B2 (en) * | 2016-09-20 | 2021-10-26 | Octavo Systems Llc | Method for routing bond wires in system in a package (SiP) devices |
| US10515181B2 (en) * | 2017-05-10 | 2019-12-24 | International Business Machines Corporation | Integrated circuit identification |
| CN119528602B (zh) * | 2025-01-22 | 2025-05-23 | 成都工业学院 | 多孔碳化硅-碳化硼陶瓷基复合材料的致密化生产工艺 |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6766502B1 (en) * | 1999-12-30 | 2004-07-20 | Intel Corporation | Method and apparatus for routing using deferred merging |
| CN1619550A (zh) * | 2003-11-10 | 2005-05-25 | 株式会社东芝 | 具有倾斜布线的半导体集成电路、及其布图方法和布图设计程序 |
| US20060012967A1 (en) * | 2002-04-01 | 2006-01-19 | Ibiden Co., Ltd. | Ic chip mounting substrate, ic chip mounting substrate manufacturing method, optical communication device, and optical communication device manufacturing method |
| US20090319964A1 (en) * | 2008-06-24 | 2009-12-24 | Vinod Kariat | Method and apparatus for thermal analysis |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3986717B2 (ja) | 1999-12-01 | 2007-10-03 | 富士通株式会社 | パス決定方法及び記憶媒体 |
| US7155686B2 (en) | 2004-03-09 | 2006-12-26 | Taiwan Semiconductor Manufacturing Co., Ltd. | Placement and routing method to reduce Joule heating |
| US7725861B2 (en) | 2006-05-15 | 2010-05-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method, apparatus, and system for LPC hot spot fix |
| JP5390168B2 (ja) | 2008-11-10 | 2014-01-15 | ルネサスエレクトロニクス株式会社 | 配線のレイアウト方法及びプログラム |
-
2014
- 2014-02-07 US US14/175,429 patent/US20150227667A1/en not_active Abandoned
-
2015
- 2015-02-06 JP JP2016549733A patent/JP2017512331A/ja active Pending
- 2015-02-06 EP EP15706324.9A patent/EP3103041A1/en not_active Withdrawn
- 2015-02-06 CN CN201580006885.9A patent/CN106030584A/zh active Pending
- 2015-02-06 WO PCT/US2015/014770 patent/WO2015120244A1/en not_active Ceased
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6766502B1 (en) * | 1999-12-30 | 2004-07-20 | Intel Corporation | Method and apparatus for routing using deferred merging |
| US20060012967A1 (en) * | 2002-04-01 | 2006-01-19 | Ibiden Co., Ltd. | Ic chip mounting substrate, ic chip mounting substrate manufacturing method, optical communication device, and optical communication device manufacturing method |
| CN1619550A (zh) * | 2003-11-10 | 2005-05-25 | 株式会社东芝 | 具有倾斜布线的半导体集成电路、及其布图方法和布图设计程序 |
| US20090319964A1 (en) * | 2008-06-24 | 2009-12-24 | Vinod Kariat | Method and apparatus for thermal analysis |
Non-Patent Citations (2)
| Title |
|---|
| CHUNCHEN LIU等: "Temperature-Aware Clock Tree Synthesis Considering Spatiotemporal Hot Spot Correlations", 《2008 IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN》 * |
| TIANPEI ZHANG等: "Temperature-Aware Routing in 3D ICs", 《DESIGN AUTOMATION ON,2006. ASIA AND SOUTH PACIFIC CONFERENCE ON》 * |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2015120244A1 (en) | 2015-08-13 |
| EP3103041A1 (en) | 2016-12-14 |
| JP2017512331A (ja) | 2017-05-18 |
| US20150227667A1 (en) | 2015-08-13 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20161012 |
|
| WD01 | Invention patent application deemed withdrawn after publication |