CN106027050A - Pipelined-successive approximation register analog-to-digital converter applying open-loop gain stage - Google Patents
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/10—Calibration or testing
- H03M1/1009—Calibration
- H03M1/1014—Calibration at one point of the transfer characteristic, i.e. by adjusting a single reference value, e.g. bias or gain error
- H03M1/1023—Offset correction
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
- H03M1/1245—Details of sampling arrangements or methods
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Abstract
The invention relates to a pipelined-successive approximation register analog-to-digital converter applying an open-loop gain stage. A signal channel is formed by connecting a first-level successive approximation register analog-to-digital converter circuit, a voltage gain which is used for amplifying a surplus voltage output by the first-level successive approximation register analog-to-digital converter circuit, a tunable gain for carrying out gain calibration on the voltage gain, and a second-level successive approximation register analog-to-digital converter circuit in sequence. The pipelined-successive approximation register analog-to-digital converter also comprises a pseudo-random number generator and a background calibration engine circuit, which are used for calibrating various simulation mismatches of the signal channel. The voltage gain is the open-loop gain stage. According to the converter, a relatively high signal to noise ratio can be obtained, a signal conversion speed and resolution can be improved, the system power consumption can be reduced, and the system robustness can be improved.
Description
Technical field
The invention belongs to analog-digital converter field, be specifically related to a kind of streamline successive approximation analog-digital converter using open-loop gain level.
Background technology
Wireless communication industry and large-scale digital ic technology had had development at full speed, analog-digital converter (ADC) to also obtain qualitative leap as simulated world and the bridge of digital world, its performance in the more than ten years in past.But as conventional pipelined analog-digital converter (Pipeline ADC) and successive approximation analog-digital converter (SAR ADC), still endure the restriction of its system structure to the fullest extent, possess different short slabs.Traditional Pipeline ADC utilizes repeatedly serial operation to carry out data process, and this usually needs the high precision operating amplifier of multiple big power consumption, is unfavorable for low cost and Miniaturization Design；Traditional SAR ADC will carry out, in each change-over period, the resolution that at least N(N is analog-digital converter) secondary lookup, its system structure hinders SAR ADC and strides forward to field more at a high speed.
Limit to abolish the system structure of pipeline system and successive approximation analog-digital converter, streamline successive approximation (pipelined-SAR) analog-digital converter (ADC) is proposed out, it merges the advantage in the above two structures, and this structure has higher speed and resolution.But existing streamline successive approximation analog-digital converter needs accurately to amplify the margin voltage of first order gradually-appoximant analog-digital converter, and it is the most harsh that the electric capacity in first and second grades of gradually-appoximant analog-digital converters mates requirement, and this has resulted in bigger power consumption and area.
Summary of the invention
It is an object of the invention to provide and a kind of can reduce energy consumption further and improve speed and resolution, the streamline successive approximation analog-digital converter higher to the robustness of technological fluctuation.
For reaching above-mentioned purpose, the technical solution used in the present invention is:
A kind of streamline successive approximation analog-digital converter using open-loop gain level, its signal path is by first order successive approximation analog-digital converter circuit, the voltage gain stages being amplified for the margin voltage that described first order successive approximation analog-digital converter circuit is exported, described voltage gain stages is carried out the adjustable gain level of gain calibration, second level successive approximation analog-digital converter circuit is connected in sequence, it also includes the pseudorandom number generator for calibrating the various simulation mismatches of described signal path and digital calibration circuit, described voltage gain stages uses open-loop gain level.
Described adjustable gain level carries out gain calibration according to the output of described digital calibration circuit to described voltage gain stages.
Described voltage gain stages includes an open loop amplifier without any negative feedback loop.
Described digital calibration circuit comprises described voltage gain stages and the overall gain of described adjustable gain level for calculating；The overall gain of described voltage gain stages and described adjustable gain level is adjusted by described adjustable gain level according to the output of described digital calibration circuit.
Described digital calibration circuit is additionally operable to the DC maladjustment calculating described first order successive approximation analog-digital converter circuit relative to described second level successive approximation analog-digital converter circuit, and export in calibration result signal extremely described first order successive approximation analog-digital converter circuit, carry out mistuning calibration function；Described digital calibration circuit is additionally operable to calculate the relative scale of capacitor array in described first order successive approximation analog-digital converter circuit, and realizes carrying out capacitance mismatch compensation at numeric field.
nullThe analog input end of described first order successive approximation analog-digital converter circuit is the input of the streamline successive approximation analog-digital converter of described use open-loop gain level and for inputting analogue signal Ain to be converted，The analog output of described first order successive approximation analog-digital converter circuit is connected with the analog input end of described open-loop gain level and transmits analogue signal A1，The described first digit input of first order successive approximation analog-digital converter circuit is connected with the first digit outfan of described digital calibration circuit and transmitting digital signals D3，The described digital signal output end of first order successive approximation analog-digital converter circuit is connected with the first digit input of described digital calibration circuit and transmitting digital signals D1，The analog output of described open-loop gain level is connected with the analog input end of described adjustable gain level and transmits analogue signal A2，The digital input end of described adjustable gain level is connected with the second digit outfan of described digital calibration circuit and transmitting digital signals D4，The analog output of described adjustable gain level is connected with the analog input end of described second level successive approximation analog-digital converter circuit and transmits analogue signal A3，The digital output end of described second level successive approximation analog-digital converter circuit is connected with the second digit input of described digital calibration circuit and transmitting digital signals D2，The digital output end of described pseudorandom number generator respectively with the second digit input of described first order successive approximation analog-digital converter circuit、The third digit input of described digital calibration circuit is connected and transmitting digital signals D5，The third digit outfan of described digital calibration circuit be the outfan of the streamline successive approximation analog-digital converter of described use open-loop gain level and for the digital signal Dout that is converted to of output.
Owing to technique scheme is used, the present invention compared with prior art has the advantage that the streamline successive approximation analog-digital converter of the present invention is obtained in that higher signal to noise ratio, raising signal conversion speed and resolution and reduces system power dissipation, adds the robustness of system.
Accompanying drawing explanation
Accompanying drawing 1 is the structural representation of the streamline successive approximation analog-digital converter of the present invention.
Accompanying drawing 2 is the calibration process schematic diagram of the streamline successive approximation analog-digital converter of the present invention.
Accompanying drawing 3 is the circuit diagram of the second level successive approximation analog-digital converter circuit comprising adjustable gain level in the streamline successive approximation analog-digital converter of the present invention.
Detailed description of the invention
For making the object, technical solutions and advantages of the present invention clearer, below in conjunction with specific embodiment, and referring to the drawings, the present invention is described in more detail.
It should be noted that in accompanying drawing or description describe, similar or identical part all uses identical figure number.The implementation not illustrated in accompanying drawing or describe, for form known to a person of ordinary skill in the art in art.Although it addition, the demonstration of the parameter comprising particular value can be provided herein, it is to be understood that parameter is worth equal to corresponding without definite, but can be similar to be worth accordingly in acceptable error margin or design constraint.
Embodiment: a kind of streamline successive approximation analog-digital converter using open-loop gain level, its signal path is connected in sequence by first order successive approximation analog-digital converter circuit, voltage gain stages, adjustable gain level, second level successive approximation analog-digital converter, and this streamline successive approximation analog-digital converter also includes the pseudorandom number generator for calibrating the various simulation mismatches of signal path and digital calibration circuit.Wherein, voltage gain stages is for being amplified the margin voltage of first order successive approximation analog-digital converter circuit output, and it includes open loop amplifier, and this open loop amplifier does not comprise any negative feedback loop for accurately amplifying.Adjustable gain level for carrying out gain calibration according to the output of digital calibration circuit to voltage gain stages, the impact of the factors such as technique, voltage, temperature it is easily subject to due to the gain of open-loop gain level, therefore, need to coordinate adjustable gain level and digital calibration circuit that gain is calibrated, concrete, digital calibration circuit comprises voltage gain stages and the overall gain of adjustable gain level for calculating, and the overall gain of voltage gain stages and adjustable gain level is adjusted roughly by adjustable gain level according to the output of digital calibration circuit.In addition, digital calibration circuit is additionally operable to the DC maladjustment calculating first order successive approximation analog-digital converter circuit relative to second level successive approximation analog-digital converter circuit, and export calibration result signal in first order successive approximation analog-digital converter circuit, carry out mistuning calibration function；Digital calibration circuit is additionally operable to calculate the relative scale of capacitor array in first order successive approximation analog-digital converter circuit, and realizes carrying out capacitance mismatch compensation at numeric field.
As shown in Figure 1, in the streamline successive approximation analog-digital converter of this use open-loop gain level, first order successive approximation analog-digital converter circuit (SAR ADC1) there is an analog input end, an analog output, two digital input ends and a digital output end；Second level successive approximation analog-digital converter (SAR ADC2) circuit has an analog input end and a digital output end；Open-loop gain level (Open-loop amp) has an analog input end and an analog output；Adjustable gain level (Tunable gain) has an analog input end, an analog output and a digital input end；Pseudorandom number generator (PN) has a digital output end；Digital calibration circuit (Background Calibration
Engine) there are three digital input ends and three digital output ends.
nullThe analog input end of first order successive approximation analog-digital converter circuit is the input of the streamline successive approximation analog-digital converter of this use open-loop gain level and for inputting analogue signal Ain to be converted，The analog output of first order successive approximation analog-digital converter circuit is connected with the analog input end of open-loop gain level and transmits analogue signal A1，Open-loop gain level uses open loop amplifier，The first digit input of first order successive approximation analog-digital converter circuit is connected with the first digit outfan of backstage digital calibration circuit digital calibration circuit and transmitting digital signals D3，The digital signal output end of first order successive approximation analog-digital converter circuit is connected with the first digit input of backstage digital calibration circuit digital calibration circuit and transmitting digital signals D1，The analog output of open-loop gain level is connected with the analog input end of adjustable gain level and transmits analogue signal A2，The digital input end of adjustable gain level is connected with the second digit outfan of backstage digital calibration circuit digital calibration circuit and transmitting digital signals D4，The analog output of adjustable gain level is connected with the analog input end of second level successive approximation analog-digital converter circuit and transmits analogue signal A3，The digital output end of second level successive approximation analog-digital converter circuit is connected with the second digit input of backstage digital calibration circuit digital calibration circuit and transmitting digital signals D2，The digital output end of pseudorandom number generator respectively with the second digit input of first order successive approximation analog-digital converter circuit、The third digit input of backstage digital calibration circuit digital calibration circuit is connected and transmitting digital signals D5，The third digit outfan of backstage digital calibration circuit digital calibration circuit be the outfan of the streamline successive approximation analog-digital converter of this use open-loop gain level and for the digital signal Dout that is converted to of output.
In above scheme, analogue signal Ain that outside is inputted by first order successive approximation analog-digital converter circuit is sampled, and does digital quantization process, obtains digital signal D1 and sends into digital calibration circuit.Margin voltage after treatment is exported to open-loop gain level by first order successive approximation analog-digital converter circuit with analogue signal A1, open-loop gain level is amplified and filters acquisition analogue signal A2 to analogue signal A1, and by analogue signal A2 output to adjustable gain level.Adjustable gain level carries out gain calibration to analogue signal A2 and obtains analogue signal A3, and by analogue signal A3 output to second level successive approximation analog-digital converter circuit.Analogue signal A3 is sampled by second level successive approximation analog-digital converter circuit, and does digital quantization process, obtains digital signal D2, and by digital signal D2 output to digital calibration circuit.The digital signal D1 of the output of first order successive approximation analog-digital converter circuit and the digital signal D2 of second level successive approximation analog-digital converter circuit output is analyzed and adds up by digital calibration circuit, to calculate the polarity relative to the offset voltage deviation of second level successive approximation analog-digital converter circuit of the comparator in first order successive approximation analog-digital converter circuit, and the value of the digital signal D3 of its output of successive adjustment, first order successive approximation analog-digital converter circuit carries out the offset voltage calibration of its internal comparator according to the digital signal D3 that digital calibration circuit exports, thus the deviation of offset voltage is minimized, realize mistuning calibration function.The digital signal D1 of output and the digital signal D2 of second level successive approximation analog-digital converter circuit output of first order successive approximation analog-digital converter circuit is also analyzed and adds up by digital calibration circuit, the most suitable relative to the range ability of second level successive approximation analog-digital converter circuit to calculate the span of analogue signal A3 of adjustable gain level output, and the value of successive adjustment digital signal D4, adjustable gain level carries out gain calibration according to digital signal D4 to analogue signal A2 and obtains analogue signal A3, the span making analogue signal A3 is slightly less than the range ability of second level successive approximation analog-digital converter circuit, realize gain calibration.Pseudorandom number generator is produced pseudo-random number sequence and is exported to first order successive approximation analog-digital converter circuit and digital calibration circuit by digital signal D5.First order successive approximation analog-digital converter circuit controls its internal capacitance array according to the digital signal D5 that pseudorandom number generator exports and is connected to different reference voltages.The digital signal D5 of output of pseudorandom number generator, the digital signal D1 of output of first order successive approximation analog-digital converter circuit and the digital signal D2 of second level successive approximation analog-digital converter circuit output are then analyzed and add up by digital calibration circuit, to calculate the accurate weight corresponding for digital signal D1 of first order successive approximation analog-digital converter circuit output, and carry out weight calibration by Digital Signal Processing mode, obtain digital signal Dout.
Accompanying drawing 2 be above-mentioned streamline successive approximation analog-digital converter calibration process implement block diagram, its work process particularly as follows:
The first step, electrifying startup.
Second step, carry out mistuning calibration function, its detailed process includes: digital signal D1 and the digital signal D2 of second level successive approximation analog-digital converter circuit output that first order successive approximation analog-digital converter circuit is exported by digital calibration circuit are analyzed and add up, calculate the polarity relative to the offset voltage deviation of second level successive approximation analog-digital converter circuit of the comparator in first order successive approximation analog-digital converter circuit, and by the value of successive adjustment digital signal D3；The digital signal D3 that first order successive approximation analog-digital converter circuit exports according to digital calibration circuit, carries out offset voltage to internal comparator and is adjusted, thus is minimized by this offset voltage relative deviation.
3rd step, carry out gain calibration, its detailed process includes: digital signal D1 and the digital signal D2 of second level successive approximation analog-digital converter circuit output that first order successive approximation analog-digital converter circuit is exported by digital calibration circuit are analyzed and add up, the span of the analog output signal A3 calculating adjustable gain level is the most suitable relative to the range ability of second level successive approximation analog-digital converter circuit, and the value of successive adjustment digital signal D4；The digital signal D4 that adjustable gain level exports according to digital calibration circuit, is adjusted its gain, so that the span of analogue signal A3 is slightly less than and range ability without departing from second level SAR ADC.
4th step, carries out weight calibration, and its detailed process includes: pseudorandom number generator produces known pseudo-random number sequence D5, delivers in first order successive approximation analog-digital converter circuit and digital calibration circuit.The digital signal D5 that first order successive approximation analog-digital converter circuit exports according to pseudorandom number generator, controls its internal capacitance array and is connected to different reference voltages.The digital signal D5 that pseudorandom number generator is exported by digital calibration circuit, and the digital signal D2 of the digital signal D1 of first order successive approximation analog-digital converter circuit output and the output of second level successive approximation analog-digital converter circuit is analyzed and adds up, to calculate the accurate weight corresponding for digital signal D1 of first order successive approximation analog-digital converter electricity output, compensate by the way of Digital Signal Processing and calibrate, obtaining final numeral output Dout.If detecting during weight is calibrated, the span of analogue signal A3 beyond the range ability of second level successive approximation analog-digital converter electricity, then returns to the 3rd step；Otherwise will continuously carry out weight calibration.
In above-mentioned streamline successive approximation analog-digital converter, adjustable gain level can be dissolved in the successive approximation analog-digital converter circuit of the second level.Fig. 3 be a second level successive approximation analog-digital converter circuit comprising adjustable gain level be embodied as circuit diagram.This represents that adjustable gain level can be dissolved in the successive approximation analog-digital converter circuit of the second level easily, it is achieved cost is the lowest.In parallel with former DAC by introducing a gain calibration DAC, to realize adjusting the purpose of the input range of second level successive approximation analog-digital converter circuit, this process is compared with the gain adjusting adjustable gain level in Fig. 1, and effect is equal to completely.Its detailed description of the invention is: the digital signal D4 returned by digital calibration circuit, and the sole plate of the capacitor array of gain calibration DAC is coupled with GND current potential or unsettled, i.e. reaches to adjust the purpose of this stage gain, thus completes gain calibration step process.
Having the beneficial effects that of such scheme:
1) by the comparator in first order successive approximation analog-digital converter circuit is carried out offset voltage calibration, effective input range of second level successive approximation analog-digital converter circuit can be increased, thus help system obtains possible highest signal to noise ratio；
2) by the gain of adjustable gain level is calibrated, effective input range of second level successive approximation analog-digital converter circuit can be increased, thus help system obtains possible highest signal to noise ratio, in addition, the most effectively reduce the requirement of the gain accuracy of divided ring gain stage, thus improve conversion speed and reduce system power dissipation, add the robustness of circuit；
3) by the way of Digital Signal Processing, calculate the accurate weight corresponding for digital signal D1 of first order successive approximation analog-digital converter circuit output, and result compensated and calibrates, the required precision of first order successive approximation analog-digital converter circuit can be significantly reduced, thus improve conversion speed and reduce system power dissipation, add the robustness of circuit.
In sum, the streamline successive approximation analog-digital converter of the use open-loop gain level that the present invention provides, by using a simple open loop amplifier to enormously simplify analog circuit complexity as open-loop gain level, improve speed, reduce power consumption；The method using digital calibration adjusts DC maladjustment and the gain compensation of second level successive approximation analog-digital converter circuit of first order successive approximation analog-digital converter circuit respectively, both add the robustness of circuit, the most beneficially system and realize the highest possible sampling rate and signal to noise ratio.The accurate weight of first order successive approximation analog-digital converter circuit is calculated by same use digital calibration techniques, can effectively reduce mission nonlinear.
Particular embodiments described above; the purpose of the present invention, technical scheme and beneficial effect are further described; it is it should be understood that; the foregoing is only the specific embodiment of the present invention; it is not limited to the present invention; all within the spirit and principles in the present invention, any modification, equivalent substitution and improvement etc. done, should be included within the scope of the present invention.
Claims (6)
1. the streamline successive approximation analog-digital converter using open-loop gain level, its signal path is by first order successive approximation analog-digital converter circuit, the voltage gain stages being amplified for the margin voltage that described first order successive approximation analog-digital converter circuit is exported, described voltage gain stages is carried out the adjustable gain level of gain calibration, second level successive approximation analog-digital converter circuit is connected in sequence, it also includes the pseudorandom number generator for calibrating the various simulation mismatches of described signal path and digital calibration circuit, it is characterized in that: described voltage gain stages uses open-loop gain level.
A kind of streamline successive approximation analog-digital converter using open-loop gain level the most according to claim 1, it is characterised in that: described adjustable gain level carries out gain calibration according to the output of described digital calibration circuit to described voltage gain stages.
A kind of streamline successive approximation analog-digital converter using open-loop gain level the most according to claim 1 and 2, it is characterised in that: described voltage gain stages includes an open loop amplifier.
A kind of streamline successive approximation analog-digital converter using open-loop gain level the most according to claim 2, it is characterised in that: described digital calibration circuit comprises described voltage gain stages and the overall gain of described adjustable gain level for calculating；The overall gain of described voltage gain stages and described adjustable gain level is adjusted by described adjustable gain level according to the output of described digital calibration circuit.
A kind of streamline successive approximation analog-digital converter using open-loop gain level the most according to claim 4, it is characterized in that: described digital calibration circuit is additionally operable to the DC maladjustment calculating described first order successive approximation analog-digital converter circuit relative to described second level successive approximation analog-digital converter circuit, and export in calibration result signal extremely described first order successive approximation analog-digital converter circuit, carry out mistuning calibration function；
Described digital calibration circuit is additionally operable to calculate the relative scale of capacitor array in described first order successive approximation analog-digital converter circuit, and realizes carrying out capacitance mismatch compensation at numeric field.
nullA kind of streamline successive approximation analog-digital converter using open-loop gain level the most according to claim 2，It is characterized in that: the analog input end of described first order successive approximation analog-digital converter circuit is the input of the streamline successive approximation analog-digital converter of described use open-loop gain level and for inputting analogue signal Ain to be converted，The analog output of described first order successive approximation analog-digital converter circuit is connected with the analog input end of described open-loop gain level and transmits analogue signal A1，The described first digit input of first order successive approximation analog-digital converter circuit is connected with the first digit outfan of described digital calibration circuit and transmitting digital signals D3，The described digital signal output end of first order successive approximation analog-digital converter circuit is connected with the first digit input of described digital calibration circuit and transmitting digital signals D1，The analog output of described open-loop gain level is connected with the analog input end of described adjustable gain level and transmits analogue signal A2，The digital input end of described adjustable gain level is connected with the second digit outfan of described digital calibration circuit and transmitting digital signals D4，The analog output of described adjustable gain level is connected with the analog input end of described second level successive approximation analog-digital converter circuit and transmits analogue signal A3，The digital output end of described second level successive approximation analog-digital converter circuit is connected with the second digit input of described digital calibration circuit and transmitting digital signals D2，The digital output end of described pseudorandom number generator respectively with the second digit input of described first order successive approximation analog-digital converter circuit、The third digit input of described digital calibration circuit is connected and transmitting digital signals D5，The third digit outfan of described digital calibration circuit be the outfan of the streamline successive approximation analog-digital converter of described use open-loop gain level and for the digital signal Dout that is converted to of output.
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| CN107222212A (en) * | 2017-04-23 | 2017-09-29 | 复旦大学 | Improve the method for gradual approaching A/D converter circuit signal to noise ratio and realize circuit |
| CN108540131A (en) * | 2018-03-13 | 2018-09-14 | 东南大学 | A kind of out of order and calibration method suitable for non-loop structure SAR ADC |
| CN108880543A (en) * | 2017-05-10 | 2018-11-23 | 深圳清华大学研究院 | Production line analog-digital converter and its amplifier adaptive configuration circuit and method |
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| CN107222212A (en) * | 2017-04-23 | 2017-09-29 | 复旦大学 | Improve the method for gradual approaching A/D converter circuit signal to noise ratio and realize circuit |
| CN108880543A (en) * | 2017-05-10 | 2018-11-23 | 深圳清华大学研究院 | Production line analog-digital converter and its amplifier adaptive configuration circuit and method |
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| CN108540131A (en) * | 2018-03-13 | 2018-09-14 | 东南大学 | A kind of out of order and calibration method suitable for non-loop structure SAR ADC |
| CN111294048B (en) * | 2018-12-06 | 2023-09-29 | 美国亚德诺半导体公司 | Inter-stage gain calibration in dual conversion analog-to-digital converter |
| CN111294048A (en) * | 2018-12-06 | 2020-06-16 | 美国亚德诺半导体公司 | Interstage gain calibration in dual conversion analog-to-digital converters |
| CN110190854A (en) * | 2019-05-13 | 2019-08-30 | 东南大学 | A kind of realization circuit and method sharing one group of reference voltage towards two-step SAR ADC |
| CN110190854B (en) * | 2019-05-13 | 2023-05-12 | 东南大学 | Two-step SAR ADC-oriented shared reference voltage realization circuit and method |
| CN110535473B (en) * | 2019-09-03 | 2022-04-22 | 中国电子科技集团公司第二十四研究所 | Non-acquisition-guarantee high-speed high-input-bandwidth pipeline structure ADC without path mismatch |
| CN110535473A (en) * | 2019-09-03 | 2019-12-03 | 中国电子科技集团公司第二十四研究所 | The nothing of no path mismatch adopts the high input bandwidth flow line structure ADC of guarantor's high speed |
| CN110880934A (en) * | 2019-12-06 | 2020-03-13 | 清华大学深圳国际研究生院 | Successive approximation type analog-to-digital converter and calibration method |
| CN111740740A (en) * | 2020-06-22 | 2020-10-02 | 同济大学 | Pipeline successive approximation analog-digital converter background gain calibration circuit and method |
| CN111740740B (en) * | 2020-06-22 | 2022-06-21 | 同济大学 | Pipeline successive approximation analog-digital converter background gain calibration circuit and method |
| CN112003620B (en) * | 2020-10-29 | 2021-02-19 | 南京航空航天大学 | Pipeline successive approximation type ADC (analog to digital converter) bit weight background calibration system and method |
| CN113595550A (en) * | 2021-07-13 | 2021-11-02 | 上海交通大学 | Successive approximation analog-digital converter with digital calibration |
| CN113595550B (en) * | 2021-07-13 | 2023-07-25 | 上海交通大学 | Successive approximation analog-to-digital converter with digital calibration |
| TWI842454B (en) * | 2023-03-24 | 2024-05-11 | 瑞昱半導體股份有限公司 | Analog-to-digital conversion apparatus and method having dynamic gain compensation mechanism |
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